developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 |
| 2 | * |
| 3 | * Copyright (c) 2019 MediaTek Inc. |
| 4 | * Author: Harry Huang <harry.huang@mediatek.com> |
| 5 | */ |
| 6 | |
| 7 | #ifndef _RA_NAT_WANTED |
| 8 | #define _RA_NAT_WANTED |
| 9 | |
| 10 | #include <linux/ip.h> |
| 11 | #include <linux/ipv6.h> |
| 12 | |
| 13 | |
| 14 | #ifndef NEXTHDR_IPIP |
| 15 | #define NEXTHDR_IPIP 4 |
| 16 | #endif |
| 17 | |
| 18 | #define hwnat_vlan_tx_tag_present(__skb) ((__skb)->vlan_tci & VLAN_TAG_PRESENT) |
| 19 | #define hwnat_vlan_tag_get(__skb) ((__skb)->vlan_tci & ~VLAN_TAG_PRESENT) |
| 20 | |
| 21 | #if defined(CONFIG_HW_NAT) |
| 22 | extern void hwnat_magic_tag_set_zero(struct sk_buff *skb); |
| 23 | extern void hwnat_check_magic_tag(struct sk_buff *skb); |
| 24 | extern void hwnat_set_headroom_zero(struct sk_buff *skb); |
| 25 | extern void hwnat_set_tailroom_zero(struct sk_buff *skb); |
| 26 | extern void hwnat_copy_headroom(u8 *data, struct sk_buff *skb); |
| 27 | extern void hwnat_copy_tailroom(u8 *data, int size, struct sk_buff *skb); |
| 28 | extern void hwnat_setup_dma_ops(struct device *dev, bool coherent); |
| 29 | #else |
| 30 | |
| 31 | static inline void hwnat_magic_tag_set_zero(struct sk_buff *skb) |
| 32 | { |
| 33 | } |
| 34 | |
| 35 | static inline void hwnat_check_magic_tag(struct sk_buff *skb) |
| 36 | { |
| 37 | } |
| 38 | |
| 39 | static inline void hwnat_set_headroom_zero(struct sk_buff *skb) |
| 40 | { |
| 41 | } |
| 42 | |
| 43 | static inline void hwnat_set_tailroom_zero(struct sk_buff *skb) |
| 44 | { |
| 45 | } |
| 46 | |
| 47 | static inline void hwnat_copy_headroom(u8 *data, struct sk_buff *skb) |
| 48 | { |
| 49 | } |
| 50 | |
| 51 | static inline void hwnat_copy_tailroom(u8 *data, int size, struct sk_buff *skb) |
| 52 | { |
| 53 | } |
| 54 | |
| 55 | #endif |
| 56 | enum foe_cpu_reason { |
| 57 | TTL_0 = 0x02, /* IPv4(IPv6) TTL(hop limit) = 0 */ |
| 58 | /* IPv4(IPv6) has option(extension) header */ |
| 59 | HAS_OPTION_HEADER = 0x03, |
| 60 | NO_FLOW_IS_ASSIGNED = 0x07, /* No flow is assigned */ |
| 61 | /* IPv4 HNAT doesn't support IPv4 /w fragment */ |
| 62 | IPV4_WITH_FRAGMENT = 0x08, |
| 63 | /* IPv4 HNAPT/DS-Lite doesn't support IPv4 /w fragment */ |
| 64 | IPV4_HNAPT_DSLITE_WITH_FRAGMENT = 0x09, |
| 65 | /* IPv4 HNAPT/DS-Lite can't find TCP/UDP sport/dport */ |
| 66 | IPV4_HNAPT_DSLITE_WITHOUT_TCP_UDP = 0x0A, |
| 67 | /* IPv6 5T-route/6RD can't find TCP/UDP sport/dport */ |
| 68 | IPV6_5T_6RD_WITHOUT_TCP_UDP = 0x0B, |
| 69 | /* Ingress packet is TCP fin/syn/rst */ |
| 70 | /*(for IPv4 NAPT/DS-Lite or IPv6 5T-route/6RD) */ |
| 71 | TCP_FIN_SYN_RST = 0x0C, |
| 72 | UN_HIT = 0x0D, /* FOE Un-hit */ |
| 73 | HIT_UNBIND = 0x0E, /* FOE Hit unbind */ |
| 74 | /* FOE Hit unbind & rate reach */ |
| 75 | HIT_UNBIND_RATE_REACH = 0x0F, |
| 76 | HIT_BIND_TCP_FIN = 0x10, /* Hit bind PPE TCP FIN entry */ |
| 77 | /* Hit bind PPE entry and TTL(hop limit) = 1 */ |
| 78 | /* and TTL(hot limit) - 1 */ |
| 79 | HIT_BIND_TTL_1 = 0x11, |
| 80 | /* Hit bind and VLAN replacement violation */ |
| 81 | /*(Ingress 1(0) VLAN layers and egress 4(3 or 4) VLAN layers) */ |
| 82 | HIT_BIND_WITH_VLAN_VIOLATION = 0x12, |
| 83 | /* Hit bind and keep alive with unicast old-header packet */ |
| 84 | HIT_BIND_KEEPALIVE_UC_OLD_HDR = 0x13, |
| 85 | /* Hit bind and keep alive with multicast new-header packet */ |
| 86 | HIT_BIND_KEEPALIVE_MC_NEW_HDR = 0x14, |
| 87 | /* Hit bind and keep alive with duplicate old-header packet */ |
| 88 | HIT_BIND_KEEPALIVE_DUP_OLD_HDR = 0x15, |
| 89 | /* FOE Hit bind & force to CPU */ |
| 90 | HIT_BIND_FORCE_TO_CPU = 0x16, |
| 91 | /* Hit bind and remove tunnel IP header, */ |
| 92 | /* but inner IP has option/next header */ |
| 93 | HIT_BIND_WITH_OPTION_HEADER = 0x17, |
| 94 | /* Hit bind and exceed MTU */ |
| 95 | HIT_BIND_EXCEED_MTU = 0x1C, |
| 96 | HIT_BIND_PACKET_SAMPLING = 0x1B, /* PS packet */ |
| 97 | /* Switch clone multicast packet to CPU */ |
| 98 | HIT_BIND_MULTICAST_TO_CPU = 0x18, |
| 99 | /* Switch clone multicast packet to GMAC1 & CPU */ |
| 100 | HIT_BIND_MULTICAST_TO_GMAC_CPU = 0x19, |
| 101 | HIT_PRE_BIND = 0x1A /* Pre-bind */ |
| 102 | }; |
| 103 | |
| 104 | #define MAX_IF_NUM 64 |
| 105 | |
developer | d35bbcc | 2022-09-28 22:46:01 +0800 | [diff] [blame] | 106 | #if defined(CONFIG_MEDIATEK_NETSYS_V3) |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 107 | struct dmad_rx_descinfo4 { |
| 108 | uint32_t foe_entry_num:15; |
| 109 | uint32_t rsv0:3; |
| 110 | uint32_t CRSN:5; |
| 111 | uint32_t rsv1:3; |
| 112 | uint32_t SPORT:4; |
| 113 | uint32_t ppe:1; |
| 114 | uint32_t ALG:1; |
| 115 | uint32_t IF:8; |
| 116 | uint32_t WDMAID:2; |
| 117 | uint32_t RXID:2; |
developer | d35bbcc | 2022-09-28 22:46:01 +0800 | [diff] [blame] | 118 | uint32_t WCID:16; |
| 119 | uint32_t BSSID:8; |
| 120 | uint32_t USR_INFO:16; |
| 121 | uint32_t TID:4; |
| 122 | uint32_t IS_FIXEDRATE:1; |
| 123 | uint32_t IS_PRIOR:1; |
| 124 | uint32_t IS_SP:1; |
| 125 | uint32_t HF:1; |
| 126 | uint32_t AMSDU:1; |
| 127 | uint16_t minfo:1; |
| 128 | uint16_t ntype:3; |
| 129 | uint16_t chid:8; |
| 130 | uint16_t rsv2:7; |
| 131 | u16 MAGIC_TAG_PROTECT; |
| 132 | } __packed; |
| 133 | #else |
| 134 | struct dmad_rx_descinfo4 { |
| 135 | uint32_t foe_entry_num:15; |
| 136 | uint32_t rsv0:3; |
| 137 | uint32_t CRSN:5; |
| 138 | uint32_t rsv1:3; |
| 139 | uint32_t SPORT:4; |
| 140 | uint32_t ppe:1; |
| 141 | uint32_t ALG:1; |
| 142 | uint32_t IF:8; |
| 143 | uint32_t WDMAID:2; |
| 144 | uint32_t RXID:2; |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 145 | uint32_t WCID:10; |
| 146 | uint32_t BSSID:6; |
| 147 | uint32_t rsv3:4; |
| 148 | uint16_t minfo:1; |
| 149 | uint16_t ntype:3; |
| 150 | uint16_t chid:8; |
| 151 | uint16_t rsv4:4; |
| 152 | u16 MAGIC_TAG_PROTECT; |
| 153 | } __packed; |
developer | d35bbcc | 2022-09-28 22:46:01 +0800 | [diff] [blame] | 154 | #endif |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 155 | |
| 156 | struct pdma_rx_desc_info4 { |
| 157 | u16 MAGIC_TAG_PROTECT; |
| 158 | uint32_t foe_entry_num:14; |
| 159 | uint32_t CRSN:5; |
| 160 | uint32_t SPORT:4; |
| 161 | uint32_t rsv:6; |
| 162 | uint32_t foe_entry_num_1:1; |
| 163 | uint32_t ppe:1; |
| 164 | uint32_t ALG:1; |
| 165 | uint32_t IF:8; |
| 166 | uint32_t WDMAID:2; |
| 167 | uint32_t RXID:2; |
| 168 | uint32_t WCID:10; |
| 169 | uint32_t BSSID:6; |
| 170 | uint32_t rsv2:4; |
| 171 | uint16_t minfo:1; |
| 172 | uint16_t ntype:3; |
| 173 | uint16_t chid:8; |
| 174 | uint16_t rsv3:4; |
| 175 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
| 176 | u16 SOURCE; |
| 177 | u16 DEST; |
| 178 | #endif |
| 179 | } __packed; |
| 180 | |
developer | 72d7e36 | 2021-07-08 19:29:25 +0800 | [diff] [blame] | 181 | #if defined(CONFIG_MEDIATEK_NETSYS_V2) |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 182 | struct head_rx_descinfo4 { |
| 183 | uint32_t foe_entry_num:14; |
| 184 | uint32_t CRSN:5; |
| 185 | uint32_t SPORT:4; |
| 186 | uint32_t rsv:6; |
| 187 | uint32_t foe_entry_num_1:1; |
| 188 | uint32_t ppe:1; |
| 189 | uint32_t ALG:1; |
| 190 | uint32_t IF:8; |
| 191 | uint32_t WDMAID:2; |
| 192 | uint32_t RXID:2; |
| 193 | uint32_t WCID:10; |
| 194 | uint32_t BSSID:6; |
| 195 | uint32_t rsv2:4; |
| 196 | uint16_t minfo:1; |
| 197 | uint16_t ntype:3; |
| 198 | uint16_t chid:8; |
| 199 | uint16_t rsv3:4; |
| 200 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
| 201 | u16 SOURCE; |
| 202 | u16 DEST; |
| 203 | #endif |
| 204 | u16 MAGIC_TAG_PROTECT; |
| 205 | } __packed; |
developer | 72d7e36 | 2021-07-08 19:29:25 +0800 | [diff] [blame] | 206 | #else |
| 207 | struct head_rx_descinfo4 { |
| 208 | uint32_t foe_entry_num:14; |
| 209 | uint32_t CRSN:5; |
| 210 | uint32_t SPORT:3; |
| 211 | uint32_t rsv:1; |
| 212 | uint32_t ALG:1; |
| 213 | uint32_t IF:4; |
| 214 | uint32_t rsv2:4; |
| 215 | uint32_t MAGIC_TAG_PROTECT: 16; |
| 216 | uint32_t WDMAID:2; |
| 217 | uint32_t RXID:2; |
| 218 | uint32_t WCID:10; |
| 219 | uint32_t BSSID:6; |
| 220 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
| 221 | u16 SOURCE; |
| 222 | u16 DEST; |
| 223 | #endif |
| 224 | } __packed; |
| 225 | #endif |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 226 | |
| 227 | struct cb_rx_desc_info4 { |
| 228 | u16 MAGIC_TAG_PROTECT0; |
| 229 | uint32_t foe_entry_num:15; |
| 230 | uint32_t CRSN:5; |
| 231 | uint32_t SPORT:4; |
| 232 | uint32_t ALG:1; |
| 233 | uint32_t rsv:7; |
| 234 | uint16_t IF:8; |
| 235 | uint16_t WDMAID:2; |
| 236 | uint16_t RXID:2; |
| 237 | uint16_t WCID:10; |
| 238 | uint16_t BSSID:6; |
| 239 | uint16_t rsv1:4; |
| 240 | uint16_t minfo:1; |
| 241 | uint16_t ntype:3; |
| 242 | uint16_t chid:8; |
| 243 | uint16_t rsv2:4; |
| 244 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
| 245 | u16 SOURCE; |
| 246 | u16 DEST; |
| 247 | #endif |
| 248 | u16 MAGIC_TAG_PROTECT1; |
| 249 | } __packed; |
| 250 | |
| 251 | |
| 252 | |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 253 | #define WIFI_INFO_LEN 6 |
developer | d35bbcc | 2022-09-28 22:46:01 +0800 | [diff] [blame] | 254 | #define FOE_INFO_LEN (10 + WIFI_INFO_LEN) |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 255 | |
| 256 | |
| 257 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
developer | d35bbcc | 2022-09-28 22:46:01 +0800 | [diff] [blame] | 258 | #define FOE_INFO_LEN (10 + 4 + WIFI_INFO_LEN) |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 259 | #define FOE_MAGIC_FASTPATH 0x77 |
| 260 | #define FOE_MAGIC_L2TPPATH 0x78 |
| 261 | #endif |
| 262 | |
| 263 | #define FOE_MAGIC_PCI 0x73 |
| 264 | #define FOE_MAGIC_WLAN 0x74 |
| 265 | #define FOE_MAGIC_GE 0x75 |
| 266 | #define FOE_MAGIC_PPE 0x76 |
| 267 | #define FOE_MAGIC_WED0 0x78 |
| 268 | #define FOE_MAGIC_WED1 0x79 |
developer | d35bbcc | 2022-09-28 22:46:01 +0800 | [diff] [blame] | 269 | #define FOE_MAGIC_WED2 0x7A |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 270 | #define FOE_MAGIC_MED 0x80 |
| 271 | #define FOE_MAGIC_EDMA0 0x81 |
| 272 | #define FOE_MAGIC_EDMA1 0x82 |
| 273 | #define TAG_PROTECT 0x6789 |
| 274 | #define USE_HEAD_ROOM 0 |
| 275 | #define USE_TAIL_ROOM 1 |
| 276 | #define USE_CB 2 |
| 277 | #define ALL_INFO_ERROR 3 |
| 278 | |
| 279 | /**************************DMAD FORMAT********************************/ |
| 280 | #define FOE_TAG_PROTECT(skb) \ |
| 281 | (((struct dmad_rx_descinfo4 *)((skb)->head))->MAGIC_TAG_PROTECT) |
| 282 | |
| 283 | #define FOE_ENTRY_NUM(skb) \ |
| 284 | (((struct dmad_rx_descinfo4 *)((skb)->head))->foe_entry_num) |
| 285 | #define FOE_ALG(skb) \ |
| 286 | (((struct dmad_rx_descinfo4 *)((skb)->head))->ALG) |
| 287 | #define FOE_AI(skb) \ |
| 288 | (((struct dmad_rx_descinfo4 *)((skb)->head))->CRSN) |
| 289 | #define FOE_SP(skb) \ |
| 290 | (((struct dmad_rx_descinfo4 *)((skb)->head))->SPORT) |
| 291 | #define FOE_MAGIC_TAG(skb) \ |
| 292 | (((struct dmad_rx_descinfo4 *)((skb)->head))->IF) |
| 293 | #define FOE_WDMA_ID(skb) \ |
| 294 | (((struct dmad_rx_descinfo4 *)((skb)->head))->WDMAID) |
| 295 | #define FOE_RX_ID(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->RXID) |
| 296 | #define FOE_WC_ID(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->WCID) |
| 297 | #define FOE_BSS_ID(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->BSSID) |
developer | d35bbcc | 2022-09-28 22:46:01 +0800 | [diff] [blame] | 298 | #define FOE_USR_INFO(skb) \ |
| 299 | (((struct dmad_rx_descinfo4 *)((skb)->head))->USR_INFO) |
| 300 | #define FOE_TID(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->TID) |
| 301 | #define FOE_IS_FIXEDRATE(skb) \ |
| 302 | (((struct dmad_rx_descinfo4 *)((skb)->head))->IS_FIXEDRATE) |
| 303 | #define FOE_IS_PRIOR(skb) \ |
| 304 | (((struct dmad_rx_descinfo4 *)((skb)->head))->IS_PRIOR) |
| 305 | #define FOE_IS_SP(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->IS_SP) |
| 306 | #define FOE_HF(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->HF) |
| 307 | #define FOE_AMSDU(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->AMSDU) |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 308 | #define FOE_PPE(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->ppe) |
| 309 | |
| 310 | /***********************HEAD FORMAT*************************************/ |
| 311 | |
| 312 | #define FOE_TAG_PROTECT_HEAD(skb) \ |
| 313 | (((struct head_rx_descinfo4 *)((skb)->head))->MAGIC_TAG_PROTECT) |
| 314 | #define FOE_ENTRY_NUM_LSB_HEAD(skb) \ |
| 315 | (((struct head_rx_descinfo4 *)((skb)->head))->foe_entry_num) |
| 316 | #define FOE_ENTRY_NUM_MSB_HEAD(skb) \ |
| 317 | (((struct head_rx_descinfo4 *)((skb)->head))->foe_entry_num_1) |
| 318 | |
| 319 | #define FOE_ENTRY_NUM_HEAD(skb) \ |
| 320 | (((FOE_ENTRY_NUM_MSB_HEAD(skb) & 0x1) << 14) | FOE_ENTRY_NUM_LSB_HEAD(skb)) |
| 321 | |
| 322 | |
| 323 | #define FOE_ALG_HEAD(skb) \ |
| 324 | (((struct head_rx_descinfo4 *)((skb)->head))->ALG) |
| 325 | #define FOE_AI_HEAD(skb) \ |
| 326 | (((struct head_rx_descinfo4 *)((skb)->head))->CRSN) |
| 327 | #define FOE_SP_HEAD(skb) \ |
| 328 | (((struct head_rx_descinfo4 *)((skb)->head))->SPORT) |
| 329 | #define FOE_MAGIC_TAG_HEAD(skb) \ |
| 330 | (((struct head_rx_descinfo4 *)((skb)->head))->IF) |
| 331 | |
| 332 | |
| 333 | #define FOE_WDMA_ID_HEAD(skb) \ |
| 334 | (((struct head_rx_descinfo4 *)((skb)->head))->WDMAID) |
| 335 | #define FOE_RX_ID_HEAD(skb) \ |
| 336 | (((struct head_rx_descinfo4 *)((skb)->head))->RXID) |
| 337 | #define FOE_WC_ID_HEAD(skb) \ |
| 338 | (((struct head_rx_descinfo4 *)((skb)->head))->WCID) |
| 339 | #define FOE_BSS_ID_HEAD(skb) \ |
| 340 | (((struct head_rx_descinfo4 *)((skb)->head))->BSSID) |
| 341 | #define FOE_PPE_HEAD(skb) \ |
| 342 | (((struct head_rx_descinfo4 *)((skb)->head))->PPE) |
| 343 | |
| 344 | /****************************TAIL FORMAT***************************************/ |
| 345 | #define FOE_TAG_PROTECT_TAIL(skb) \ |
| 346 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->MAGIC_TAG_PROTECT) |
| 347 | #define FOE_ENTRY_NUM_LSB_TAIL(skb) \ |
| 348 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->foe_entry_num) |
| 349 | |
| 350 | #define FOE_ENTRY_NUM_MSB_TAIL(skb) \ |
| 351 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->foe_entry_num_1) |
| 352 | #define FOE_ENTRY_NUM_TAIL(skb) \ |
| 353 | (((FOE_ENTRY_NUM_MSB_TAIL(skb) & 0x1) << 14) | FOE_ENTRY_NUM_LSB_TAIL(skb)) |
| 354 | #define FOE_ALG_TAIL(skb) \ |
| 355 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->ALG) |
| 356 | #define FOE_AI_TAIL(skb) \ |
| 357 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->CRSN) |
| 358 | #define FOE_SP_TAIL(skb) \ |
| 359 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->SPORT) |
| 360 | #define FOE_MAGIC_TAG_TAIL(skb) \ |
| 361 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->IF) |
| 362 | |
| 363 | #define FOE_WDMA_ID_TAIL(skb) \ |
| 364 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->WDMAID) |
| 365 | #define FOE_RX_ID_TAIL(skb) \ |
| 366 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->RXID) |
| 367 | #define FOE_WC_ID_TAIL(skb) \ |
| 368 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->WCID) |
| 369 | #define FOE_BSS_ID_TAIL(skb) \ |
| 370 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->BSSID) |
| 371 | |
| 372 | #define FOE_PPE_TAIL(skb) \ |
| 373 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->ppe) |
| 374 | /*********************************************************************/ |
| 375 | #define FOE_WDMA_ID_CB(skb) \ |
| 376 | (((struct cb_rx_desc_info4 *)((skb)->head))->WDMAID) |
| 377 | #define FOE_RX_ID_CB(skb) \ |
| 378 | (((struct cb_rx_desc_info4 *)((skb)->head))->RXID) |
| 379 | #define FOE_WC_ID_CB(skb) \ |
| 380 | (((struct cb_rx_desc_info4 *)((skb)->head))->WCID) |
| 381 | #define FOE_BSS_ID_CB(skb) \ |
| 382 | (((struct cb_rx_desc_info4 *)((skb)->head))->BSSID) |
| 383 | |
| 384 | #define FOE_MINFO(skb) (((struct head_rx_descinfo4 *)((skb)->head))->minfo) |
| 385 | #define FOE_MINFO_NTYPE(skb) (((struct head_rx_descinfo4 *)((skb)->head))->ntype) |
| 386 | #define FOE_MINFO_CHID(skb) (((struct head_rx_descinfo4 *)((skb)->head))->chid) |
| 387 | #define FOE_MINFO_HEAD(skb) (((struct head_rx_descinfo4 *)((skb)->head))->minfo) |
| 388 | #define FOE_MINFO_NTYPE_HEAD(skb) (((struct head_rx_descinfo4 *)((skb)->head))->ntype) |
| 389 | #define FOE_MINFO_CHID_HEAD(skb) (((struct head_rx_descinfo4 *)((skb)->head))->chid) |
| 390 | |
| 391 | #define FOE_MINFO_TAIL(skb) \ |
| 392 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->minfo) |
| 393 | #define FOE_MINFO_NTYPE_TAIL(skb) \ |
| 394 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->ntype) |
| 395 | #define FOE_MINFO_CHID_TAIL(skb) \ |
| 396 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->chid) |
| 397 | |
| 398 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
| 399 | #define FOE_SOURCE(skb) (((struct head_rx_descinfo4 *)((skb)->head))->SOURCE) |
| 400 | #define FOE_DEST(skb) (((struct head_rx_descinfo4 *)((skb)->head))->DEST) |
| 401 | #endif |
| 402 | |
| 403 | #define IS_SPACE_AVAILABLE_HEAD(skb) \ |
| 404 | ((((skb_headroom(skb) >= FOE_INFO_LEN) ? 1 : 0))) |
| 405 | #define IS_SPACE_AVAILABLE_HEAD(skb) \ |
| 406 | ((((skb_headroom(skb) >= FOE_INFO_LEN) ? 1 : 0))) |
| 407 | #define FOE_INFO_START_ADDR_HEAD(skb) (skb->head) |
| 408 | |
| 409 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
| 410 | #define FOE_SOURCE_HEAD(skb) \ |
| 411 | (((struct head_rx_descinfo4 *)((skb)->head))->SOURCE) |
| 412 | #define FOE_DEST_HEAD(skb) \ |
| 413 | (((struct head_rx_descinfo4 *)((skb)->head))->DEST) |
| 414 | #endif |
| 415 | |
| 416 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
| 417 | #define FOE_SOURCE_HEAD(skb) \ |
| 418 | (((struct head_rx_descinfo4 *)((skb)->head))->SOURCE) |
| 419 | #define FOE_DEST_HEAD(skb) \ |
| 420 | (((struct head_rx_descinfo4 *)((skb)->head))->DEST) |
| 421 | #endif |
| 422 | #define IS_SPACE_AVAILABLE_TAIL(skb) \ |
| 423 | (((skb_tailroom(skb) >= FOE_INFO_LEN) ? 1 : 0)) |
| 424 | #define IS_SPACE_AVAILABLE_TAIL(skb) \ |
| 425 | (((skb_tailroom(skb) >= FOE_INFO_LEN) ? 1 : 0)) |
| 426 | #define FOE_INFO_START_ADDR_TAIL(skb) \ |
| 427 | ((unsigned char *)(long)(skb_end_pointer(skb) - FOE_INFO_LEN)) |
| 428 | |
| 429 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
| 430 | #define FOE_SOURCE_TAIL(skb) \ |
| 431 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->SOURCE) |
| 432 | #define FOE_DEST_TAIL(skb) \ |
| 433 | (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->DEST) |
| 434 | #endif |
| 435 | |
| 436 | /* change the position of skb_CB if necessary */ |
| 437 | #define CB_OFFSET 40 |
| 438 | #define IS_SPACE_AVAILABLE_CB(skb) 1 |
| 439 | #define FOE_INFO_START_ADDR_CB(skb) (skb->cb + CB_OFFSET) |
| 440 | #define FOE_TAG_PROTECT_CB0(skb) \ |
| 441 | (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->MAGIC_TAG_PROTECT0) |
| 442 | #define FOE_TAG_PROTECT_CB1(skb) \ |
| 443 | (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->MAGIC_TAG_PROTECT1) |
| 444 | #define FOE_ENTRY_NUM_CB(skb) \ |
| 445 | (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->foe_entry_num) |
| 446 | #define FOE_ALG_CB(skb) \ |
| 447 | (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->ALG) |
| 448 | #define FOE_AI_CB(skb) \ |
| 449 | (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->CRSN) |
| 450 | #define FOE_SP_CB(skb) \ |
| 451 | (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->SPORT) |
| 452 | #define FOE_MAGIC_TAG_CB(skb) \ |
| 453 | (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->IF) |
| 454 | |
| 455 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
| 456 | #define FOE_SOURCE_CB(skb) (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->SOURCE) |
| 457 | #define FOE_DEST_CB(skb) (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->DEST) |
| 458 | #endif |
| 459 | |
| 460 | #define IS_MAGIC_TAG_PROTECT_VALID_HEAD(skb) \ |
| 461 | (FOE_TAG_PROTECT_HEAD(skb) == TAG_PROTECT) |
| 462 | #define IS_MAGIC_TAG_PROTECT_VALID_TAIL(skb) \ |
| 463 | (FOE_TAG_PROTECT_TAIL(skb) == TAG_PROTECT) |
| 464 | #define IS_MAGIC_TAG_PROTECT_VALID_CB(skb) \ |
| 465 | ((FOE_TAG_PROTECT_CB0(skb) == TAG_PROTECT) && \ |
| 466 | (FOE_TAG_PROTECT_CB0(skb) == FOE_TAG_PROTECT_CB1(skb))) |
| 467 | |
| 468 | #define IS_IF_PCIE_WLAN_HEAD(skb) \ |
| 469 | ((FOE_MAGIC_TAG_HEAD(skb) == FOE_MAGIC_PCI) || \ |
| 470 | (FOE_MAGIC_TAG_HEAD(skb) == FOE_MAGIC_WLAN) || \ |
| 471 | (FOE_MAGIC_TAG_HEAD(skb) == FOE_MAGIC_GE)) |
| 472 | |
| 473 | #define IS_IF_PCIE_WLAN_TAIL(skb) \ |
| 474 | ((FOE_MAGIC_TAG_TAIL(skb) == FOE_MAGIC_PCI) || \ |
| 475 | (FOE_MAGIC_TAG_TAIL(skb) == FOE_MAGIC_WLAN)) |
| 476 | |
| 477 | #define IS_IF_PCIE_WLAN_CB(skb) \ |
| 478 | ((FOE_MAGIC_TAG_CB(skb) == FOE_MAGIC_PCI) || \ |
| 479 | (FOE_MAGIC_TAG_CB(skb) == FOE_MAGIC_WLAN)) |
| 480 | |
| 481 | /* macros */ |
| 482 | #define magic_tag_set_zero(skb) \ |
| 483 | { \ |
| 484 | if ((FOE_MAGIC_TAG_HEAD(skb) == FOE_MAGIC_PCI) || \ |
| 485 | (FOE_MAGIC_TAG_HEAD(skb) == FOE_MAGIC_WLAN) || \ |
| 486 | (FOE_MAGIC_TAG_HEAD(skb) == FOE_MAGIC_GE)) { \ |
| 487 | if (IS_SPACE_AVAILABLE_HEAD(skb)) \ |
| 488 | FOE_MAGIC_TAG_HEAD(skb) = 0; \ |
| 489 | } \ |
| 490 | if ((FOE_MAGIC_TAG_TAIL(skb) == FOE_MAGIC_PCI) || \ |
| 491 | (FOE_MAGIC_TAG_TAIL(skb) == FOE_MAGIC_WLAN) || \ |
| 492 | (FOE_MAGIC_TAG_TAIL(skb) == FOE_MAGIC_GE)) { \ |
| 493 | if (IS_SPACE_AVAILABLE_TAIL(skb)) \ |
| 494 | FOE_MAGIC_TAG_TAIL(skb) = 0; \ |
| 495 | } \ |
| 496 | } |
| 497 | |
| 498 | static inline void hwnat_set_l2tp_unhit(struct iphdr *iph, struct sk_buff *skb) |
| 499 | { |
| 500 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
| 501 | /* only clear headeroom for TCP OR not L2TP packets */ |
| 502 | if ((iph->protocol == 0x6) || (ntohs(udp_hdr(skb)->dest) != 1701)) { |
| 503 | if (IS_SPACE_AVAILABLE_HEAD(skb)) { |
| 504 | FOE_MAGIC_TAG(skb) = 0; |
| 505 | FOE_AI(skb) = UN_HIT; |
| 506 | } |
| 507 | } |
| 508 | #endif |
| 509 | } |
| 510 | |
| 511 | static inline void hwnat_set_l2tp_fast_path(u32 l2tp_fast_path, u32 pptp_fast_path) |
| 512 | { |
| 513 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
| 514 | l2tp_fast_path = 1; |
| 515 | pptp_fast_path = 0; |
| 516 | #endif |
| 517 | } |
| 518 | |
| 519 | static inline void hwnat_clear_l2tp_fast_path(u32 l2tp_fast_path) |
| 520 | { |
| 521 | #if defined(CONFIG_RA_HW_NAT_PPTP_L2TP) |
| 522 | l2tp_fast_path = 0; |
| 523 | #endif |
| 524 | } |
| 525 | |
| 526 | /* #define CONFIG_HW_NAT_IPI */ |
| 527 | #if defined(CONFIG_HW_NAT_IPI) |
| 528 | extern int debug_level; |
| 529 | int get_rps_cpu(struct net_device *dev, struct sk_buff *skb, |
| 530 | struct rps_dev_flow **rflowp); |
| 531 | uint32_t ppe_extif_rx_handler(struct sk_buff *skb); |
| 532 | int hitbind_force_to_cpu_handler(struct sk_buff *skb, struct foe_entry *entry); |
| 533 | extern unsigned int ipidbg[num_possible_cpus()][10]; |
| 534 | extern unsigned int ipidbg2[num_possible_cpus()][10]; |
| 535 | /* #define HNAT_IPI_RXQUEUE 1 */ |
| 536 | #define HNAT_IPI_DQ 1 |
| 537 | #define HNAT_IPI_HASH_NORMAL 0 |
| 538 | #define HNAT_IPI_HASH_VTAG 1 |
| 539 | #define HNAT_IPI_HASH_FROM_EXTIF 2 |
| 540 | #define HNAT_IPI_HASH_FROM_GMAC 4 |
| 541 | |
| 542 | struct hnat_ipi_s { |
| 543 | #if defined(HNAT_IPI_DQ) |
| 544 | struct sk_buff_head skb_input_queue; |
| 545 | struct sk_buff_head skb_process_queue; |
| 546 | #elif defined(HNAT_IPI_RXQUEUE) |
| 547 | atomic_t rx_queue_num; |
| 548 | unsigned int rx_queue_ridx; |
| 549 | unsigned int rx_queue_widx; |
| 550 | struct sk_buff **rx_queue; |
| 551 | #else |
| 552 | /* unsigned int dummy0[0]; */ |
| 553 | struct sk_buff_head skb_ipi_queue; |
| 554 | /* unsigned int dummy1[8]; */ |
| 555 | #endif |
| 556 | unsigned long time_rec, recv_time; |
| 557 | unsigned int ipi_accum; |
| 558 | /*hwnat ipi use*/ |
| 559 | spinlock_t ipilock; |
| 560 | struct tasklet_struct smp_func_call_tsk; |
| 561 | } ____cacheline_aligned_in_smp; |
| 562 | |
| 563 | struct hnat_ipi_stat { |
| 564 | unsigned long drop_pkt_num_from_extif; |
| 565 | unsigned long drop_pkt_num_from_ppehit; |
| 566 | unsigned int smp_call_cnt_from_extif; |
| 567 | unsigned int smp_call_cnt_from_ppehit; |
| 568 | atomic_t cpu_status; |
| 569 | /* atomic_t cpu_status_from_extif; */ |
| 570 | /* atomic_t cpu_status_from_ppehit; */ |
| 571 | |
| 572 | /* atomic_t hook_status_from_extif; */ |
| 573 | /* atomic_t hook_status_from_ppehit; */ |
| 574 | } ____cacheline_aligned_in_smp; |
| 575 | |
| 576 | #define cpu_status_from_extif cpu_status |
| 577 | #define cpu_status_from_ppehit cpu_status |
| 578 | |
| 579 | struct hnat_ipi_cfg { |
| 580 | unsigned int enable_from_extif; |
| 581 | unsigned int enable_from_ppehit; |
| 582 | unsigned int queue_thresh_from_extif; |
| 583 | unsigned int queue_thresh_from_ppehit; |
| 584 | unsigned int drop_pkt_from_extif; |
| 585 | unsigned int drop_pkt_from_ppehit; |
| 586 | unsigned int ipi_cnt_mod_from_extif; |
| 587 | unsigned int ipi_cnt_mod_from_ppehit; |
| 588 | } ____cacheline_aligned_in_smp; |
| 589 | |
| 590 | int hnat_ipi_init(void); |
| 591 | int hnat_ipi_de_init(void); |
| 592 | #endif |
| 593 | |
| 594 | #define QDMA_RX 5 |
| 595 | #define PDMA_RX 0 |
| 596 | |
| 597 | |
| 598 | #endif |