blob: ab72f6c66991c10f791c4051df0848ec885c3ed3 [file] [log] [blame]
developerf9a2c032021-09-30 17:18:10 +08001/dts-v1/;
2#include "mt7986b.dtsi"
3#include "mt7986b-pinctrl.dtsi"
4#include "mt7986-snfi-nand-partition.dtsi"
5/ {
6 model = "MediaTek MT7986b RFB";
7 compatible = "mediatek,mt7986b-snfi-snand-rfb";
8 chosen {
9 bootargs = "console=ttyS0,115200n1 loglevel=8 \
10 earlycon=uart8250,mmio32,0x11002000";
11 };
12
13 memory {
14 reg = <0 0x40000000 0 0x10000000>;
15 };
16};
17
18&uart0 {
19 status = "okay";
20};
21
22/* Warning: pins shared with &snand */
23&uart1 {
24 pinctrl-names = "default";
25 pinctrl-0 = <&uart1_pins>;
26 status = "disabled";
27};
28
29/* Warning: pins shared with &spi1 */
30&uart2 {
31 pinctrl-names = "default";
32 pinctrl-0 = <&uart2_pins>;
33 status = "disabled";
34};
35
36&i2c0 {
37 pinctrl-names = "default";
38 pinctrl-0 = <&i2c_pins>;
39 status = "okay";
40};
41
42&watchdog {
43 status = "okay";
44};
45
46&eth {
47 status = "okay";
48
49 gmac0: mac@0 {
50 compatible = "mediatek,eth-mac";
51 reg = <0>;
52 phy-mode = "2500base-x";
53
54 fixed-link {
55 speed = <2500>;
56 full-duplex;
57 pause;
58 };
59 };
60
61 gmac1: mac@1 {
62 compatible = "mediatek,eth-mac";
63 reg = <1>;
64 phy-mode = "2500base-x";
65
66 fixed-link {
67 speed = <2500>;
68 full-duplex;
69 pause;
70 };
71 };
72
73 mdio: mdio-bus {
74 #address-cells = <1>;
75 #size-cells = <0>;
76
77 phy5: phy@5 {
78 compatible = "ethernet-phy-id67c9.de0a";
79 reg = <5>;
80 reset-gpios = <&pio 6 1>;
81 reset-deassert-us = <20000>;
82 phy-mode = "2500base-x";
83 };
84
85 phy6: phy@6 {
86 compatible = "ethernet-phy-id67c9.de0a";
87 reg = <6>;
88 phy-mode = "2500base-x";
89 };
90
91 switch@0 {
92 compatible = "mediatek,mt7531";
93 reg = <31>;
94 reset-gpios = <&pio 5 0>;
95
96 ports {
97 #address-cells = <1>;
98 #size-cells = <0>;
99
100 port@0 {
101 reg = <0>;
102 label = "lan0";
103 };
104
105 port@1 {
106 reg = <1>;
107 label = "lan1";
108 };
109
110 port@2 {
111 reg = <2>;
112 label = "lan2";
113 };
114
115 port@3 {
116 reg = <3>;
117 label = "lan3";
118 };
119
120 port@4 {
121 reg = <4>;
122 label = "lan4";
123 };
124
125 port@5 {
126 reg = <5>;
127 label = "lan5";
128 phy-mode = "2500base-x";
129
130 fixed-link {
131 speed = <2500>;
132 full-duplex;
133 pause;
134 };
135 };
136
137 port@6 {
138 reg = <6>;
139 label = "cpu";
140 ethernet = <&gmac0>;
141 phy-mode = "2500base-x";
142
143 fixed-link {
144 speed = <2500>;
145 full-duplex;
146 pause;
147 };
148 };
149 };
150 };
151 };
152};
153
154&hnat {
155 mtketh-wan = "eth1";
156 mtketh-lan = "lan";
157 mtketh-max-gmac = <2>;
158 status = "okay";
159};
160
161/* Warning: pins shared with &uart1 */
162&snand {
163 pinctrl-names = "default";
164 pinctrl-0 = <&snfi_pins>;
165 mediatek,quad-spi;
166 status = "okay";
167
168 partitions {
169 compatible = "fixed-partitions";
170 #address-cells = <1>;
171 #size-cells = <1>;
172 };
173};
174
175/* Warning: pins shared with &uart2 */
176&spi1 {
177 pinctrl-names = "default";
178 pinctrl-0 = <&spic_pins>;
179 status = "okay";
180};
181
182&wbsys {
183 mediatek,mtd-eeprom = <&factory 0x0000>;
184 status = "okay";
185};
186
187&pio {
188 snfi_pins: snfi-pins-23-to-28 {
189 mux {
190 function = "flash";
191 groups = "snfi";
192 };
193 conf-clk {
194 pins = "SPI0_CLK";
195 drive-strength = <MTK_DRIVE_8mA>;
196 mediatek,pull-down-adv = <0>; /* bias-disable */
197 };
198 conf-pu {
199 pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
200 drive-strength = <MTK_DRIVE_6mA>;
201 mediatek,pull-up-adv = <0>; /* bias-disable */
202 };
203 conf-pd {
204 pins = "SPI0_MOSI", "SPI0_MISO";
205 drive-strength = <MTK_DRIVE_6mA>;
206 mediatek,pull-down-adv = <0>; /* bias-disable */
207 };
208 };
209};