blob: c806566d5a64920d0e227f3e6672e332cc0bca15 [file] [log] [blame]
developerfd40db22021-04-29 10:08:25 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2018 MediaTek Inc.
4 */
5
6#include "mt753x.h"
7#include "mt753x_regs.h"
8
9struct mt753x_mapping mt753x_def_mapping[] = {
10 {
11 .name = "llllw",
12 .pvids = { 1, 1, 1, 1, 2, 2, 1 },
13 .members = { 0, 0x4f, 0x30 },
14 .etags = { 0, 0, 0 },
15 .vids = { 0, 1, 2 },
16 }, {
17 .name = "wllll",
18 .pvids = { 2, 1, 1, 1, 1, 2, 1 },
19 .members = { 0, 0x5e, 0x21 },
20 .etags = { 0, 0, 0 },
21 .vids = { 0, 1, 2 },
22 }, {
23 .name = "lwlll",
24 .pvids = { 1, 2, 1, 1, 1, 2, 1 },
25 .members = { 0, 0x5d, 0x22 },
26 .etags = { 0, 0, 0 },
27 .vids = { 0, 1, 2 },
28 },
29};
30
31void mt753x_vlan_ctrl(struct gsw_mt753x *gsw, u32 cmd, u32 val)
32{
33 int i;
34
35 mt753x_reg_write(gsw, VTCR,
36 VTCR_BUSY | ((cmd << VTCR_FUNC_S) & VTCR_FUNC_M) |
37 (val & VTCR_VID_M));
38
39 for (i = 0; i < 300; i++) {
40 u32 val = mt753x_reg_read(gsw, VTCR);
41
42 if ((val & VTCR_BUSY) == 0)
43 break;
44
45 usleep_range(1000, 1100);
46 }
47
48 if (i == 300)
49 dev_info(gsw->dev, "vtcr timeout\n");
50}
51
52static void mt753x_write_vlan_entry(struct gsw_mt753x *gsw, int vlan, u16 vid,
53 u8 ports, u8 etags)
54{
55 int port;
56 u32 val;
57
58 /* vlan port membership */
59 if (ports)
60 mt753x_reg_write(gsw, VAWD1,
61 IVL_MAC | VTAG_EN | VENTRY_VALID |
62 ((ports << PORT_MEM_S) & PORT_MEM_M));
63 else
64 mt753x_reg_write(gsw, VAWD1, 0);
65
66 /* egress mode */
67 val = 0;
68 for (port = 0; port < MT753X_NUM_PORTS; port++) {
69 if (etags & BIT(port))
70 val |= ETAG_CTRL_TAG << PORT_ETAG_S(port);
71 else
72 val |= ETAG_CTRL_UNTAG << PORT_ETAG_S(port);
73 }
74 mt753x_reg_write(gsw, VAWD2, val);
75
76 /* write to vlan table */
77 mt753x_vlan_ctrl(gsw, VTCR_WRITE_VLAN_ENTRY, vid);
78}
79
80void mt753x_apply_vlan_config(struct gsw_mt753x *gsw)
81{
82 int i, j;
83 u8 tag_ports;
84 u8 untag_ports;
85
86 /* set all ports as security mode */
87 for (i = 0; i < MT753X_NUM_PORTS; i++)
88 mt753x_reg_write(gsw, PCR(i),
89 PORT_MATRIX_M | SECURITY_MODE);
90
91 /* check if a port is used in tag/untag vlan egress mode */
92 tag_ports = 0;
93 untag_ports = 0;
94
95 for (i = 0; i < MT753X_NUM_VLANS; i++) {
96 u8 member = gsw->vlan_entries[i].member;
97 u8 etags = gsw->vlan_entries[i].etags;
98
99 if (!member)
100 continue;
101
102 for (j = 0; j < MT753X_NUM_PORTS; j++) {
103 if (!(member & BIT(j)))
104 continue;
105
106 if (etags & BIT(j))
107 tag_ports |= 1u << j;
108 else
109 untag_ports |= 1u << j;
110 }
111 }
112
113 /* set all untag-only ports as transparent and the rest as user port */
114 for (i = 0; i < MT753X_NUM_PORTS; i++) {
115 u32 pvc_mode = 0x8100 << STAG_VPID_S;
116
117 if (untag_ports & BIT(i) && !(tag_ports & BIT(i)))
118 pvc_mode = (0x8100 << STAG_VPID_S) |
119 (VA_TRANSPARENT_PORT << VLAN_ATTR_S);
120
121 if ((gsw->port5_cfg.stag_on && i == 5) ||
122 (gsw->port6_cfg.stag_on && i == 6))
123 pvc_mode = (0x8100 << STAG_VPID_S) | PVC_PORT_STAG;
124
125 mt753x_reg_write(gsw, PVC(i), pvc_mode);
126 }
127
128 /* first clear the switch vlan table */
129 for (i = 0; i < MT753X_NUM_VLANS; i++)
130 mt753x_write_vlan_entry(gsw, i, i, 0, 0);
131
132 /* now program only vlans with members to avoid
133 * clobbering remapped entries in later iterations
134 */
135 for (i = 0; i < MT753X_NUM_VLANS; i++) {
136 u16 vid = gsw->vlan_entries[i].vid;
137 u8 member = gsw->vlan_entries[i].member;
138 u8 etags = gsw->vlan_entries[i].etags;
139
140 if (member)
141 mt753x_write_vlan_entry(gsw, i, vid, member, etags);
142 }
143
144 /* Port Default PVID */
145 for (i = 0; i < MT753X_NUM_PORTS; i++) {
146 int vlan = gsw->port_entries[i].pvid;
147 u16 pvid = 0;
148 u32 val;
149
150 if (vlan < MT753X_NUM_VLANS && gsw->vlan_entries[vlan].member)
151 pvid = gsw->vlan_entries[vlan].vid;
152
153 val = mt753x_reg_read(gsw, PPBV1(i));
154 val &= ~GRP_PORT_VID_M;
155 val |= pvid;
156 mt753x_reg_write(gsw, PPBV1(i), val);
157 }
158}
159
160struct mt753x_mapping *mt753x_find_mapping(struct device_node *np)
161{
162 const char *map;
163 int i;
164
165 if (of_property_read_string(np, "mediatek,portmap", &map))
166 return NULL;
167
168 for (i = 0; i < ARRAY_SIZE(mt753x_def_mapping); i++)
169 if (!strcmp(map, mt753x_def_mapping[i].name))
170 return &mt753x_def_mapping[i];
171
172 return NULL;
173}
174
175void mt753x_apply_mapping(struct gsw_mt753x *gsw, struct mt753x_mapping *map)
176{
177 int i = 0;
178
179 for (i = 0; i < MT753X_NUM_PORTS; i++)
180 gsw->port_entries[i].pvid = map->pvids[i];
181
182 for (i = 0; i < MT753X_NUM_VLANS; i++) {
183 gsw->vlan_entries[i].member = map->members[i];
184 gsw->vlan_entries[i].etags = map->etags[i];
185 gsw->vlan_entries[i].vid = map->vids[i];
186 }
187}