developer | ba28e03 | 2021-12-07 10:40:00 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * xHCI host controller toolkit driver for chgdt-en |
| 4 | * |
| 5 | * Copyright (C) 2021 MediaTek Inc. |
| 6 | * |
| 7 | * Author: Zhanyong Wang <zhanyong.wang@mediatek.com> |
| 8 | */ |
| 9 | |
| 10 | #include <linux/platform_device.h> |
| 11 | #include <linux/module.h> |
| 12 | #include <linux/slab.h> |
| 13 | #include <linux/usb.h> |
| 14 | #include "xhci-mtk.h" |
| 15 | #include "xhci-mtk-test.h" |
| 16 | #include "xhci-mtk-unusual.h" |
| 17 | |
| 18 | static ssize_t RG_CHGDT_EN_show(struct device *dev, |
| 19 | struct device_attribute *attr, char *buf) |
| 20 | { |
| 21 | struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev); |
| 22 | struct usb_hcd *hcd = mtk->hcd; |
| 23 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
developer | abd06d7 | 2022-03-03 16:13:41 +0800 | [diff] [blame] | 24 | struct device_node *node = dev->of_node; |
developer | ba28e03 | 2021-12-07 10:40:00 +0800 | [diff] [blame] | 25 | ssize_t cnt = 0; |
| 26 | void __iomem *addr; |
| 27 | u32 val; |
| 28 | u32 i; |
| 29 | int ports; |
| 30 | char str[32]; |
| 31 | int index = 0; |
| 32 | u32 io, length; |
| 33 | int ret; |
| 34 | |
| 35 | ports = mtk->num_u3_ports + mtk->num_u2_ports; |
| 36 | cnt += sprintf(buf + cnt, " RG_CHGDT_EN usage:\n"); |
| 37 | cnt += sprintf(buf + cnt, |
| 38 | " echo u2p index 1b0 > RG_CHGDT_EN\n"); |
| 39 | if (mtk->num_u3_ports + 1 != ports) |
| 40 | cnt += sprintf(buf + cnt, " parameter: u2p: %i ~ %i\n", |
| 41 | mtk->num_u3_ports + 1, ports); |
| 42 | else |
| 43 | cnt += sprintf(buf + cnt, " parameter: u2p: %i\n", |
| 44 | mtk->num_u3_ports + 1); |
| 45 | if (mtk->num_u2_ports > 1) |
| 46 | cnt += sprintf(buf + cnt, " parameter: index: 0 ~ %i\n", |
| 47 | mtk->num_u2_ports); |
| 48 | else |
| 49 | cnt += sprintf(buf + cnt, " parameter: index: 0\n"); |
| 50 | |
| 51 | cnt += sprintf(buf + cnt, " e.g.: echo 2 0 1b1 > RG_CHGDT_EN\n"); |
| 52 | cnt += sprintf(buf + cnt, |
| 53 | " port2 binding phy 0, enable 1b'1 as CHGDT_EN\n"); |
| 54 | |
| 55 | cnt += sprintf(buf + cnt, |
| 56 | "\n=========current HQA setting check=========\n"); |
| 57 | for (i = 1; i <= ports; i++) { |
| 58 | addr = &xhci->op_regs->port_status_base + |
| 59 | NUM_PORT_REGS * ((i - 1) & 0xff); |
| 60 | val = readl(addr); |
| 61 | if (i <= mtk->num_u3_ports) { |
| 62 | cnt += sprintf(buf + cnt, |
| 63 | "USB30 Port%i: 0x%08X\n", i, val); |
| 64 | } else { |
| 65 | cnt += sprintf(buf + cnt, |
| 66 | "USB20 Port%i: 0x%08X\n", i, val); |
| 67 | |
developer | abd06d7 | 2022-03-03 16:13:41 +0800 | [diff] [blame] | 68 | ret = query_phy_addr(node, |
| 69 | &index, &io, &length, PHY_TYPE_USB2); |
developer | ba28e03 | 2021-12-07 10:40:00 +0800 | [diff] [blame] | 70 | if (ret && ret != -EACCES) { |
| 71 | if (ret == -EPERM) |
| 72 | cnt += sprintf(buf + cnt, |
| 73 | "USB20 Port%i (Phy%i: absent)\n", |
| 74 | i, index); |
| 75 | else |
| 76 | cnt += sprintf(buf + cnt, |
| 77 | "USB20 Port%i (Phy%i) failure %i\n", |
| 78 | i, index, ret); |
| 79 | continue; |
| 80 | } |
| 81 | |
| 82 | cnt += sprintf(buf + cnt, |
| 83 | "USB20 Port%i (Phy%i:%sable): 0x%08X 0x%08X\n", |
| 84 | i, index, ret ? " dis" : " en", io, length); |
| 85 | |
| 86 | addr = ioremap_nocache(io, length); |
| 87 | addr += (length != 0x100) ? 0x300 : 0; |
| 88 | |
| 89 | HQA_INFORMACTION_COLLECTS(); |
| 90 | |
| 91 | iounmap(addr); |
| 92 | index ++; |
| 93 | } |
| 94 | } |
| 95 | |
| 96 | if (mtk->hqa_pos) { |
| 97 | cnt += sprintf(buf + cnt, "%s", mtk->hqa_buf); |
| 98 | mtk->hqa_pos = 0; |
| 99 | } |
| 100 | |
| 101 | return cnt; |
| 102 | } |
| 103 | |
| 104 | static ssize_t RG_CHGDT_EN_store(struct device *dev, |
| 105 | struct device_attribute *attr, |
| 106 | const char *buf, size_t n) |
| 107 | { |
| 108 | u32 val; |
| 109 | u32 io; |
| 110 | u32 length; |
| 111 | int ports; |
| 112 | int words; |
| 113 | int port; |
| 114 | int index; |
| 115 | int ret; |
| 116 | char *str = NULL; |
| 117 | void __iomem *addr; |
| 118 | struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev); |
| 119 | struct device_node *node = dev->of_node; |
| 120 | |
| 121 | ports = mtk->num_u3_ports + mtk->num_u2_ports; |
| 122 | mtk->hqa_pos = 0; |
| 123 | |
| 124 | memset(mtk->hqa_buf, 0, mtk->hqa_size); |
| 125 | |
| 126 | str = kzalloc(n, GFP_ATOMIC); |
| 127 | |
| 128 | hqa_info(mtk, "RG_CHGDT_EN(%lu): %s\n", n, buf); |
| 129 | |
| 130 | words = sscanf(buf, "%i %i 1b%1[0,1]", &port, &index, str); |
| 131 | if ((words != 3) || |
| 132 | (port < mtk->num_u3_ports || port > ports)) { |
| 133 | hqa_info(mtk, "Check params(%i):\" %i %i %s\", Please!\n", |
| 134 | words, port, index, str); |
| 135 | |
| 136 | ret = -EINVAL; |
| 137 | goto error; |
| 138 | } |
| 139 | |
| 140 | hqa_info(mtk, " params: %i %i %s\n", |
| 141 | port, index, str); |
| 142 | |
developer | abd06d7 | 2022-03-03 16:13:41 +0800 | [diff] [blame] | 143 | ret = query_phy_addr(node, &index, &io, &length, PHY_TYPE_USB2); |
developer | ba28e03 | 2021-12-07 10:40:00 +0800 | [diff] [blame] | 144 | if (ret && ret != -EACCES) |
| 145 | goto error; |
| 146 | |
| 147 | io += (length != 0x100) ? 0x300 : 0; |
| 148 | io += USB20_PHY_U2PHYBC12C; |
| 149 | |
| 150 | addr = ioremap_nocache(io, 4); |
| 151 | val = binary_write_width1(addr, SHFT_RG_CHGDT_EN, str); |
| 152 | hqa_info(mtk, "Port%i(Phy%i)[0x%08X]: 0x%08X but 0x%08X\n", |
| 153 | port, index, io, val, readl(addr)); |
| 154 | |
| 155 | iounmap(addr); |
| 156 | ret = n; |
| 157 | |
| 158 | error: |
| 159 | kfree(str); |
| 160 | return ret; |
| 161 | } |
| 162 | DEVICE_ATTR_RW(RG_CHGDT_EN); |