developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 1 | From 4d055393b680ce616cb96f75cca154016cfb9a68 Mon Sep 17 00:00:00 2001 |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 2 | From: Bo Jiao <Bo.Jiao@mediatek.com> |
| 3 | Date: Fri, 19 May 2023 14:16:50 +0800 |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 4 | Subject: [PATCH 16/98] wifi: mt76: mt7996: add firmware WA's coredump. |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 5 | |
| 6 | Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com> |
| 7 | Change-Id: I51f115b4ae15bc0f871f93652570d72511dbf880 |
| 8 | --- |
| 9 | mt7996/coredump.c | 180 ++++++++++++++++++++++++++++++---------------- |
| 10 | mt7996/coredump.h | 35 ++++++--- |
| 11 | mt7996/mac.c | 31 +++++--- |
| 12 | mt7996/mcu.c | 5 ++ |
| 13 | mt7996/mt7996.h | 7 +- |
| 14 | mt7996/regs.h | 7 +- |
| 15 | 6 files changed, 182 insertions(+), 83 deletions(-) |
| 16 | |
| 17 | diff --git a/mt7996/coredump.c b/mt7996/coredump.c |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 18 | index ccab0d7..60b8808 100644 |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 19 | --- a/mt7996/coredump.c |
| 20 | +++ b/mt7996/coredump.c |
| 21 | @@ -7,11 +7,11 @@ |
| 22 | #include <linux/utsname.h> |
| 23 | #include "coredump.h" |
| 24 | |
| 25 | -static bool coredump_memdump; |
| 26 | +static bool coredump_memdump = true; |
| 27 | module_param(coredump_memdump, bool, 0644); |
| 28 | MODULE_PARM_DESC(coredump_memdump, "Optional ability to dump firmware memory"); |
| 29 | |
| 30 | -static const struct mt7996_mem_region mt7996_mem_regions[] = { |
| 31 | +static const struct mt7996_mem_region mt7996_wm_mem_regions[] = { |
| 32 | { |
| 33 | .start = 0x00800000, |
| 34 | .len = 0x0004ffff, |
| 35 | @@ -44,27 +44,55 @@ static const struct mt7996_mem_region mt7996_mem_regions[] = { |
| 36 | }, |
| 37 | }; |
| 38 | |
| 39 | +static const struct mt7996_mem_region mt7996_wa_mem_regions[] = { |
| 40 | + { |
| 41 | + .start = 0xE0000000, |
| 42 | + .len = 0x0000ffff, |
| 43 | + .name = "CRAM", |
| 44 | + }, |
| 45 | + { |
| 46 | + .start = 0xE0010000, |
| 47 | + .len = 0x000117ff, |
| 48 | + .name = "CRAM2", |
| 49 | + }, |
| 50 | + { |
| 51 | + .start = 0x10000000, |
| 52 | + .len = 0x0001bfff, |
| 53 | + .name = "ILM", |
| 54 | + }, |
| 55 | + { |
| 56 | + .start = 0x10200000, |
| 57 | + .len = 0x00063fff, |
| 58 | + .name = "DLM", |
| 59 | + }, |
| 60 | +}; |
| 61 | + |
| 62 | const struct mt7996_mem_region* |
| 63 | -mt7996_coredump_get_mem_layout(struct mt7996_dev *dev, u32 *num) |
| 64 | +mt7996_coredump_get_mem_layout(struct mt7996_dev *dev, u8 type, u32 *num) |
| 65 | { |
| 66 | switch (mt76_chip(&dev->mt76)) { |
| 67 | case 0x7990: |
| 68 | case 0x7991: |
| 69 | - *num = ARRAY_SIZE(mt7996_mem_regions); |
| 70 | - return &mt7996_mem_regions[0]; |
| 71 | + if (type == MT7996_RAM_TYPE_WA) { |
| 72 | + *num = ARRAY_SIZE(mt7996_wa_mem_regions); |
| 73 | + return &mt7996_wa_mem_regions[0]; |
| 74 | + } |
| 75 | + |
| 76 | + *num = ARRAY_SIZE(mt7996_wm_mem_regions); |
| 77 | + return &mt7996_wm_mem_regions[0]; |
| 78 | default: |
| 79 | return NULL; |
| 80 | } |
| 81 | } |
| 82 | |
| 83 | -static int mt7996_coredump_get_mem_size(struct mt7996_dev *dev) |
| 84 | +static int mt7996_coredump_get_mem_size(struct mt7996_dev *dev, u8 type) |
| 85 | { |
| 86 | const struct mt7996_mem_region *mem_region; |
| 87 | size_t size = 0; |
| 88 | u32 num; |
| 89 | int i; |
| 90 | |
| 91 | - mem_region = mt7996_coredump_get_mem_layout(dev, &num); |
| 92 | + mem_region = mt7996_coredump_get_mem_layout(dev, type, &num); |
| 93 | if (!mem_region) |
| 94 | return 0; |
| 95 | |
| 96 | @@ -81,14 +109,13 @@ static int mt7996_coredump_get_mem_size(struct mt7996_dev *dev) |
| 97 | return size; |
| 98 | } |
| 99 | |
| 100 | -struct mt7996_crash_data *mt7996_coredump_new(struct mt7996_dev *dev) |
| 101 | +struct mt7996_crash_data *mt7996_coredump_new(struct mt7996_dev *dev, u8 type) |
| 102 | { |
| 103 | - struct mt7996_crash_data *crash_data = dev->coredump.crash_data; |
| 104 | + struct mt7996_crash_data *crash_data = dev->coredump.crash_data[type]; |
| 105 | |
| 106 | lockdep_assert_held(&dev->dump_mutex); |
| 107 | |
| 108 | - if (coredump_memdump && |
| 109 | - !mt76_poll_msec(dev, MT_FW_DUMP_STATE, 0x3, 0x2, 500)) |
| 110 | + if (!coredump_memdump) |
| 111 | return NULL; |
| 112 | |
| 113 | guid_gen(&crash_data->guid); |
| 114 | @@ -98,12 +125,15 @@ struct mt7996_crash_data *mt7996_coredump_new(struct mt7996_dev *dev) |
| 115 | } |
| 116 | |
| 117 | static void |
| 118 | -mt7996_coredump_fw_state(struct mt7996_dev *dev, struct mt7996_coredump *dump, |
| 119 | +mt7996_coredump_fw_state(struct mt7996_dev *dev, u8 type, struct mt7996_coredump *dump, |
| 120 | bool *exception) |
| 121 | { |
| 122 | - u32 count; |
| 123 | + u32 count, reg = MT_FW_WM_DUMP_STATE; |
| 124 | + |
| 125 | + if (type == MT7996_RAM_TYPE_WA) |
| 126 | + reg = MT_FW_WA_DUMP_STATE; |
| 127 | |
| 128 | - count = mt76_rr(dev, MT_FW_ASSERT_CNT); |
| 129 | + count = mt76_rr(dev, reg); |
| 130 | |
| 131 | /* normal mode: driver can manually trigger assertĀ for detail info */ |
| 132 | if (!count) |
| 133 | @@ -115,53 +145,59 @@ mt7996_coredump_fw_state(struct mt7996_dev *dev, struct mt7996_coredump *dump, |
| 134 | } |
| 135 | |
| 136 | static void |
| 137 | -mt7996_coredump_fw_stack(struct mt7996_dev *dev, struct mt7996_coredump *dump, |
| 138 | +mt7996_coredump_fw_stack(struct mt7996_dev *dev, u8 type, struct mt7996_coredump *dump, |
| 139 | bool exception) |
| 140 | { |
| 141 | - u32 oldest, i, idx; |
| 142 | + u32 reg, i, offset = 0, val = MT7996_RAM_TYPE_WM; |
| 143 | |
| 144 | - strscpy(dump->pc_current, "program counter", sizeof(dump->pc_current)); |
| 145 | + if (type == MT7996_RAM_TYPE_WA) { |
| 146 | + offset = MT_MCU_WA_EXCP_BASE - MT_MCU_WM_EXCP_BASE; |
| 147 | + val = MT7996_RAM_TYPE_WA; |
| 148 | + } |
| 149 | |
| 150 | - /* 0: WM PC log output */ |
| 151 | - mt76_wr(dev, MT_CONN_DBG_CTL_OUT_SEL, 0); |
| 152 | + /* 0: WM PC log output, 1: WA PC log output */ |
| 153 | + mt76_wr(dev, MT_CONN_DBG_CTL_OUT_SEL, val); |
| 154 | /* choose 33th PC log buffer to read current PC index */ |
| 155 | mt76_wr(dev, MT_CONN_DBG_CTL_PC_LOG_SEL, 0x3f); |
| 156 | |
| 157 | /* read current PC */ |
| 158 | - dump->pc_stack[0] = mt76_rr(dev, MT_CONN_DBG_CTL_PC_LOG); |
| 159 | + for (i = 0; i < 10; i++) |
| 160 | + dump->pc_cur[i] = mt76_rr(dev, MT_CONN_DBG_CTL_PC_LOG); |
| 161 | |
| 162 | /* stop call stack record */ |
| 163 | if (!exception) { |
| 164 | - mt76_clear(dev, MT_MCU_WM_EXCP_PC_CTRL, BIT(0)); |
| 165 | - mt76_clear(dev, MT_MCU_WM_EXCP_LR_CTRL, BIT(0)); |
| 166 | + mt76_clear(dev, MT_MCU_WM_EXCP_PC_CTRL + offset, BIT(0)); |
| 167 | + mt76_clear(dev, MT_MCU_WM_EXCP_LR_CTRL + offset, BIT(0)); |
| 168 | } |
| 169 | |
| 170 | - oldest = (u32)mt76_get_field(dev, MT_MCU_WM_EXCP_PC_CTRL, |
| 171 | - GENMASK(20, 16)) + 2; |
| 172 | - for (i = 0; i < 16; i++) { |
| 173 | - idx = ((oldest + 2 * i + 1) % 32); |
| 174 | - dump->pc_stack[i + 1] = |
| 175 | - mt76_rr(dev, MT_MCU_WM_EXCP_PC_LOG + idx * 4); |
| 176 | + /* read PC log */ |
| 177 | + dump->pc_dbg_ctrl = mt76_rr(dev, MT_MCU_WM_EXCP_PC_CTRL + offset); |
| 178 | + dump->pc_cur_idx = FIELD_GET(MT_MCU_WM_EXCP_PC_CTRL_IDX_STATUS, |
| 179 | + dump->pc_dbg_ctrl); |
| 180 | + for (i = 0; i < 32; i++) { |
| 181 | + reg = MT_MCU_WM_EXCP_PC_LOG + i * 4 + offset; |
| 182 | + dump->pc_stack[i] = mt76_rr(dev, reg); |
| 183 | } |
| 184 | |
| 185 | - oldest = (u32)mt76_get_field(dev, MT_MCU_WM_EXCP_LR_CTRL, |
| 186 | - GENMASK(20, 16)) + 2; |
| 187 | - for (i = 0; i < 16; i++) { |
| 188 | - idx = ((oldest + 2 * i + 1) % 32); |
| 189 | - dump->lr_stack[i] = |
| 190 | - mt76_rr(dev, MT_MCU_WM_EXCP_LR_LOG + idx * 4); |
| 191 | + /* read LR log */ |
| 192 | + dump->lr_dbg_ctrl = mt76_rr(dev, MT_MCU_WM_EXCP_LR_CTRL + offset); |
| 193 | + dump->lr_cur_idx = FIELD_GET(MT_MCU_WM_EXCP_LR_CTRL_IDX_STATUS, |
| 194 | + dump->lr_dbg_ctrl); |
| 195 | + for (i = 0; i < 32; i++) { |
| 196 | + reg = MT_MCU_WM_EXCP_LR_LOG + i * 4 + offset; |
| 197 | + dump->lr_stack[i] = mt76_rr(dev, reg); |
| 198 | } |
| 199 | |
| 200 | /* start call stack record */ |
| 201 | if (!exception) { |
| 202 | - mt76_set(dev, MT_MCU_WM_EXCP_PC_CTRL, BIT(0)); |
| 203 | - mt76_set(dev, MT_MCU_WM_EXCP_LR_CTRL, BIT(0)); |
| 204 | + mt76_set(dev, MT_MCU_WM_EXCP_PC_CTRL + offset, BIT(0)); |
| 205 | + mt76_set(dev, MT_MCU_WM_EXCP_LR_CTRL + offset, BIT(0)); |
| 206 | } |
| 207 | } |
| 208 | |
| 209 | -static struct mt7996_coredump *mt7996_coredump_build(struct mt7996_dev *dev) |
| 210 | +static struct mt7996_coredump *mt7996_coredump_build(struct mt7996_dev *dev, u8 type) |
| 211 | { |
| 212 | - struct mt7996_crash_data *crash_data = dev->coredump.crash_data; |
| 213 | + struct mt7996_crash_data *crash_data = dev->coredump.crash_data[type]; |
| 214 | struct mt7996_coredump *dump; |
| 215 | struct mt7996_coredump_mem *dump_mem; |
| 216 | size_t len, sofar = 0, hdr_len = sizeof(*dump); |
| 217 | @@ -186,20 +222,31 @@ static struct mt7996_coredump *mt7996_coredump_build(struct mt7996_dev *dev) |
| 218 | |
| 219 | dump = (struct mt7996_coredump *)(buf); |
| 220 | dump->len = len; |
| 221 | + dump->hdr_len = hdr_len; |
| 222 | |
| 223 | /* plain text */ |
| 224 | strscpy(dump->magic, "mt76-crash-dump", sizeof(dump->magic)); |
| 225 | strscpy(dump->kernel, init_utsname()->release, sizeof(dump->kernel)); |
| 226 | + strscpy(dump->fw_type, ((type == MT7996_RAM_TYPE_WA) ? "WA" : "WM"), |
| 227 | + sizeof(dump->fw_type)); |
| 228 | strscpy(dump->fw_ver, dev->mt76.hw->wiphy->fw_version, |
| 229 | sizeof(dump->fw_ver)); |
| 230 | + strscpy(dump->fw_patch_date, dev->patch_build_date, |
| 231 | + sizeof(dump->fw_patch_date)); |
| 232 | + strscpy(dump->fw_ram_date[MT7996_RAM_TYPE_WM], |
| 233 | + dev->ram_build_date[MT7996_RAM_TYPE_WM], |
| 234 | + MT7996_BUILD_TIME_LEN); |
| 235 | + strscpy(dump->fw_ram_date[MT7996_RAM_TYPE_WA], |
| 236 | + dev->ram_build_date[MT7996_RAM_TYPE_WA], |
| 237 | + MT7996_BUILD_TIME_LEN); |
| 238 | |
| 239 | guid_copy(&dump->guid, &crash_data->guid); |
| 240 | dump->tv_sec = crash_data->timestamp.tv_sec; |
| 241 | dump->tv_nsec = crash_data->timestamp.tv_nsec; |
| 242 | dump->device_id = mt76_chip(&dev->mt76); |
| 243 | |
| 244 | - mt7996_coredump_fw_state(dev, dump, &exception); |
| 245 | - mt7996_coredump_fw_stack(dev, dump, exception); |
| 246 | + mt7996_coredump_fw_state(dev, type, dump, &exception); |
| 247 | + mt7996_coredump_fw_stack(dev, type, dump, exception); |
| 248 | |
| 249 | /* gather memory content */ |
| 250 | dump_mem = (struct mt7996_coredump_mem *)(buf + sofar); |
| 251 | @@ -213,17 +260,19 @@ static struct mt7996_coredump *mt7996_coredump_build(struct mt7996_dev *dev) |
| 252 | return dump; |
| 253 | } |
| 254 | |
| 255 | -int mt7996_coredump_submit(struct mt7996_dev *dev) |
| 256 | +int mt7996_coredump_submit(struct mt7996_dev *dev, u8 type) |
| 257 | { |
| 258 | struct mt7996_coredump *dump; |
| 259 | |
| 260 | - dump = mt7996_coredump_build(dev); |
| 261 | + dump = mt7996_coredump_build(dev, type); |
| 262 | if (!dump) { |
| 263 | dev_warn(dev->mt76.dev, "no crash dump data found\n"); |
| 264 | return -ENODATA; |
| 265 | } |
| 266 | |
| 267 | dev_coredumpv(dev->mt76.dev, dump, dump->len, GFP_KERNEL); |
| 268 | + dev_info(dev->mt76.dev, "%s coredump completed\n", |
| 269 | + wiphy_name(dev->mt76.hw->wiphy)); |
| 270 | |
| 271 | return 0; |
| 272 | } |
| 273 | @@ -231,23 +280,26 @@ int mt7996_coredump_submit(struct mt7996_dev *dev) |
| 274 | int mt7996_coredump_register(struct mt7996_dev *dev) |
| 275 | { |
| 276 | struct mt7996_crash_data *crash_data; |
| 277 | + int i; |
| 278 | |
| 279 | - crash_data = vzalloc(sizeof(*dev->coredump.crash_data)); |
| 280 | - if (!crash_data) |
| 281 | - return -ENOMEM; |
| 282 | + for (i = 0; i < MT7996_COREDUMP_MAX; i++) { |
| 283 | + crash_data = vzalloc(sizeof(*dev->coredump.crash_data[i])); |
| 284 | + if (!crash_data) |
| 285 | + return -ENOMEM; |
| 286 | |
| 287 | - dev->coredump.crash_data = crash_data; |
| 288 | + dev->coredump.crash_data[i] = crash_data; |
| 289 | |
| 290 | - if (coredump_memdump) { |
| 291 | - crash_data->memdump_buf_len = mt7996_coredump_get_mem_size(dev); |
| 292 | - if (!crash_data->memdump_buf_len) |
| 293 | - /* no memory content */ |
| 294 | - return 0; |
| 295 | + if (coredump_memdump) { |
| 296 | + crash_data->memdump_buf_len = mt7996_coredump_get_mem_size(dev, i); |
| 297 | + if (!crash_data->memdump_buf_len) |
| 298 | + /* no memory content */ |
| 299 | + return 0; |
| 300 | |
| 301 | - crash_data->memdump_buf = vzalloc(crash_data->memdump_buf_len); |
| 302 | - if (!crash_data->memdump_buf) { |
| 303 | - vfree(crash_data); |
| 304 | - return -ENOMEM; |
| 305 | + crash_data->memdump_buf = vzalloc(crash_data->memdump_buf_len); |
| 306 | + if (!crash_data->memdump_buf) { |
| 307 | + vfree(crash_data); |
| 308 | + return -ENOMEM; |
| 309 | + } |
| 310 | } |
| 311 | } |
| 312 | |
| 313 | @@ -256,13 +308,17 @@ int mt7996_coredump_register(struct mt7996_dev *dev) |
| 314 | |
| 315 | void mt7996_coredump_unregister(struct mt7996_dev *dev) |
| 316 | { |
| 317 | - if (dev->coredump.crash_data->memdump_buf) { |
| 318 | - vfree(dev->coredump.crash_data->memdump_buf); |
| 319 | - dev->coredump.crash_data->memdump_buf = NULL; |
| 320 | - dev->coredump.crash_data->memdump_buf_len = 0; |
| 321 | - } |
| 322 | + int i; |
| 323 | |
| 324 | - vfree(dev->coredump.crash_data); |
| 325 | - dev->coredump.crash_data = NULL; |
| 326 | + for (i = 0; i < MT7996_COREDUMP_MAX; i++) { |
| 327 | + if (dev->coredump.crash_data[i]->memdump_buf) { |
| 328 | + vfree(dev->coredump.crash_data[i]->memdump_buf); |
| 329 | + dev->coredump.crash_data[i]->memdump_buf = NULL; |
| 330 | + dev->coredump.crash_data[i]->memdump_buf_len = 0; |
| 331 | + } |
| 332 | + |
| 333 | + vfree(dev->coredump.crash_data[i]); |
| 334 | + dev->coredump.crash_data[i] = NULL; |
| 335 | + } |
| 336 | } |
| 337 | |
| 338 | diff --git a/mt7996/coredump.h b/mt7996/coredump.h |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 339 | index af2ba21..01ed373 100644 |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 340 | --- a/mt7996/coredump.h |
| 341 | +++ b/mt7996/coredump.h |
| 342 | @@ -6,10 +6,13 @@ |
| 343 | |
| 344 | #include "mt7996.h" |
| 345 | |
| 346 | +#define MT7996_COREDUMP_MAX (MT7996_RAM_TYPE_WA + 1) |
| 347 | + |
| 348 | struct mt7996_coredump { |
| 349 | char magic[16]; |
| 350 | |
| 351 | u32 len; |
| 352 | + u32 hdr_len; |
| 353 | |
| 354 | guid_t guid; |
| 355 | |
| 356 | @@ -21,17 +24,28 @@ struct mt7996_coredump { |
| 357 | char kernel[64]; |
| 358 | /* firmware version */ |
| 359 | char fw_ver[ETHTOOL_FWVERS_LEN]; |
| 360 | + char fw_patch_date[MT7996_BUILD_TIME_LEN]; |
| 361 | + char fw_ram_date[MT7996_COREDUMP_MAX][MT7996_BUILD_TIME_LEN]; |
| 362 | |
| 363 | u32 device_id; |
| 364 | |
| 365 | + /* fw type */ |
| 366 | + char fw_type[8]; |
| 367 | + |
| 368 | /* exception state */ |
| 369 | char fw_state[12]; |
| 370 | |
| 371 | /* program counters */ |
| 372 | - char pc_current[16]; |
| 373 | - u32 pc_stack[17]; |
| 374 | - /* link registers */ |
| 375 | - u32 lr_stack[16]; |
| 376 | + u32 pc_dbg_ctrl; |
| 377 | + u32 pc_cur_idx; |
| 378 | + u32 pc_cur[10]; |
| 379 | + /* PC registers */ |
| 380 | + u32 pc_stack[32]; |
| 381 | + |
| 382 | + u32 lr_dbg_ctrl; |
| 383 | + u32 lr_cur_idx; |
| 384 | + /* LR registers */ |
| 385 | + u32 lr_stack[32]; |
| 386 | |
| 387 | /* memory content */ |
| 388 | u8 data[]; |
| 389 | @@ -43,6 +57,7 @@ struct mt7996_coredump_mem { |
| 390 | } __packed; |
| 391 | |
| 392 | struct mt7996_mem_hdr { |
| 393 | + char name[64]; |
| 394 | u32 start; |
| 395 | u32 len; |
| 396 | u8 data[]; |
| 397 | @@ -58,27 +73,27 @@ struct mt7996_mem_region { |
| 398 | #ifdef CONFIG_DEV_COREDUMP |
| 399 | |
| 400 | const struct mt7996_mem_region * |
| 401 | -mt7996_coredump_get_mem_layout(struct mt7996_dev *dev, u32 *num); |
| 402 | -struct mt7996_crash_data *mt7996_coredump_new(struct mt7996_dev *dev); |
| 403 | -int mt7996_coredump_submit(struct mt7996_dev *dev); |
| 404 | +mt7996_coredump_get_mem_layout(struct mt7996_dev *dev, u8 type, u32 *num); |
| 405 | +struct mt7996_crash_data *mt7996_coredump_new(struct mt7996_dev *dev, u8 type); |
| 406 | +int mt7996_coredump_submit(struct mt7996_dev *dev, u8 type); |
| 407 | int mt7996_coredump_register(struct mt7996_dev *dev); |
| 408 | void mt7996_coredump_unregister(struct mt7996_dev *dev); |
| 409 | |
| 410 | #else /* CONFIG_DEV_COREDUMP */ |
| 411 | |
| 412 | static inline const struct mt7996_mem_region * |
| 413 | -mt7996_coredump_get_mem_layout(struct mt7996_dev *dev, u32 *num) |
| 414 | +mt7996_coredump_get_mem_layout(struct mt7996_dev *dev, u8 type, u32 *num) |
| 415 | { |
| 416 | return NULL; |
| 417 | } |
| 418 | |
| 419 | -static inline int mt7996_coredump_submit(struct mt7996_dev *dev) |
| 420 | +static inline int mt7996_coredump_submit(struct mt7996_dev *dev, u8 type) |
| 421 | { |
| 422 | return 0; |
| 423 | } |
| 424 | |
| 425 | static inline struct |
| 426 | -mt7996_crash_data *mt7996_coredump_new(struct mt7996_dev *dev) |
| 427 | +mt7996_crash_data *mt7996_coredump_new(struct mt7996_dev *dev, u8 type) |
| 428 | { |
| 429 | return NULL; |
| 430 | } |
| 431 | diff --git a/mt7996/mac.c b/mt7996/mac.c |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 432 | index ccb7b22..066955e 100644 |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 433 | --- a/mt7996/mac.c |
| 434 | +++ b/mt7996/mac.c |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 435 | @@ -1962,28 +1962,25 @@ void mt7996_mac_reset_work(struct work_struct *work) |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 436 | } |
| 437 | |
| 438 | /* firmware coredump */ |
| 439 | -void mt7996_mac_dump_work(struct work_struct *work) |
| 440 | +void mt7996_mac_fw_coredump(struct mt7996_dev *dev, u8 type) |
| 441 | { |
| 442 | const struct mt7996_mem_region *mem_region; |
| 443 | struct mt7996_crash_data *crash_data; |
| 444 | - struct mt7996_dev *dev; |
| 445 | struct mt7996_mem_hdr *hdr; |
| 446 | size_t buf_len; |
| 447 | int i; |
| 448 | u32 num; |
| 449 | u8 *buf; |
| 450 | |
| 451 | - dev = container_of(work, struct mt7996_dev, dump_work); |
| 452 | - |
| 453 | mutex_lock(&dev->dump_mutex); |
| 454 | |
| 455 | - crash_data = mt7996_coredump_new(dev); |
| 456 | + crash_data = mt7996_coredump_new(dev, type); |
| 457 | if (!crash_data) { |
| 458 | mutex_unlock(&dev->dump_mutex); |
| 459 | - goto skip_coredump; |
| 460 | + return; |
| 461 | } |
| 462 | |
| 463 | - mem_region = mt7996_coredump_get_mem_layout(dev, &num); |
| 464 | + mem_region = mt7996_coredump_get_mem_layout(dev, type, &num); |
| 465 | if (!mem_region || !crash_data->memdump_buf_len) { |
| 466 | mutex_unlock(&dev->dump_mutex); |
| 467 | goto skip_memdump; |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 468 | @@ -1993,6 +1990,9 @@ void mt7996_mac_dump_work(struct work_struct *work) |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 469 | buf_len = crash_data->memdump_buf_len; |
| 470 | |
| 471 | /* dumping memory content... */ |
| 472 | + dev_info(dev->mt76.dev, "%s start coredump for %s\n", |
| 473 | + wiphy_name(dev->mt76.hw->wiphy), |
| 474 | + ((type == MT7996_RAM_TYPE_WA) ? "WA" : "WM")); |
| 475 | memset(buf, 0, buf_len); |
| 476 | for (i = 0; i < num; i++) { |
| 477 | if (mem_region->len > buf_len) { |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 478 | @@ -2009,6 +2009,7 @@ void mt7996_mac_dump_work(struct work_struct *work) |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 479 | mt7996_memcpy_fromio(dev, buf, mem_region->start, |
| 480 | mem_region->len); |
| 481 | |
| 482 | + strscpy(hdr->name, mem_region->name, sizeof(mem_region->name)); |
| 483 | hdr->start = mem_region->start; |
| 484 | hdr->len = mem_region->len; |
| 485 | |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 486 | @@ -2025,8 +2026,20 @@ void mt7996_mac_dump_work(struct work_struct *work) |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 487 | mutex_unlock(&dev->dump_mutex); |
| 488 | |
| 489 | skip_memdump: |
| 490 | - mt7996_coredump_submit(dev); |
| 491 | -skip_coredump: |
| 492 | + mt7996_coredump_submit(dev, type); |
| 493 | +} |
| 494 | + |
| 495 | +void mt7996_mac_dump_work(struct work_struct *work) |
| 496 | +{ |
| 497 | + struct mt7996_dev *dev; |
| 498 | + |
| 499 | + dev = container_of(work, struct mt7996_dev, dump_work); |
| 500 | + if (READ_ONCE(dev->recovery.state) & MT_MCU_CMD_WA_WDT) |
| 501 | + mt7996_mac_fw_coredump(dev, MT7996_RAM_TYPE_WA); |
| 502 | + |
| 503 | + if (READ_ONCE(dev->recovery.state) & MT_MCU_CMD_WM_WDT) |
| 504 | + mt7996_mac_fw_coredump(dev, MT7996_RAM_TYPE_WM); |
| 505 | + |
| 506 | queue_work(dev->mt76.wq, &dev->reset_work); |
| 507 | } |
| 508 | |
| 509 | diff --git a/mt7996/mcu.c b/mt7996/mcu.c |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 510 | index ee1915c..2c611e7 100644 |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 511 | --- a/mt7996/mcu.c |
| 512 | +++ b/mt7996/mcu.c |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 513 | @@ -2458,6 +2458,8 @@ static int mt7996_load_patch(struct mt7996_dev *dev) |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 514 | |
| 515 | dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", |
| 516 | be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); |
| 517 | + memcpy(dev->patch_build_date, hdr->build_date, |
| 518 | + sizeof(dev->patch_build_date)); |
| 519 | |
| 520 | for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { |
| 521 | struct mt7996_patch_sec *sec; |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 522 | @@ -2584,6 +2586,9 @@ static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type, |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 523 | } |
| 524 | |
| 525 | hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); |
| 526 | + memcpy(dev->ram_build_date[ram_type], |
| 527 | + hdr->build_date, |
| 528 | + sizeof(dev->ram_build_date[ram_type])); |
| 529 | dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n", |
| 530 | fw_type, hdr->fw_ver, hdr->build_date); |
| 531 | |
| 532 | diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 533 | index c0ceef0..0bb20a9 100644 |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 534 | --- a/mt7996/mt7996.h |
| 535 | +++ b/mt7996/mt7996.h |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 536 | @@ -57,6 +57,8 @@ |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 537 | #define MT7996_CRIT_TEMP 110 |
| 538 | #define MT7996_MAX_TEMP 120 |
| 539 | |
| 540 | +#define MT7996_BUILD_TIME_LEN 24 |
| 541 | + |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 542 | #define MT7996_RRO_MAX_SESSION 1024 |
| 543 | #define MT7996_RRO_WINDOW_MAX_LEN 1024 |
| 544 | #define MT7996_RRO_ADDR_ELEM_LEN 128 |
| 545 | @@ -82,6 +84,7 @@ enum mt7996_ram_type { |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 546 | MT7996_RAM_TYPE_WM, |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 547 | MT7996_RAM_TYPE_WA, |
| 548 | MT7996_RAM_TYPE_DSP, |
| 549 | + __MT7996_RAM_TYPE_MAX, |
| 550 | }; |
| 551 | |
| 552 | enum mt7996_txq_id { |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 553 | @@ -265,9 +268,11 @@ struct mt7996_dev { |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 554 | struct mutex dump_mutex; |
| 555 | #ifdef CONFIG_DEV_COREDUMP |
| 556 | struct { |
| 557 | - struct mt7996_crash_data *crash_data; |
| 558 | + struct mt7996_crash_data *crash_data[__MT7996_RAM_TYPE_MAX]; |
| 559 | } coredump; |
| 560 | #endif |
| 561 | + char patch_build_date[MT7996_BUILD_TIME_LEN]; |
| 562 | + char ram_build_date[__MT7996_RAM_TYPE_MAX][MT7996_BUILD_TIME_LEN]; |
| 563 | |
| 564 | struct list_head sta_rc_list; |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 565 | struct list_head twt_list; |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 566 | diff --git a/mt7996/regs.h b/mt7996/regs.h |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 567 | index f7c99cd..bd0eb51 100644 |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 568 | --- a/mt7996/regs.h |
| 569 | +++ b/mt7996/regs.h |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 570 | @@ -548,7 +548,8 @@ enum base_rev { |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 571 | |
| 572 | /* FW MODE SYNC */ |
| 573 | #define MT_FW_ASSERT_CNT 0x02208274 |
| 574 | -#define MT_FW_DUMP_STATE 0x02209e90 |
| 575 | +#define MT_FW_WM_DUMP_STATE 0x02209e90 |
| 576 | +#define MT_FW_WA_DUMP_STATE 0x7C05B080 |
| 577 | |
| 578 | #define MT_SWDEF_BASE 0x00401400 |
| 579 | |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 580 | @@ -656,11 +657,15 @@ enum base_rev { |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 581 | #define MT_WF_PHYRX_CSD_BAND_RXTD12_IRPI_SW_CLR BIT(29) |
| 582 | |
| 583 | /* CONN MCU EXCP CON */ |
| 584 | +#define MT_MCU_WA_EXCP_BASE 0x890d0000 |
| 585 | #define MT_MCU_WM_EXCP_BASE 0x89050000 |
| 586 | + |
| 587 | #define MT_MCU_WM_EXCP(ofs) (MT_MCU_WM_EXCP_BASE + (ofs)) |
| 588 | #define MT_MCU_WM_EXCP_PC_CTRL MT_MCU_WM_EXCP(0x100) |
| 589 | +#define MT_MCU_WM_EXCP_PC_CTRL_IDX_STATUS GENMASK(20, 16) |
| 590 | #define MT_MCU_WM_EXCP_PC_LOG MT_MCU_WM_EXCP(0x104) |
| 591 | #define MT_MCU_WM_EXCP_LR_CTRL MT_MCU_WM_EXCP(0x200) |
| 592 | +#define MT_MCU_WM_EXCP_LR_CTRL_IDX_STATUS GENMASK(20, 16) |
| 593 | #define MT_MCU_WM_EXCP_LR_LOG MT_MCU_WM_EXCP(0x204) |
| 594 | |
| 595 | #endif |
| 596 | -- |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 597 | 2.18.0 |
developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 598 | |