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git01.mediatek.com / openwrt / feeds / mtk-openwrt-feeds / f0345dcb74877d2e8090fc76a176cf1b3b58b30c / . / target / linux / mediatek / patches-5.4 / 0671-add-micron-MT29F4G01ABAFD-spi-nand-support.c
blob: 40833c010276e123e8cd3f8d3355336330a69bf9 [file] [log] [blame]
developeref13b3d2021-10-29 18:25:44 +0800[diff] [blame]1--- a/drivers/mtd/nand/spi/micron.c
2+++ b/drivers/mtd/nand/spi/micron.c
3@@ -18,7 +18,9 @@
4 #define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4)
5 #define MICRON_STATUS_ECC_7TO8_BITFLIPS (5 << 4)
6
7-static SPINAND_OP_VARIANTS(read_cache_variants,
8+#define MICRON_CFG_CR BIT(0)
9+
10+static SPINAND_OP_VARIANTS(quadio_read_cache_variants,
11 SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
12 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
13 SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
14@@ -26,46 +28,46 @@ static SPINAND_OP_VARIANTS(read_cache_va
15 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
16 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
17
18-static SPINAND_OP_VARIANTS(write_cache_variants,
19+static SPINAND_OP_VARIANTS(x4_write_cache_variants,
20 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
21 SPINAND_PROG_LOAD(true, 0, NULL, 0));
22
23-static SPINAND_OP_VARIANTS(update_cache_variants,
24+static SPINAND_OP_VARIANTS(x4_update_cache_variants,
25 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
26 SPINAND_PROG_LOAD(false, 0, NULL, 0));
27
28-static int mt29f2g01abagd_ooblayout_ecc(struct mtd_info *mtd, int section,
29- struct mtd_oob_region *region)
30+static int micron_8_ooblayout_ecc(struct mtd_info *mtd, int section,
31+ struct mtd_oob_region *region)
32 {
33 if (section)
34 return -ERANGE;
35
36- region->offset = 64;
37- region->length = 64;
38+ region->offset = mtd->oobsize / 2;
39+ region->length = mtd->oobsize / 2;
40
41 return 0;
42 }
43
44-static int mt29f2g01abagd_ooblayout_free(struct mtd_info *mtd, int section,
45- struct mtd_oob_region *region)
46+static int micron_8_ooblayout_free(struct mtd_info *mtd, int section,
47+ struct mtd_oob_region *region)
48 {
49 if (section)
50 return -ERANGE;
51
52 /* Reserve 2 bytes for the BBM. */
53 region->offset = 2;
54- region->length = 62;
55+ region->length = (mtd->oobsize / 2) - 2;
56
57 return 0;
58 }
59
60-static const struct mtd_ooblayout_ops mt29f2g01abagd_ooblayout = {
61- .ecc = mt29f2g01abagd_ooblayout_ecc,
62- .free = mt29f2g01abagd_ooblayout_free,
63+static const struct mtd_ooblayout_ops micron_8_ooblayout = {
64+ .ecc = micron_8_ooblayout_ecc,
65+ .free = micron_8_ooblayout_free,
66 };
67
68-static int mt29f2g01abagd_ecc_get_status(struct spinand_device *spinand,
69- u8 status)
70+static int micron_8_ecc_get_status(struct spinand_device *spinand,
71+ u8 status)
72 {
73 switch (status & MICRON_STATUS_ECC_MASK) {
74 case STATUS_ECC_NO_BITFLIPS:
75@@ -94,12 +96,21 @@ static const struct spinand_info micron_
76 SPINAND_INFO("MT29F2G01ABAGD", 0x24,
77 NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
78 NAND_ECCREQ(8, 512),
79- SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
80- &write_cache_variants,
81- &update_cache_variants),
82+ SPINAND_INFO_OP_VARIANTS(&quadio_read_cache_variants,
83+ &x4_write_cache_variants,
84+ &x4_update_cache_variants),
85 0,
86- SPINAND_ECCINFO(&mt29f2g01abagd_ooblayout,
87- mt29f2g01abagd_ecc_get_status)),
88+ SPINAND_ECCINFO(&micron_8_ooblayout,
89+ micron_8_ecc_get_status)),
90+ SPINAND_INFO("MT29F4G01ABAFD", 0x34,
91+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
92+ NAND_ECCREQ(8, 512),
93+ SPINAND_INFO_OP_VARIANTS(&quadio_read_cache_variants,
94+ &x4_write_cache_variants,
95+ &x4_update_cache_variants),
96+ SPINAND_HAS_CR_FEAT_BIT,
97+ SPINAND_ECCINFO(&micron_8_ooblayout,
98+ micron_8_ecc_get_status)),
99 };
100
101 static int micron_spinand_detect(struct spinand_device *spinand)
102--- a/include/linux/mtd/spinand.h
103+++ b/include/linux/mtd/spinand.h
104@@ -270,6 +270,7 @@ struct spinand_ecc_info {
105 };
106
107 #define SPINAND_HAS_QE_BIT BIT(0)
108+#define SPINAND_HAS_CR_FEAT_BIT BIT(1)
109
110 /**
111 * struct spinand_info - Structure used to describe SPI NAND chips