| developer | 759668b | 2021-12-28 17:34:37 +0800 | [diff] [blame] | 1 | Index: linux-5.4.158/drivers/mtd/nand/spi/gigadevice.c |
| 2 | =================================================================== |
| 3 | --- linux-5.4.158.orig/drivers/mtd/nand/spi/gigadevice.c |
| 4 | +++ linux-5.4.158/drivers/mtd/nand/spi/gigadevice.c |
| 5 | @@ -36,6 +36,15 @@ static SPINAND_OP_VARIANTS(read_cache_va |
| 6 | SPINAND_PAGE_READ_FROM_CACHE_OP_3A(true, 0, 1, NULL, 0), |
| 7 | SPINAND_PAGE_READ_FROM_CACHE_OP_3A(false, 0, 0, NULL, 0)); |
| 8 | |
| 9 | +/* Q5 devices, QUADIO: Dummy bytes only valid for 1 GBit variants */ |
| 10 | +static SPINAND_OP_VARIANTS(gd5f1gq5_read_cache_variants, |
| 11 | + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), |
| 12 | + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), |
| 13 | + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), |
| 14 | + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), |
| 15 | + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), |
| 16 | + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); |
| 17 | + |
| 18 | static SPINAND_OP_VARIANTS(write_cache_variants, |
| 19 | SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), |
| 20 | SPINAND_PROG_LOAD(true, 0, NULL, 0)); |
| 21 | @@ -224,6 +233,24 @@ static int gd5fxgq4ufxxg_ecc_get_status( |
| 22 | } |
| 23 | |
| 24 | static const struct spinand_info gigadevice_spinand_table[] = { |
| 25 | + SPINAND_INFO("F50L1G41LB", 0x01, |
| 26 | + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), |
| 27 | + NAND_ECCREQ(8, 512), |
| 28 | + SPINAND_INFO_OP_VARIANTS(&gd5f1gq5_read_cache_variants, |
| 29 | + &write_cache_variants, |
| 30 | + &update_cache_variants), |
| 31 | + 0, |
| 32 | + SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout, |
| 33 | + gd5fxgq4xa_ecc_get_status)), |
| 34 | + SPINAND_INFO("GD5F1GQ5UExxG", 0x51, |
| 35 | + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
| 36 | + NAND_ECCREQ(4, 512), |
| 37 | + SPINAND_INFO_OP_VARIANTS(&gd5f1gq5_read_cache_variants, |
| 38 | + &write_cache_variants, |
| 39 | + &update_cache_variants), |
| 40 | + SPINAND_HAS_QE_BIT, |
| 41 | + SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout, |
| 42 | + gd5fxgq4xa_ecc_get_status)), |
| 43 | SPINAND_INFO("GD5F1GQ4xA", 0xF1, |
| 44 | NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), |
| 45 | NAND_ECCREQ(8, 512), |