| developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 1 | From 2231dfcbcffef50846a9c240651c62771d7e33b0 Mon Sep 17 00:00:00 2001 |
| 2 | From: Sam Shih <sam.shih@mediatek.com> |
| 3 | Date: Fri, 2 Jun 2023 13:06:18 +0800 |
| 4 | Subject: [PATCH] |
| 5 | [spi-and-storage][999-2362-spi-mtk-nor-fix-timeout-calculation-overflow.patch] |
| 6 | |
| 7 | --- |
| 8 | drivers/spi/spi-mtk-nor.c | 6 +++++- |
| 9 | 1 file changed, 5 insertions(+), 1 deletion(-) |
| 10 | |
| 11 | diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c |
| 12 | index c15a99105..4f72f08c0 100644 |
| 13 | --- a/drivers/spi/spi-mtk-nor.c |
| 14 | +++ b/drivers/spi/spi-mtk-nor.c |
| 15 | @@ -89,7 +89,7 @@ |
| 16 | // Buffered page program can do one 128-byte transfer |
| 17 | #define MTK_NOR_PP_SIZE 128 |
| 18 | |
| 19 | -#define CLK_TO_US(sp, clkcnt) ((clkcnt) * 1000000 / sp->spi_freq) |
| 20 | +#define CLK_TO_US(sp, clkcnt) DIV_ROUND_UP(clkcnt, sp->spi_freq / 1000000) |
| 21 | |
| 22 | struct mtk_nor { |
| 23 | struct spi_controller *ctlr; |
| 24 | @@ -177,6 +177,10 @@ static int mtk_nor_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) |
| 25 | if ((op->addr.nbytes == 3) || (op->addr.nbytes == 4)) { |
| 26 | if ((op->data.dir == SPI_MEM_DATA_IN) && |
| 27 | mtk_nor_match_read(op)) { |
| 28 | + // limit size to prevent timeout calculation overflow |
| 29 | + if (op->data.nbytes > 0x400000) |
| 30 | + op->data.nbytes = 0x400000; |
| 31 | + |
| 32 | if ((op->addr.val & MTK_NOR_DMA_ALIGN_MASK) || |
| 33 | (op->data.nbytes < MTK_NOR_DMA_ALIGN)) |
| 34 | op->data.nbytes = 1; |
| 35 | -- |
| 36 | 2.34.1 |
| 37 | |