developer | e5e687d | 2023-08-08 16:05:33 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* |
| 3 | * Copyright (c) 2023 MediaTek Inc. All Rights Reserved. |
| 4 | * |
| 5 | * Author: Alvin Kuo <alvin.kuog@mediatek.com> |
| 6 | * Ren-Ting Wang <ren-ting.wang@mediatek.com> |
| 7 | */ |
| 8 | |
| 9 | #ifndef _TOPS_TRM_MCU_H_ |
| 10 | #define _TOPS_TRM_MCU_H_ |
| 11 | |
| 12 | #include "tops.h" |
| 13 | |
| 14 | #define XCHAL_NUM_AREG (32) |
| 15 | #define CORE_DUMP_FRAM_MAGIC (0x00BE00BE) |
| 16 | |
| 17 | #define CORE_DUMP_FRAME_LEN (sizeof(struct core_dump_fram)) |
| 18 | |
| 19 | /* need to sync with core_dump.S */ |
| 20 | struct core_dump_fram { |
| 21 | uint32_t magic; |
| 22 | uint32_t num_areg; |
| 23 | uint32_t pc; |
| 24 | uint32_t ps; |
| 25 | uint32_t windowstart; |
| 26 | uint32_t windowbase; |
| 27 | uint32_t epc1; |
| 28 | uint32_t exccause; |
| 29 | uint32_t excvaddr; |
| 30 | uint32_t excsave1; |
| 31 | uint32_t areg[XCHAL_NUM_AREG]; |
| 32 | }; |
| 33 | |
| 34 | extern struct core_dump_fram cd_frams[CORE_TOPS_NUM]; |
| 35 | |
| 36 | int mtk_trm_mcu_core_dump(void); |
| 37 | int mtk_tops_trm_mcu_init(void); |
| 38 | void mtk_tops_trm_mcu_exit(void); |
| 39 | #endif /* _TOPS_TRM_MCU_H_ */ |