blob: afa77201d7b558e4a042856cf4109fb164d2b429 [file] [log] [blame]
developer5d148cb2023-06-02 13:08:11 +08001From 1ad5b06d70ce07cd377d6a9580b922b1fa68e674 Mon Sep 17 00:00:00 2001
2From: Sam Shih <sam.shih@mediatek.com>
3Date: Fri, 2 Jun 2023 13:06:07 +0800
4Subject: [PATCH]
5 [slow-speed-io][999-2132-add-pwm-feature-in-mt7988-project.patch]
6
7---
8 drivers/pwm/pwm-mediatek.c | 7 +++++++
9 1 file changed, 7 insertions(+)
10
developer2cdaeb12022-10-04 20:25:05 +080011diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
developer5d148cb2023-06-02 13:08:11 +080012index f4393bd46..9701092e7 100644
developer2cdaeb12022-10-04 20:25:05 +080013--- a/drivers/pwm/pwm-mediatek.c
14+++ b/drivers/pwm/pwm-mediatek.c
15@@ -350,6 +350,12 @@ static const struct pwm_mediatek_of_data mt7986_pwm_data = {
developer5d148cb2023-06-02 13:08:11 +080016 .reg_ver = REG_V1,
developer2cdaeb12022-10-04 20:25:05 +080017 };
18
19+static const struct pwm_mediatek_of_data mt7988_pwm_data = {
20+ .num_pwms = 8,
21+ .pwm45_fixup = false,
22+ .reg_ver = REG_V2,
23+};
24+
25 static const struct pwm_mediatek_of_data mt8516_pwm_data = {
26 .num_pwms = 5,
27 .pwm45_fixup = false,
28@@ -364,6 +370,7 @@ static const struct of_device_id pwm_mediatek_of_match[] = {
29 { .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
30 { .compatible = "mediatek,mt7981-pwm", .data = &mt7981_pwm_data },
31 { .compatible = "mediatek,mt7986-pwm", .data = &mt7986_pwm_data },
32+ { .compatible = "mediatek,mt7988-pwm", .data = &mt7988_pwm_data },
33 { .compatible = "mediatek,mt8516-pwm", .data = &mt8516_pwm_data },
34 { },
35 };
developer5d148cb2023-06-02 13:08:11 +080036--
372.34.1
38