developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 1 | From cdccb674bc75292020be6894dcea162e585dc5ce Mon Sep 17 00:00:00 2001 |
| 2 | From: MeiChia Chiu <meichia.chiu@mediatek.com> |
| 3 | Date: Mon, 28 Mar 2022 09:19:29 +0800 |
| 4 | Subject: [PATCH] mt76: mt7915: add support for muru_onoff via debugfs |
| 5 | |
| 6 | --- |
| 7 | mt7915/init.c | 1 + |
| 8 | mt7915/mcu.c | 12 ++++++++---- |
| 9 | mt7915/mcu.h | 6 ++++++ |
| 10 | mt7915/mt7915.h | 1 + |
| 11 | mt7915/mtk_debugfs.c | 33 +++++++++++++++++++++++++++++++++ |
| 12 | 5 files changed, 49 insertions(+), 4 deletions(-) |
| 13 | |
| 14 | diff --git a/mt7915/init.c b/mt7915/init.c |
| 15 | index dbcdf147..c58f045f 100644 |
| 16 | --- a/mt7915/init.c |
| 17 | +++ b/mt7915/init.c |
| 18 | @@ -574,6 +574,7 @@ static void mt7915_init_work(struct work_struct *work) |
| 19 | mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband); |
| 20 | mt7915_init_txpower(dev, &dev->mphy.sband_6g.sband); |
| 21 | mt7915_txbf_init(dev); |
| 22 | + dev->dbg.muru_onoff = OFDMA_DL | MUMIMO_UL | MUMIMO_DL; |
| 23 | } |
| 24 | |
| 25 | void mt7915_wfsys_reset(struct mt7915_dev *dev) |
| 26 | diff --git a/mt7915/mcu.c b/mt7915/mcu.c |
| 27 | index 26831327..95825062 100644 |
| 28 | --- a/mt7915/mcu.c |
| 29 | +++ b/mt7915/mcu.c |
| 30 | @@ -944,6 +944,7 @@ mt7915_mcu_sta_muru_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, |
| 31 | struct ieee80211_vif *vif) |
| 32 | { |
| 33 | struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; |
| 34 | + struct mt7915_dev *dev = mvif->phy->dev; |
| 35 | struct ieee80211_he_cap_elem *elem = &sta->he_cap.he_cap_elem; |
| 36 | struct sta_rec_muru *muru; |
| 37 | struct tlv *tlv; |
| 38 | @@ -956,11 +957,14 @@ mt7915_mcu_sta_muru_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, |
| 39 | |
| 40 | muru = (struct sta_rec_muru *)tlv; |
| 41 | |
| 42 | - muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer || |
| 43 | + muru->cfg.mimo_dl_en = (mvif->cap.he_mu_ebfer || |
| 44 | mvif->cap.vht_mu_ebfer || |
| 45 | - mvif->cap.vht_mu_ebfee; |
| 46 | - muru->cfg.mimo_ul_en = true; |
| 47 | - muru->cfg.ofdma_dl_en = true; |
| 48 | + mvif->cap.vht_mu_ebfee) && |
| 49 | + !!(dev->dbg.muru_onoff & MUMIMO_DL); |
| 50 | + |
| 51 | + muru->cfg.mimo_ul_en = !!(dev->dbg.muru_onoff & MUMIMO_UL); |
| 52 | + muru->cfg.ofdma_dl_en = !!(dev->dbg.muru_onoff & OFDMA_DL); |
| 53 | + muru->cfg.ofdma_ul_en = !!(dev->dbg.muru_onoff & OFDMA_UL); |
| 54 | |
| 55 | if (sta->vht_cap.vht_supported) |
| 56 | muru->mimo_dl.vht_mu_bfee = |
| 57 | diff --git a/mt7915/mcu.h b/mt7915/mcu.h |
| 58 | index 007282d4..a5e5afae 100644 |
| 59 | --- a/mt7915/mcu.h |
| 60 | +++ b/mt7915/mcu.h |
| 61 | @@ -569,4 +569,10 @@ struct csi_data { |
| 62 | }; |
| 63 | #endif |
| 64 | |
| 65 | +/* MURU */ |
| 66 | +#define OFDMA_DL BIT(0) |
| 67 | +#define OFDMA_UL BIT(1) |
| 68 | +#define MUMIMO_DL BIT(2) |
| 69 | +#define MUMIMO_UL BIT(3) |
| 70 | + |
| 71 | #endif |
| 72 | diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h |
| 73 | index 9960785e..ec844dbe 100644 |
| 74 | --- a/mt7915/mt7915.h |
| 75 | +++ b/mt7915/mt7915.h |
| 76 | @@ -390,6 +390,7 @@ struct mt7915_dev { |
| 77 | bool dump_rx_pkt; |
| 78 | bool dump_rx_raw; |
| 79 | u32 token_idx; |
| 80 | + u8 muru_onoff; |
| 81 | } dbg; |
| 82 | const struct mt7915_dbg_reg_desc *dbg_reg; |
| 83 | #endif |
| 84 | diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c |
| 85 | index 246eb129..6c48f115 100644 |
| 86 | --- a/mt7915/mtk_debugfs.c |
| 87 | +++ b/mt7915/mtk_debugfs.c |
| 88 | @@ -2454,6 +2454,38 @@ static int mt7915_token_txd_read(struct seq_file *s, void *data) |
| 89 | return 0; |
| 90 | } |
| 91 | |
| 92 | +static int mt7915_muru_onoff_get(void *data, u64 *val) |
| 93 | +{ |
| 94 | + struct mt7915_dev *dev = data; |
| 95 | + |
| 96 | + *val = dev->dbg.muru_onoff; |
| 97 | + |
| 98 | + printk("mumimo ul:%d, mumimo dl:%d, ofdma ul:%d, ofdma dl:%d\n", |
| 99 | + !!(dev->dbg.muru_onoff & MUMIMO_UL), |
| 100 | + !!(dev->dbg.muru_onoff & MUMIMO_DL), |
| 101 | + !!(dev->dbg.muru_onoff & OFDMA_UL), |
| 102 | + !!(dev->dbg.muru_onoff & OFDMA_DL)); |
| 103 | + |
| 104 | + return 0; |
| 105 | +} |
| 106 | + |
| 107 | +static int mt7915_muru_onoff_set(void *data, u64 val) |
| 108 | +{ |
| 109 | + struct mt7915_dev *dev = data; |
| 110 | + |
| 111 | + if (val > 15) { |
| 112 | + printk("Wrong value! The value is between 0 ~ 15.\n"); |
| 113 | + goto exit; |
| 114 | + } |
| 115 | + |
| 116 | + dev->dbg.muru_onoff = val; |
| 117 | +exit: |
| 118 | + return 0; |
| 119 | +} |
| 120 | + |
| 121 | +DEFINE_DEBUGFS_ATTRIBUTE(fops_muru_onoff, mt7915_muru_onoff_get, |
| 122 | + mt7915_muru_onoff_set, "%llx\n"); |
| 123 | + |
| 124 | static int mt7915_amsduinfo_read(struct seq_file *s, void *data) |
| 125 | { |
| 126 | struct mt7915_dev *dev = dev_get_drvdata(s->private); |
| 127 | @@ -2831,6 +2863,7 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) |
| 128 | |
| 129 | mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); |
| 130 | |
| 131 | + debugfs_create_file("muru_onoff", 0600, dir, dev, &fops_muru_onoff); |
| 132 | debugfs_create_file("fw_debug_module", 0600, dir, dev, |
| 133 | &fops_fw_debug_module); |
| 134 | debugfs_create_file("fw_debug_level", 0600, dir, dev, |
| 135 | -- |
| 136 | 2.18.0 |
| 137 | |