| developer | 1d1e456 | 2022-03-17 00:06:34 +0800 | [diff] [blame] | 1 | From 00e4fb5cf4d22681b379cdb92e0750cf74b367e7 Mon Sep 17 00:00:00 2001 |
| 2 | From: "lian.chen" <lian.chen@mediatek.com> |
| 3 | Date: Wed, 16 Mar 2022 15:14:05 +0800 |
| 4 | Subject: [PATCH] mt76: mt7915: disable mt7986 RX_HDR_TRANS_SHORT |
| 5 | |
| 6 | Signed-off-by: lian.chen <lian.chen@mediatek.com> |
| 7 | --- |
| 8 | mt7915/init.c | 3 +++ |
| 9 | mt7915/mac.c | 4 ---- |
| 10 | mt7915/regs.h | 3 +++ |
| 11 | 3 files changed, 6 insertions(+), 4 deletions(-) |
| 12 | |
| 13 | diff --git a/mt7915/init.c b/mt7915/init.c |
| 14 | index f57a3d18..223a4f77 100644 |
| 15 | --- a/mt7915/init.c |
| 16 | +++ b/mt7915/init.c |
| 17 | @@ -451,6 +451,9 @@ static void mt7915_mac_init(struct mt7915_dev *dev) |
| 18 | |
| 19 | mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, rx_len); |
| 20 | |
| 21 | + /* disable RX_TRANS_SHORT */ |
| 22 | + mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT); |
| 23 | + |
| 24 | /* enable hardware de-agg */ |
| 25 | mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN); |
| 26 | |
| 27 | diff --git a/mt7915/mac.c b/mt7915/mac.c |
| 28 | index fe718102..eedd901f 100644 |
| 29 | --- a/mt7915/mac.c |
| 30 | +++ b/mt7915/mac.c |
| 31 | @@ -835,10 +835,6 @@ mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb) |
| 32 | if (!status->wcid || !ieee80211_is_data_qos(fc)) |
| 33 | return 0; |
| 34 | |
| 35 | - /* drop no data frame */ |
| 36 | - if (fc & cpu_to_le16(IEEE80211_STYPE_NULLFUNC)) |
| 37 | - return -EINVAL; |
| 38 | - |
| 39 | status->aggr = unicast && |
| 40 | !ieee80211_is_qos_nullfunc(fc); |
| 41 | status->qos_ctl = qos_ctl; |
| 42 | diff --git a/mt7915/regs.h b/mt7915/regs.h |
| 43 | index e7d83458..6ddfa48f 100644 |
| 44 | --- a/mt7915/regs.h |
| 45 | +++ b/mt7915/regs.h |
| 46 | @@ -159,6 +159,9 @@ enum offs_rev { |
| 47 | #define MT_MDP_DCR1 MT_MDP(0x004) |
| 48 | #define MT_MDP_DCR1_MAX_RX_LEN GENMASK(15, 3) |
| 49 | |
| 50 | +#define MT_MDP_DCR2 MT_MDP(0x0e8) |
| 51 | +#define MT_MDP_DCR2_RX_TRANS_SHORT BIT(2) |
| 52 | + |
| 53 | #define MT_MDP_BNRCFR0(_band) MT_MDP(__OFFS(MDP_BNRCFR0) + \ |
| 54 | ((_band) << 8)) |
| 55 | #define MT_MDP_RCFR0_MCU_RX_MGMT GENMASK(5, 4) |
| 56 | -- |
| 57 | 2.18.0 |
| 58 | |