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developerde9ecce2023-05-22 11:17:16 +08001From a25714fa7b610430f9aa3d4ec24647eaea505d35 Mon Sep 17 00:00:00 2001
developer483388c2023-03-08 13:52:15 +08002From: Bo Jiao <Bo.Jiao@mediatek.com>
3Date: Mon, 6 Feb 2023 10:40:33 +0800
developerde9ecce2023-05-22 11:17:16 +08004Subject: [PATCH 06/22] wifi: mt76: mt7996: set txd v1
developer483388c2023-03-08 13:52:15 +08005
6---
7 mt7996/mac.c | 3 +++
8 mt7996/mac.h | 3 ++-
9 2 files changed, 5 insertions(+), 1 deletion(-)
10
11diff --git a/mt7996/mac.c b/mt7996/mac.c
developerde9ecce2023-05-22 11:17:16 +080012index 23cbfdde..420c7403 100644
developer483388c2023-03-08 13:52:15 +080013--- a/mt7996/mac.c
14+++ b/mt7996/mac.c
developerde9ecce2023-05-22 11:17:16 +080015@@ -1110,6 +1110,7 @@ int mt7996_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
developer483388c2023-03-08 13:52:15 +080016 struct mt76_txwi_cache *t;
17 int id, i, pid, nbuf = tx_info->nbuf - 1;
18 bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP;
19+ __le32 *txd = (__le32 *)txwi_ptr;
20 u8 *txwi = (u8 *)txwi_ptr;
21
22 if (unlikely(tx_info->skb->len <= ETH_HLEN))
developerde9ecce2023-05-22 11:17:16 +080023@@ -1141,6 +1142,8 @@ int mt7996_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
24 mt7996_mac_write_txwi(dev, txwi_ptr, tx_info->skb, wcid, key,
25 pid, qid, 0);
developer483388c2023-03-08 13:52:15 +080026
27+ txd[0] |= le32_encode_bits(1, MT_TXD0_VER);
28+
29 txp = (struct mt76_connac_txp_common *)(txwi + MT_TXD_SIZE);
30 for (i = 0; i < nbuf; i++) {
31 txp->fw.buf[i] = cpu_to_le32(tx_info->buf[i + 1].addr);
32diff --git a/mt7996/mac.h b/mt7996/mac.h
developerde9ecce2023-05-22 11:17:16 +080033index bc4e6c55..9ab8e8d2 100644
developer483388c2023-03-08 13:52:15 +080034--- a/mt7996/mac.h
35+++ b/mt7996/mac.h
developerde9ecce2023-05-22 11:17:16 +080036@@ -173,7 +173,8 @@ enum tx_mgnt_type {
developer483388c2023-03-08 13:52:15 +080037
38 #define MT_TXD0_Q_IDX GENMASK(31, 25)
39 #define MT_TXD0_PKT_FMT GENMASK(24, 23)
40-#define MT_TXD0_ETH_TYPE_OFFSET GENMASK(22, 16)
41+#define MT_TXD0_VER GENMASK(22, 19)
42+#define MT_TXD0_ETH_TYPE_OFFSET GENMASK(18, 16)
43 #define MT_TXD0_TX_BYTES GENMASK(15, 0)
44
45 #define MT_TXD1_FIXED_RATE BIT(31)
46--
developerde9ecce2023-05-22 11:17:16 +0800472.39.2
developer483388c2023-03-08 13:52:15 +080048