blob: 1854421a0353401adcd24dc8f429162ca30eb27b [file] [log] [blame]
developerde9ecce2023-05-22 11:17:16 +08001From 85fb9bc9f85a5e64d88db85fbfdef968d037fada Mon Sep 17 00:00:00 2001
developerabdbf252023-02-06 16:02:21 +08002From: MeiChia Chiu <MeiChia.Chiu@mediatek.com>
3Date: Mon, 28 Nov 2022 14:36:09 +0800
developerde9ecce2023-05-22 11:17:16 +08004Subject: [PATCH 05/22] wifi: mt76: mt7996: add muru support
developerabdbf252023-02-06 16:02:21 +08005
6Add sta_rec_muru() and related phy cap for MU and RU support.
7
8Signed-off-by: MeiChia Chiu <meichia.chiu@mediatek.com>
9Signed-off-by: Shayne Chen <shayne.chen@mediatek.com>
10Change-Id: I2206a9bb6fd6e50f4bf1380a8bea19920f1b7bfd
11---
12 mt76_connac_mcu.h | 3 ++-
developerde9ecce2023-05-22 11:17:16 +080013 mt7996/mcu.c | 57 ++++++++++++++++++++++++++++++++++++++++++++++-
14 2 files changed, 58 insertions(+), 2 deletions(-)
developerabdbf252023-02-06 16:02:21 +080015
16diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h
developerde9ecce2023-05-22 11:17:16 +080017index 91d98eff..8580ca59 100644
developerabdbf252023-02-06 16:02:21 +080018--- a/mt76_connac_mcu.h
19+++ b/mt76_connac_mcu.h
20@@ -518,7 +518,8 @@ struct sta_rec_muru {
21 u8 uo_ra;
22 u8 he_2x996_tone;
23 u8 rx_t_frame_11ac;
24- u8 rsv[3];
25+ u8 rx_ctrl_frame_to_mbss;
26+ u8 rsv[2];
27 } ofdma_ul;
28
29 struct {
30diff --git a/mt7996/mcu.c b/mt7996/mcu.c
developerde9ecce2023-05-22 11:17:16 +080031index 88e2f9d0..6812a47b 100644
developerabdbf252023-02-06 16:02:21 +080032--- a/mt7996/mcu.c
33+++ b/mt7996/mcu.c
developerde9ecce2023-05-22 11:17:16 +080034@@ -1050,6 +1050,60 @@ mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
developerabdbf252023-02-06 16:02:21 +080035 }
36 }
37
38+static void
39+mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
40+ struct ieee80211_vif *vif, struct ieee80211_sta *sta)
41+{
developerabdbf252023-02-06 16:02:21 +080042+ struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
43+ struct sta_rec_muru *muru;
44+ struct tlv *tlv;
45+
46+ if (vif->type != NL80211_IFTYPE_STATION &&
47+ vif->type != NL80211_IFTYPE_AP)
48+ return;
49+
50+ tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru));
51+
52+ muru = (struct sta_rec_muru *)tlv;
53+
developerde9ecce2023-05-22 11:17:16 +080054+ muru->cfg.mimo_dl_en = vif->bss_conf.eht_mu_beamformer ||
55+ vif->bss_conf.he_mu_beamformer ||
56+ vif->bss_conf.vht_mu_beamformer ||
57+ vif->bss_conf.vht_mu_beamformee;
developerabdbf252023-02-06 16:02:21 +080058+ muru->cfg.ofdma_dl_en = true;
59+
60+ if (sta->deflink.vht_cap.vht_supported)
61+ muru->mimo_dl.vht_mu_bfee =
62+ !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
63+
64+ if (!sta->deflink.he_cap.has_he)
65+ return;
66+
67+ muru->mimo_dl.partial_bw_dl_mimo =
68+ HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]);
69+
70+ muru->mimo_ul.full_ul_mimo =
71+ HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]);
72+ muru->mimo_ul.partial_ul_mimo =
73+ HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]);
74+
75+ muru->ofdma_dl.punc_pream_rx =
76+ HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
77+ muru->ofdma_dl.he_20m_in_40m_2g =
78+ HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]);
79+ muru->ofdma_dl.he_20m_in_160m =
80+ HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
81+ muru->ofdma_dl.he_80m_in_160m =
82+ HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
83+
84+ muru->ofdma_ul.t_frame_dur =
85+ HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
86+ muru->ofdma_ul.mu_cascading =
87+ HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]);
88+ muru->ofdma_ul.uo_ra =
89+ HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]);
90+}
91+
92 static inline bool
93 mt7996_is_ebf_supported(struct mt7996_phy *phy, struct ieee80211_vif *vif,
94 struct ieee80211_sta *sta, bool bfee)
developerde9ecce2023-05-22 11:17:16 +080095@@ -1727,7 +1781,8 @@ int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif,
developerabdbf252023-02-06 16:02:21 +080096 mt7996_mcu_sta_he_6g_tlv(skb, sta);
97 /* starec eht */
98 mt7996_mcu_sta_eht_tlv(skb, sta);
99- /* TODO: starec muru */
100+ /* starec muru */
101+ mt7996_mcu_sta_muru_tlv(dev, skb, vif, sta);
102 /* starec bfee */
103 mt7996_mcu_sta_bfee_tlv(dev, skb, vif, sta);
104 /* starec hdr trans */
developerabdbf252023-02-06 16:02:21 +0800105--
developerde9ecce2023-05-22 11:17:16 +08001062.39.2
developerabdbf252023-02-06 16:02:21 +0800107