| developer | 266ddcd | 2023-01-04 17:37:47 +0800 | [diff] [blame] | 1 | diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7981.c b/drivers/pinctrl/mediatek/pinctrl-mt7981.c |
| 2 | index 279ca6e..2e91034 100644 |
| 3 | --- a/drivers/pinctrl/mediatek/pinctrl-mt7981.c |
| 4 | +++ b/drivers/pinctrl/mediatek/pinctrl-mt7981.c |
| 5 | @@ -9,7 +9,7 @@ |
| 6 | #include "pinctrl-moore.h" |
| 7 | |
| 8 | #define MT7986_PIN(_number, _name) \ |
| 9 | - MTK_PIN(_number, _name, 0, _number, DRV_GRP1) |
| 10 | + MTK_PIN(_number, _name, 0, _number, DRV_GRP4) |
| 11 | |
| 12 | #define PIN_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits) \ |
| 13 | PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \ |
| 14 | @@ -45,8 +45,8 @@ static const struct mtk_pin_field_calc mt7981_pin_ies_range[] = { |
| 15 | PIN_FIELD_BASE(6, 6, 4, 0x20, 0x10, 3, 1), |
| 16 | PIN_FIELD_BASE(7, 7, 4, 0x20, 0x10, 0, 1), |
| 17 | PIN_FIELD_BASE(8, 8, 4, 0x20, 0x10, 4, 1), |
| 18 | - PIN_FIELD_BASE(9, 9, 4, 0x20, 0x10, 9, 1), |
| 19 | |
| 20 | + PIN_FIELD_BASE(9, 9, 5, 0x20, 0x10, 9, 1), |
| 21 | PIN_FIELD_BASE(10, 10, 5, 0x20, 0x10, 8, 1), |
| 22 | PIN_FIELD_BASE(11, 11, 5, 0x40, 0x10, 10, 1), |
| 23 | PIN_FIELD_BASE(12, 12, 5, 0x20, 0x10, 7, 1), |
| 24 | @@ -114,8 +114,8 @@ static const struct mtk_pin_field_calc mt7981_pin_smt_range[] = { |
| 25 | PIN_FIELD_BASE(6, 6, 4, 0x80, 0x10, 3, 1), |
| 26 | PIN_FIELD_BASE(7, 7, 4, 0x80, 0x10, 0, 1), |
| 27 | PIN_FIELD_BASE(8, 8, 4, 0x80, 0x10, 4, 1), |
| 28 | - PIN_FIELD_BASE(9, 9, 4, 0x80, 0x10, 9, 1), |
| 29 | |
| 30 | + PIN_FIELD_BASE(9, 9, 5, 0x90, 0x10, 9, 1), |
| 31 | PIN_FIELD_BASE(10, 10, 5, 0x90, 0x10, 8, 1), |
| 32 | PIN_FIELD_BASE(11, 11, 5, 0x90, 0x10, 10, 1), |
| 33 | PIN_FIELD_BASE(12, 12, 5, 0x90, 0x10, 7, 1), |
| 34 | @@ -227,8 +227,8 @@ static const struct mtk_pin_field_calc mt7981_pin_drv_range[] = { |
| 35 | PIN_FIELD_BASE(6, 6, 4, 0x00, 0x10, 9, 3), |
| 36 | PIN_FIELD_BASE(7, 7, 4, 0x00, 0x10, 0, 3), |
| 37 | PIN_FIELD_BASE(8, 8, 4, 0x00, 0x10, 12, 3), |
| 38 | - PIN_FIELD_BASE(9, 9, 4, 0x00, 0x10, 27, 3), |
| 39 | |
| 40 | + PIN_FIELD_BASE(9, 9, 5, 0x00, 0x10, 27, 3), |
| 41 | PIN_FIELD_BASE(10, 10, 5, 0x00, 0x10, 24, 3), |
| 42 | PIN_FIELD_BASE(11, 11, 5, 0x00, 0x10, 0, 3), |
| 43 | PIN_FIELD_BASE(12, 12, 5, 0x00, 0x10, 21, 3), |
| 44 | @@ -296,8 +296,8 @@ static const struct mtk_pin_field_calc mt7981_pin_pupd_range[] = { |
| 45 | PIN_FIELD_BASE(6, 6, 4, 0x30, 0x10, 3, 1), |
| 46 | PIN_FIELD_BASE(7, 7, 4, 0x30, 0x10, 0, 1), |
| 47 | PIN_FIELD_BASE(8, 8, 4, 0x30, 0x10, 4, 1), |
| 48 | - PIN_FIELD_BASE(9, 9, 4, 0x30, 0x10, 9, 1), |
| 49 | |
| 50 | + PIN_FIELD_BASE(9, 9, 5, 0x30, 0x10, 9, 1), |
| 51 | PIN_FIELD_BASE(10, 10, 5, 0x30, 0x10, 8, 1), |
| 52 | PIN_FIELD_BASE(11, 11, 5, 0x30, 0x10, 10, 1), |
| 53 | PIN_FIELD_BASE(12, 12, 5, 0x30, 0x10, 7, 1), |
| 54 | @@ -346,8 +346,8 @@ static const struct mtk_pin_field_calc mt7981_pin_r0_range[] = { |
| 55 | PIN_FIELD_BASE(6, 6, 4, 0x40, 0x10, 3, 1), |
| 56 | PIN_FIELD_BASE(7, 7, 4, 0x40, 0x10, 0, 1), |
| 57 | PIN_FIELD_BASE(8, 8, 4, 0x40, 0x10, 4, 1), |
| 58 | - PIN_FIELD_BASE(9, 9, 4, 0x40, 0x10, 9, 1), |
| 59 | |
| 60 | + PIN_FIELD_BASE(9, 9, 5, 0x40, 0x10, 9, 1), |
| 61 | PIN_FIELD_BASE(10, 10, 5, 0x40, 0x10, 8, 1), |
| 62 | PIN_FIELD_BASE(11, 11, 5, 0x40, 0x10, 10, 1), |
| 63 | PIN_FIELD_BASE(12, 12, 5, 0x40, 0x10, 7, 1), |
| 64 | @@ -396,8 +396,8 @@ static const struct mtk_pin_field_calc mt7981_pin_r1_range[] = { |
| 65 | PIN_FIELD_BASE(6, 6, 4, 0x50, 0x10, 3, 1), |
| 66 | PIN_FIELD_BASE(7, 7, 4, 0x50, 0x10, 0, 1), |
| 67 | PIN_FIELD_BASE(8, 8, 4, 0x50, 0x10, 4, 1), |
| 68 | - PIN_FIELD_BASE(9, 9, 4, 0x50, 0x10, 9, 1), |
| 69 | |
| 70 | + PIN_FIELD_BASE(9, 9, 5, 0x50, 0x10, 9, 1), |
| 71 | PIN_FIELD_BASE(10, 10, 5, 0x50, 0x10, 8, 1), |
| 72 | PIN_FIELD_BASE(11, 11, 5, 0x50, 0x10, 10, 1), |
| 73 | PIN_FIELD_BASE(12, 12, 5, 0x50, 0x10, 7, 1), |