blob: b547328fbe6baa848cae3bf4e6e31e8555d00655 [file] [log] [blame]
developer58aa0682023-09-18 14:02:26 +08001From 84fd451dd7379943e6957e9ceb749be4d6c41540 Mon Sep 17 00:00:00 2001
2From: Bc-bocun Chen <bc-bocun.chen@mediatek.com>
3Date: Mon, 18 Sep 2023 11:07:14 +0800
4Subject: [PATCH 11/22] ethernet-update-ppe-backward-compatible-two-way-hash
5
6---
7 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 10 ++++++++-
8 drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 +
9 drivers/net/ethernet/mediatek/mtk_ppe.c | 24 ++++++++++++++-------
10 drivers/net/ethernet/mediatek/mtk_ppe.h | 5 +++--
11 4 files changed, 29 insertions(+), 11 deletions(-)
12
developeree39bcf2023-06-16 08:03:30 +080013diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
developer58aa0682023-09-18 14:02:26 +080014index c1399c5..bd622d3 100644
developeree39bcf2023-06-16 08:03:30 +080015--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
16+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
developer58aa0682023-09-18 14:02:26 +080017@@ -5252,7 +5252,8 @@ static int mtk_probe(struct platform_device *pdev)
developeree39bcf2023-06-16 08:03:30 +080018
19 for (i = 0; i < eth->ppe_num; i++) {
20 eth->ppe[i] = mtk_ppe_init(eth,
21- eth->base + MTK_ETH_PPE_BASE + i * 0x400, 2, i);
22+ eth->base + MTK_ETH_PPE_BASE + i * 0x400,
23+ 2, eth->soc->hash_way, i);
24 if (!eth->ppe[i]) {
25 err = -ENOMEM;
26 goto err_free_dev;
developer58aa0682023-09-18 14:02:26 +080027@@ -5359,6 +5360,7 @@ static const struct mtk_soc_data mt2701_data = {
developeree39bcf2023-06-16 08:03:30 +080028 .required_clks = MT7623_CLKS_BITMAP,
29 .required_pctl = true,
30 .has_sram = false,
31+ .hash_way = 2,
32 .offload_version = 2,
developerd917ed32023-09-14 09:49:46 +080033 .rss_num = 0,
developeree39bcf2023-06-16 08:03:30 +080034 .txrx = {
developer58aa0682023-09-18 14:02:26 +080035@@ -5377,6 +5379,7 @@ static const struct mtk_soc_data mt7621_data = {
developeree39bcf2023-06-16 08:03:30 +080036 .required_clks = MT7621_CLKS_BITMAP,
37 .required_pctl = false,
38 .has_sram = false,
39+ .hash_way = 2,
40 .offload_version = 2,
developerd917ed32023-09-14 09:49:46 +080041 .rss_num = 0,
developeree39bcf2023-06-16 08:03:30 +080042 .txrx = {
developer58aa0682023-09-18 14:02:26 +080043@@ -5396,6 +5399,7 @@ static const struct mtk_soc_data mt7622_data = {
developeree39bcf2023-06-16 08:03:30 +080044 .required_clks = MT7622_CLKS_BITMAP,
45 .required_pctl = false,
46 .has_sram = false,
47+ .hash_way = 2,
48 .offload_version = 2,
developerd917ed32023-09-14 09:49:46 +080049 .rss_num = 0,
developeree39bcf2023-06-16 08:03:30 +080050 .txrx = {
developer58aa0682023-09-18 14:02:26 +080051@@ -5414,6 +5418,7 @@ static const struct mtk_soc_data mt7623_data = {
developeree39bcf2023-06-16 08:03:30 +080052 .required_clks = MT7623_CLKS_BITMAP,
53 .required_pctl = true,
54 .has_sram = false,
55+ .hash_way = 2,
56 .offload_version = 2,
developerd917ed32023-09-14 09:49:46 +080057 .rss_num = 0,
developeree39bcf2023-06-16 08:03:30 +080058 .txrx = {
developer58aa0682023-09-18 14:02:26 +080059@@ -5451,6 +5456,7 @@ static const struct mtk_soc_data mt7986_data = {
developeree39bcf2023-06-16 08:03:30 +080060 .required_clks = MT7986_CLKS_BITMAP,
61 .required_pctl = false,
developerc636c892023-08-24 10:09:24 +080062 .has_sram = false,
developeree39bcf2023-06-16 08:03:30 +080063+ .hash_way = 4,
64 .offload_version = 2,
developerd917ed32023-09-14 09:49:46 +080065 .rss_num = 4,
developeree39bcf2023-06-16 08:03:30 +080066 .txrx = {
developer58aa0682023-09-18 14:02:26 +080067@@ -5470,6 +5476,8 @@ static const struct mtk_soc_data mt7981_data = {
developeree39bcf2023-06-16 08:03:30 +080068 .required_clks = MT7981_CLKS_BITMAP,
69 .required_pctl = false,
developerc636c892023-08-24 10:09:24 +080070 .has_sram = false,
developeree39bcf2023-06-16 08:03:30 +080071+ .hash_way = 4,
72+ .offload_version = 2,
developerd917ed32023-09-14 09:49:46 +080073 .rss_num = 4,
developeree39bcf2023-06-16 08:03:30 +080074 .txrx = {
75 .txd_size = sizeof(struct mtk_tx_dma_v2),
76diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
developer58aa0682023-09-18 14:02:26 +080077index 960b979..68b8ab1 100644
developeree39bcf2023-06-16 08:03:30 +080078--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
79+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
developer58aa0682023-09-18 14:02:26 +080080@@ -1679,6 +1679,7 @@ struct mtk_soc_data {
developeree39bcf2023-06-16 08:03:30 +080081 u64 caps;
developer58aa0682023-09-18 14:02:26 +080082 u64 required_clks;
developeree39bcf2023-06-16 08:03:30 +080083 bool required_pctl;
84+ u8 hash_way;
85 u8 offload_version;
86 netdev_features_t hw_features;
87 bool has_sram;
88diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.c b/drivers/net/ethernet/mediatek/mtk_ppe.c
developer58aa0682023-09-18 14:02:26 +080089index 96c15b3..4da7e7a 100755
developeree39bcf2023-06-16 08:03:30 +080090--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
91+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
92@@ -88,7 +88,7 @@ static void mtk_ppe_cache_enable(struct mtk_ppe *ppe, bool enable)
93 enable * MTK_PPE_CACHE_CTL_EN);
94 }
95
96-static u32 mtk_ppe_hash_entry(struct mtk_foe_entry *e)
97+static u32 mtk_ppe_hash_entry(struct mtk_ppe *ppe, struct mtk_foe_entry *e)
98 {
99 u32 hv1, hv2, hv3;
100 u32 hash;
101@@ -122,7 +122,7 @@ static u32 mtk_ppe_hash_entry(struct mtk_foe_entry *e)
102 hash = (hash >> 24) | ((hash & 0xffffff) << 8);
103 hash ^= hv1 ^ hv2 ^ hv3;
104 hash ^= hash >> 16;
105- hash <<= 2;
106+ hash <<= (ffs(ppe->way) - 1);
107 hash &= MTK_PPE_ENTRIES - 1;
108
109 return hash;
developer58aa0682023-09-18 14:02:26 +0800110@@ -557,10 +557,10 @@ int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry)
developeree39bcf2023-06-16 08:03:30 +0800111 if (type == MTK_PPE_PKT_TYPE_BRIDGE)
112 return mtk_foe_entry_commit_l2(ppe, entry);
113
114- hash = mtk_ppe_hash_entry(&entry->data);
115+ hash = mtk_ppe_hash_entry(ppe, &entry->data);
116 entry->hash = 0xffff;
117 spin_lock_bh(&ppe_lock);
118- hlist_add_head(&entry->list, &ppe->foe_flow[hash / 4]);
119+ hlist_add_head(&entry->list, &ppe->foe_flow[hash / ppe->way]);
120 spin_unlock_bh(&ppe_lock);
121
122 return 0;
developer58aa0682023-09-18 14:02:26 +0800123@@ -584,7 +584,7 @@ mtk_foe_entry_commit_subflow(struct mtk_ppe *ppe, struct mtk_flow_entry *entry,
developeree39bcf2023-06-16 08:03:30 +0800124 flow_info->l2_data.base_flow = entry;
125 flow_info->type = MTK_FLOW_TYPE_L2_SUBFLOW;
126 flow_info->hash = hash;
127- hlist_add_head(&flow_info->list, &ppe->foe_flow[hash / 4]);
128+ hlist_add_head(&flow_info->list, &ppe->foe_flow[hash / ppe->way]);
129 hlist_add_head(&flow_info->l2_data.list, &entry->l2_flows);
130
131 hwe = &ppe->foe_table[hash];
developer58aa0682023-09-18 14:02:26 +0800132@@ -608,7 +608,7 @@ mtk_foe_entry_commit_subflow(struct mtk_ppe *ppe, struct mtk_flow_entry *entry,
developeree39bcf2023-06-16 08:03:30 +0800133
134 void __mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash)
135 {
136- struct hlist_head *head = &ppe->foe_flow[hash / 4];
137+ struct hlist_head *head = &ppe->foe_flow[hash / ppe->way];
138 struct mtk_foe_entry *hwe = &ppe->foe_table[hash];
139 struct mtk_flow_entry *entry;
140 struct mtk_foe_bridge key = {};
developer58aa0682023-09-18 14:02:26 +0800141@@ -695,12 +695,12 @@ int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry)
developeree39bcf2023-06-16 08:03:30 +0800142 return __mtk_foe_entry_idle_time(ppe, entry->data.ib1);
143 }
144
145-struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base,
146- int version, int id)
147+struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base, int version, int way, int id)
148 {
149 struct device *dev = eth->dev;
150 struct mtk_foe_entry *foe;
151 struct mtk_ppe *ppe;
152+ struct hlist_head *flow;
153
154 ppe = devm_kzalloc(dev, sizeof(*ppe), GFP_KERNEL);
155 if (!ppe)
developer58aa0682023-09-18 14:02:26 +0800156@@ -715,6 +715,7 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base,
developeree39bcf2023-06-16 08:03:30 +0800157 ppe->eth = eth;
158 ppe->dev = dev;
159 ppe->version = version;
160+ ppe->way = way;
161 ppe->id = id;
162
163 foe = dmam_alloc_coherent(ppe->dev, MTK_PPE_ENTRIES * sizeof(*foe),
developer58aa0682023-09-18 14:02:26 +0800164@@ -724,6 +725,13 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base,
developeree39bcf2023-06-16 08:03:30 +0800165
166 ppe->foe_table = foe;
167
168+ flow = devm_kzalloc(dev, (MTK_PPE_ENTRIES / way) * sizeof(*flow),
169+ GFP_KERNEL);
170+ if (!flow)
171+ return NULL;
172+
173+ ppe->foe_flow = flow;
174+
175 return ppe;
176 }
177
178diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.h b/drivers/net/ethernet/mediatek/mtk_ppe.h
developer58aa0682023-09-18 14:02:26 +0800179index 86bbac8..feb1a4a 100644
developeree39bcf2023-06-16 08:03:30 +0800180--- a/drivers/net/ethernet/mediatek/mtk_ppe.h
181+++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
developer58aa0682023-09-18 14:02:26 +0800182@@ -322,19 +322,20 @@ struct mtk_ppe {
developeree39bcf2023-06-16 08:03:30 +0800183 void __iomem *base;
184 int version;
185 int id;
186+ int way;
187
188 struct mtk_foe_entry *foe_table;
189 dma_addr_t foe_phys;
190
191 u16 foe_check_time[MTK_PPE_ENTRIES];
192- struct hlist_head foe_flow[MTK_PPE_ENTRIES / 2];
193+ struct hlist_head *foe_flow;
194
195 struct rhashtable l2_flows;
196
197 void *acct_table;
198 };
199
200-struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base, int version, int id);
201+struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base, int version, int way, int id);
202 int mtk_ppe_start(struct mtk_ppe *ppe);
203 int mtk_ppe_stop(struct mtk_ppe *ppe);
204
developer58aa0682023-09-18 14:02:26 +0800205--
2062.18.0
207