developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 1 | From 6a8359a808df29b708b2fd2aa84c0a369be7a7d5 Mon Sep 17 00:00:00 2001 |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 2 | From: Shayne Chen <shayne.chen@mediatek.com> |
| 3 | Date: Mon, 3 Jul 2023 22:38:43 +0800 |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 4 | Subject: [PATCH 14/98] wifi: mt76: mt7996: add lock for indirect register |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 5 | access |
| 6 | |
| 7 | Some races were observed during indirect register access, fix this |
| 8 | by adding reg_lock and reworking l1/l2 remap flow. |
| 9 | |
| 10 | Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> |
| 11 | Change-Id: I0de2cd27df9ccb7f9a7d9ce265e869175b1ca7f1 |
| 12 | --- |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 13 | mt7996/mmio.c | 69 +++++++++++++++++++++++++++++++++---------------- |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 14 | mt7996/mt7996.h | 3 +-- |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 15 | 2 files changed, 48 insertions(+), 24 deletions(-) |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 16 | |
| 17 | diff --git a/mt7996/mmio.c b/mt7996/mmio.c |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 18 | index c7b6d4b..ab088a2 100644 |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 19 | --- a/mt7996/mmio.c |
| 20 | +++ b/mt7996/mmio.c |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 21 | @@ -86,7 +86,6 @@ static u32 mt7996_reg_map_l1(struct mt7996_dev *dev, u32 addr) |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 22 | u32 offset = FIELD_GET(MT_HIF_REMAP_L1_OFFSET, addr); |
| 23 | u32 base = FIELD_GET(MT_HIF_REMAP_L1_BASE, addr); |
| 24 | |
| 25 | - dev->reg_l1_backup = dev->bus_ops->rr(&dev->mt76, MT_HIF_REMAP_L1); |
| 26 | dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L1, |
| 27 | MT_HIF_REMAP_L1_MASK, |
| 28 | FIELD_PREP(MT_HIF_REMAP_L1_MASK, base)); |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 29 | @@ -101,7 +100,6 @@ static u32 mt7996_reg_map_l2(struct mt7996_dev *dev, u32 addr) |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 30 | u32 offset = FIELD_GET(MT_HIF_REMAP_L2_OFFSET, addr); |
| 31 | u32 base = FIELD_GET(MT_HIF_REMAP_L2_BASE, addr); |
| 32 | |
| 33 | - dev->reg_l2_backup = dev->bus_ops->rr(&dev->mt76, MT_HIF_REMAP_L2); |
| 34 | dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L2, |
| 35 | MT_HIF_REMAP_L2_MASK, |
| 36 | FIELD_PREP(MT_HIF_REMAP_L2_MASK, base)); |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 37 | @@ -111,26 +109,10 @@ static u32 mt7996_reg_map_l2(struct mt7996_dev *dev, u32 addr) |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 38 | return MT_HIF_REMAP_BASE_L2 + offset; |
| 39 | } |
| 40 | |
| 41 | -static void mt7996_reg_remap_restore(struct mt7996_dev *dev) |
| 42 | -{ |
| 43 | - /* remap to ori status */ |
| 44 | - if (unlikely(dev->reg_l1_backup)) { |
| 45 | - dev->bus_ops->wr(&dev->mt76, MT_HIF_REMAP_L1, dev->reg_l1_backup); |
| 46 | - dev->reg_l1_backup = 0; |
| 47 | - } |
| 48 | - |
| 49 | - if (dev->reg_l2_backup) { |
| 50 | - dev->bus_ops->wr(&dev->mt76, MT_HIF_REMAP_L2, dev->reg_l2_backup); |
| 51 | - dev->reg_l2_backup = 0; |
| 52 | - } |
| 53 | -} |
| 54 | - |
| 55 | static u32 __mt7996_reg_addr(struct mt7996_dev *dev, u32 addr) |
| 56 | { |
| 57 | int i; |
| 58 | |
| 59 | - mt7996_reg_remap_restore(dev); |
| 60 | - |
| 61 | if (addr < 0x100000) |
| 62 | return addr; |
| 63 | |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 64 | @@ -147,6 +129,11 @@ static u32 __mt7996_reg_addr(struct mt7996_dev *dev, u32 addr) |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 65 | return dev->reg.map[i].mapped + ofs; |
| 66 | } |
| 67 | |
| 68 | + return 0; |
| 69 | +} |
| 70 | + |
| 71 | +static u32 __mt7996_reg_remap_addr(struct mt7996_dev *dev, u32 addr) |
| 72 | +{ |
| 73 | if ((addr >= MT_INFRA_BASE && addr < MT_WFSYS0_PHY_START) || |
| 74 | (addr >= MT_WFSYS0_PHY_START && addr < MT_WFSYS1_PHY_START) || |
| 75 | (addr >= MT_WFSYS1_PHY_START && addr <= MT_WFSYS1_PHY_END)) |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 76 | @@ -171,28 +158,65 @@ void mt7996_memcpy_fromio(struct mt7996_dev *dev, void *buf, u32 offset, |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 77 | { |
| 78 | u32 addr = __mt7996_reg_addr(dev, offset); |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 79 | |
| 80 | - memcpy_fromio(buf, dev->mt76.mmio.regs + addr, len); |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 81 | + unsigned long flags; |
| 82 | + |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 83 | + if (addr) { |
| 84 | + memcpy_fromio(buf, dev->mt76.mmio.regs + addr, len); |
| 85 | + return; |
| 86 | + } |
| 87 | + |
| 88 | + spin_lock_irqsave(&dev->reg_lock, flags); |
| 89 | + memcpy_fromio(buf, dev->mt76.mmio.regs + |
| 90 | + __mt7996_reg_remap_addr(dev, offset), len); |
| 91 | + spin_unlock_irqrestore(&dev->reg_lock, flags); |
| 92 | } |
| 93 | |
| 94 | static u32 mt7996_rr(struct mt76_dev *mdev, u32 offset) |
| 95 | { |
| 96 | struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); |
| 97 | + u32 addr = __mt7996_reg_addr(dev, offset), val; |
| 98 | + unsigned long flags; |
| 99 | + |
| 100 | + if (addr) |
| 101 | + return dev->bus_ops->rr(mdev, addr); |
| 102 | |
| 103 | - return dev->bus_ops->rr(mdev, __mt7996_reg_addr(dev, offset)); |
| 104 | + spin_lock_irqsave(&dev->reg_lock, flags); |
| 105 | + val = dev->bus_ops->rr(mdev, __mt7996_reg_remap_addr(dev, offset)); |
| 106 | + spin_unlock_irqrestore(&dev->reg_lock, flags); |
| 107 | + |
| 108 | + return val; |
| 109 | } |
| 110 | |
| 111 | static void mt7996_wr(struct mt76_dev *mdev, u32 offset, u32 val) |
| 112 | { |
| 113 | struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); |
| 114 | + u32 addr = __mt7996_reg_addr(dev, offset); |
| 115 | + unsigned long flags; |
| 116 | |
| 117 | - dev->bus_ops->wr(mdev, __mt7996_reg_addr(dev, offset), val); |
| 118 | + if (addr) { |
| 119 | + dev->bus_ops->wr(mdev, addr, val); |
| 120 | + return; |
| 121 | + } |
| 122 | + |
| 123 | + spin_lock_irqsave(&dev->reg_lock, flags); |
| 124 | + dev->bus_ops->wr(mdev, __mt7996_reg_remap_addr(dev, offset), val); |
| 125 | + spin_unlock_irqrestore(&dev->reg_lock, flags); |
| 126 | } |
| 127 | |
| 128 | static u32 mt7996_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val) |
| 129 | { |
| 130 | struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); |
| 131 | + u32 addr = __mt7996_reg_addr(dev, offset); |
| 132 | + unsigned long flags; |
| 133 | + |
| 134 | + if (addr) |
| 135 | + return dev->bus_ops->rmw(mdev, addr, mask, val); |
| 136 | + |
| 137 | + spin_lock_irqsave(&dev->reg_lock, flags); |
| 138 | + val = dev->bus_ops->rmw(mdev, __mt7996_reg_remap_addr(dev, offset), mask, val); |
| 139 | + spin_unlock_irqrestore(&dev->reg_lock, flags); |
| 140 | |
| 141 | - return dev->bus_ops->rmw(mdev, __mt7996_reg_addr(dev, offset), mask, val); |
| 142 | + return val; |
| 143 | } |
| 144 | |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 145 | int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr, |
| 146 | @@ -341,6 +365,7 @@ static int mt7996_mmio_init(struct mt76_dev *mdev, |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 147 | |
| 148 | dev = container_of(mdev, struct mt7996_dev, mt76); |
| 149 | mt76_mmio_init(&dev->mt76, mem_base); |
| 150 | + spin_lock_init(&dev->reg_lock); |
| 151 | |
| 152 | switch (device_id) { |
| 153 | case 0x7990: |
| 154 | diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 155 | index c8e7a33..c0ceef0 100644 |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 156 | --- a/mt7996/mt7996.h |
| 157 | +++ b/mt7996/mt7996.h |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 158 | @@ -309,8 +309,7 @@ struct mt7996_dev { |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 159 | u8 n_agrt; |
| 160 | } twt; |
| 161 | |
| 162 | - u32 reg_l1_backup; |
| 163 | - u32 reg_l2_backup; |
| 164 | + spinlock_t reg_lock; |
| 165 | |
| 166 | u8 wtbl_size_group; |
| 167 | }; |
| 168 | -- |
developer | 7e2761e | 2023-10-12 08:11:13 +0800 | [diff] [blame] | 169 | 2.18.0 |
developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame] | 170 | |