developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * The MT7986 driver based on Linux generic pinctrl binding. |
| 4 | * |
| 5 | * Copyright (C) 2020 MediaTek Inc. |
| 6 | * Author: Sam Shih <sam.shih@mediatek.com> |
| 7 | */ |
| 8 | |
| 9 | #include "pinctrl-moore.h" |
| 10 | |
| 11 | #define MT7986_PIN(_number, _name) \ |
developer | 7f4cdcd | 2021-08-03 19:29:43 +0800 | [diff] [blame] | 12 | MTK_PIN(_number, _name, 0, _number, DRV_GRP4) |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 13 | |
| 14 | #define PIN_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits) \ |
| 15 | PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \ |
| 16 | _x_bits, 32, 0) |
| 17 | |
| 18 | #define PINS_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits) \ |
| 19 | PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \ |
| 20 | _x_bits, 32, 1) |
| 21 | |
| 22 | static const struct mtk_pin_field_calc mt7986_pin_mode_range[] = { |
| 23 | PIN_FIELD(0, 100, 0x300, 0x10, 0, 4), |
| 24 | }; |
| 25 | |
| 26 | static const struct mtk_pin_field_calc mt7986_pin_dir_range[] = { |
| 27 | PIN_FIELD(0, 100, 0x0, 0x10, 0, 1), |
| 28 | }; |
| 29 | |
| 30 | static const struct mtk_pin_field_calc mt7986_pin_di_range[] = { |
| 31 | PIN_FIELD(0, 100, 0x200, 0x10, 0, 1), |
| 32 | }; |
| 33 | |
| 34 | static const struct mtk_pin_field_calc mt7986_pin_do_range[] = { |
| 35 | PIN_FIELD(0, 100, 0x100, 0x10, 0, 1), |
| 36 | }; |
| 37 | |
| 38 | static const struct mtk_pin_field_calc mt7986_pin_ies_range[] = { |
| 39 | PIN_FIELD_BASE(0, 0, 2, 0x40, 0x10, 17, 1), |
| 40 | PIN_FIELD_BASE(1, 1, 3, 0x20, 0x10, 10, 1), |
| 41 | PIN_FIELD_BASE(2, 2, 3, 0x20, 0x10, 11, 1), |
| 42 | PIN_FIELD_BASE(3, 3, 4, 0x20, 0x10, 0, 1), |
| 43 | PIN_FIELD_BASE(4, 4, 4, 0x20, 0x10, 1, 1), |
| 44 | PIN_FIELD_BASE(5, 5, 2, 0x40, 0x10, 0, 1), |
| 45 | PIN_FIELD_BASE(6, 6, 2, 0x40, 0x10, 1, 1), |
| 46 | PIN_FIELD_BASE(7, 7, 3, 0x20, 0x10, 0, 1), |
| 47 | PIN_FIELD_BASE(8, 8, 3, 0x20, 0x10, 1, 1), |
| 48 | PIN_FIELD_BASE(9, 9, 3, 0x20, 0x10, 2, 1), |
| 49 | PIN_FIELD_BASE(10, 10, 3, 0x20, 0x10, 3, 1), |
| 50 | PIN_FIELD_BASE(11, 11, 2, 0x40, 0x10, 8, 1), |
| 51 | PIN_FIELD_BASE(12, 12, 2, 0x40, 0x10, 9, 1), |
| 52 | PIN_FIELD_BASE(13, 13, 2, 0x40, 0x10, 10, 1), |
| 53 | PIN_FIELD_BASE(14, 14, 2, 0x40, 0x10, 11, 1), |
| 54 | PIN_FIELD_BASE(15, 15, 2, 0x40, 0x10, 2, 1), |
| 55 | PIN_FIELD_BASE(16, 16, 2, 0x40, 0x10, 3, 1), |
| 56 | PIN_FIELD_BASE(17, 17, 2, 0x40, 0x10, 4, 1), |
| 57 | PIN_FIELD_BASE(18, 18, 2, 0x40, 0x10, 5, 1), |
| 58 | PIN_FIELD_BASE(19, 19, 2, 0x40, 0x10, 6, 1), |
| 59 | PIN_FIELD_BASE(20, 20, 2, 0x40, 0x10, 7, 1), |
| 60 | PIN_FIELD_BASE(21, 21, 1, 0x30, 0x10, 12, 1), |
| 61 | PIN_FIELD_BASE(22, 22, 1, 0x30, 0x10, 13, 1), |
| 62 | PIN_FIELD_BASE(23, 23, 1, 0x30, 0x10, 14, 1), |
| 63 | PIN_FIELD_BASE(24, 24, 1, 0x30, 0x10, 18, 1), |
| 64 | PIN_FIELD_BASE(25, 25, 1, 0x30, 0x10, 17, 1), |
| 65 | PIN_FIELD_BASE(26, 26, 1, 0x30, 0x10, 15, 1), |
| 66 | PIN_FIELD_BASE(27, 27, 1, 0x30, 0x10, 16, 1), |
| 67 | PIN_FIELD_BASE(28, 28, 1, 0x30, 0x10, 19, 1), |
| 68 | PIN_FIELD_BASE(29, 29, 1, 0x30, 0x10, 20, 1), |
| 69 | PIN_FIELD_BASE(30, 30, 1, 0x30, 0x10, 23, 1), |
| 70 | PIN_FIELD_BASE(31, 31, 1, 0x30, 0x10, 22, 1), |
| 71 | PIN_FIELD_BASE(32, 32, 1, 0x30, 0x10, 21, 1), |
| 72 | PIN_FIELD_BASE(33, 33, 3, 0x20, 0x10, 4, 1), |
| 73 | PIN_FIELD_BASE(34, 34, 3, 0x20, 0x10, 8, 1), |
| 74 | PIN_FIELD_BASE(35, 35, 3, 0x20, 0x10, 7, 1), |
| 75 | PIN_FIELD_BASE(36, 36, 3, 0x20, 0x10, 5, 1), |
| 76 | PIN_FIELD_BASE(37, 37, 3, 0x20, 0x10, 6, 1), |
| 77 | PIN_FIELD_BASE(38, 38, 3, 0x20, 0x10, 9, 1), |
| 78 | PIN_FIELD_BASE(39, 39, 2, 0x40, 0x10, 18, 1), |
| 79 | PIN_FIELD_BASE(40, 40, 2, 0x40, 0x10, 19, 1), |
| 80 | PIN_FIELD_BASE(41, 41, 2, 0x40, 0x10, 12, 1), |
| 81 | PIN_FIELD_BASE(42, 42, 2, 0x40, 0x10, 22, 1), |
| 82 | PIN_FIELD_BASE(43, 43, 2, 0x40, 0x10, 23, 1), |
| 83 | PIN_FIELD_BASE(44, 44, 2, 0x40, 0x10, 20, 1), |
| 84 | PIN_FIELD_BASE(45, 45, 2, 0x40, 0x10, 21, 1), |
| 85 | PIN_FIELD_BASE(46, 46, 2, 0x40, 0x10, 26, 1), |
| 86 | PIN_FIELD_BASE(47, 47, 2, 0x40, 0x10, 27, 1), |
| 87 | PIN_FIELD_BASE(48, 48, 2, 0x40, 0x10, 24, 1), |
| 88 | PIN_FIELD_BASE(49, 49, 2, 0x40, 0x10, 25, 1), |
| 89 | PIN_FIELD_BASE(50, 50, 1, 0x30, 0x10, 2, 1), |
| 90 | PIN_FIELD_BASE(51, 51, 1, 0x30, 0x10, 3, 1), |
| 91 | PIN_FIELD_BASE(52, 52, 1, 0x30, 0x10, 4, 1), |
| 92 | PIN_FIELD_BASE(53, 53, 1, 0x30, 0x10, 5, 1), |
| 93 | PIN_FIELD_BASE(54, 54, 1, 0x30, 0x10, 6, 1), |
| 94 | PIN_FIELD_BASE(55, 55, 1, 0x30, 0x10, 7, 1), |
| 95 | PIN_FIELD_BASE(56, 56, 1, 0x30, 0x10, 8, 1), |
| 96 | PIN_FIELD_BASE(57, 57, 1, 0x30, 0x10, 9, 1), |
| 97 | PIN_FIELD_BASE(58, 58, 1, 0x30, 0x10, 1, 1), |
| 98 | PIN_FIELD_BASE(59, 59, 1, 0x30, 0x10, 0, 1), |
| 99 | PIN_FIELD_BASE(60, 60, 1, 0x30, 0x10, 10, 1), |
| 100 | PIN_FIELD_BASE(61, 61, 1, 0x30, 0x10, 11, 1), |
| 101 | PIN_FIELD_BASE(62, 62, 2, 0x40, 0x10, 15, 1), |
| 102 | PIN_FIELD_BASE(63, 63, 2, 0x40, 0x10, 14, 1), |
| 103 | PIN_FIELD_BASE(64, 64, 2, 0x40, 0x10, 13, 1), |
| 104 | PIN_FIELD_BASE(65, 65, 2, 0x40, 0x10, 16, 1), |
| 105 | PIN_FIELD_BASE(66, 66, 4, 0x20, 0x10, 2, 1), |
| 106 | PIN_FIELD_BASE(67, 67, 4, 0x20, 0x10, 3, 1), |
| 107 | PIN_FIELD_BASE(68, 68, 4, 0x20, 0x10, 4, 1), |
| 108 | PIN_FIELD_BASE(69, 69, 5, 0x30, 0x10, 1, 1), |
| 109 | PIN_FIELD_BASE(70, 70, 5, 0x30, 0x10, 0, 1), |
| 110 | PIN_FIELD_BASE(71, 71, 5, 0x30, 0x10, 16, 1), |
| 111 | PIN_FIELD_BASE(72, 72, 5, 0x30, 0x10, 14, 1), |
| 112 | PIN_FIELD_BASE(73, 73, 5, 0x30, 0x10, 15, 1), |
| 113 | PIN_FIELD_BASE(74, 74, 5, 0x30, 0x10, 4, 1), |
| 114 | PIN_FIELD_BASE(75, 75, 5, 0x30, 0x10, 6, 1), |
| 115 | PIN_FIELD_BASE(76, 76, 5, 0x30, 0x10, 7, 1), |
| 116 | PIN_FIELD_BASE(77, 77, 5, 0x30, 0x10, 8, 1), |
| 117 | PIN_FIELD_BASE(78, 78, 5, 0x30, 0x10, 2, 1), |
| 118 | PIN_FIELD_BASE(79, 79, 5, 0x30, 0x10, 3, 1), |
| 119 | PIN_FIELD_BASE(80, 80, 5, 0x30, 0x10, 9, 1), |
| 120 | PIN_FIELD_BASE(81, 81, 5, 0x30, 0x10, 10, 1), |
| 121 | PIN_FIELD_BASE(82, 82, 5, 0x30, 0x10, 11, 1), |
| 122 | PIN_FIELD_BASE(83, 83, 5, 0x30, 0x10, 12, 1), |
| 123 | PIN_FIELD_BASE(84, 84, 5, 0x30, 0x10, 13, 1), |
| 124 | PIN_FIELD_BASE(85, 85, 5, 0x30, 0x10, 5, 1), |
| 125 | PIN_FIELD_BASE(86, 86, 6, 0x30, 0x10, 1, 1), |
| 126 | PIN_FIELD_BASE(87, 87, 6, 0x30, 0x10, 0, 1), |
| 127 | PIN_FIELD_BASE(88, 88, 6, 0x30, 0x10, 14, 1), |
| 128 | PIN_FIELD_BASE(89, 89, 6, 0x30, 0x10, 12, 1), |
| 129 | PIN_FIELD_BASE(90, 90, 6, 0x30, 0x10, 13, 1), |
| 130 | PIN_FIELD_BASE(91, 91, 6, 0x30, 0x10, 4, 1), |
| 131 | PIN_FIELD_BASE(92, 92, 6, 0x30, 0x10, 5, 1), |
| 132 | PIN_FIELD_BASE(93, 93, 6, 0x30, 0x10, 6, 1), |
| 133 | PIN_FIELD_BASE(94, 94, 6, 0x30, 0x10, 7, 1), |
| 134 | PIN_FIELD_BASE(95, 95, 6, 0x30, 0x10, 2, 1), |
| 135 | PIN_FIELD_BASE(96, 96, 6, 0x30, 0x10, 3, 1), |
| 136 | PIN_FIELD_BASE(97, 97, 6, 0x30, 0x10, 8, 1), |
| 137 | PIN_FIELD_BASE(98, 98, 6, 0x30, 0x10, 9, 1), |
| 138 | PIN_FIELD_BASE(99, 99, 6, 0x30, 0x10, 10, 1), |
| 139 | PIN_FIELD_BASE(100, 100, 6, 0x30, 0x10, 11, 1), |
| 140 | }; |
| 141 | |
| 142 | static const struct mtk_pin_field_calc mt7986_pin_smt_range[] = { |
| 143 | PIN_FIELD_BASE(0, 0, 2, 0xf0, 0x10, 17, 1), |
| 144 | PIN_FIELD_BASE(1, 1, 3, 0x90, 0x10, 10, 1), |
| 145 | PIN_FIELD_BASE(2, 2, 3, 0x90, 0x10, 11, 1), |
| 146 | PIN_FIELD_BASE(3, 3, 4, 0x90, 0x10, 0, 1), |
| 147 | PIN_FIELD_BASE(4, 4, 4, 0x90, 0x10, 1, 1), |
| 148 | PIN_FIELD_BASE(5, 5, 2, 0xf0, 0x10, 0, 1), |
| 149 | PIN_FIELD_BASE(6, 6, 2, 0xf0, 0x10, 1, 1), |
| 150 | PIN_FIELD_BASE(7, 7, 3, 0x90, 0x10, 0, 1), |
| 151 | PIN_FIELD_BASE(8, 8, 3, 0x90, 0x10, 1, 1), |
| 152 | PIN_FIELD_BASE(9, 9, 3, 0x90, 0x10, 2, 1), |
| 153 | PIN_FIELD_BASE(10, 10, 3, 0x90, 0x10, 3, 1), |
| 154 | PIN_FIELD_BASE(11, 11, 2, 0xf0, 0x10, 8, 1), |
| 155 | PIN_FIELD_BASE(12, 12, 2, 0xf0, 0x10, 9, 1), |
| 156 | PIN_FIELD_BASE(13, 13, 2, 0xf0, 0x10, 10, 1), |
| 157 | PIN_FIELD_BASE(14, 14, 2, 0xf0, 0x10, 11, 1), |
| 158 | PIN_FIELD_BASE(15, 15, 2, 0xf0, 0x10, 2, 1), |
| 159 | PIN_FIELD_BASE(16, 16, 2, 0xf0, 0x10, 3, 1), |
| 160 | PIN_FIELD_BASE(17, 17, 2, 0xf0, 0x10, 4, 1), |
| 161 | PIN_FIELD_BASE(18, 18, 2, 0xf0, 0x10, 5, 1), |
| 162 | PIN_FIELD_BASE(19, 19, 2, 0xf0, 0x10, 6, 1), |
| 163 | PIN_FIELD_BASE(20, 20, 2, 0xf0, 0x10, 7, 1), |
| 164 | PIN_FIELD_BASE(21, 21, 1, 0xc0, 0x10, 12, 1), |
| 165 | PIN_FIELD_BASE(22, 22, 1, 0xc0, 0x10, 13, 1), |
| 166 | PIN_FIELD_BASE(23, 23, 1, 0xc0, 0x10, 14, 1), |
| 167 | PIN_FIELD_BASE(24, 24, 1, 0xc0, 0x10, 18, 1), |
| 168 | PIN_FIELD_BASE(25, 25, 1, 0xc0, 0x10, 17, 1), |
| 169 | PIN_FIELD_BASE(26, 26, 1, 0xc0, 0x10, 15, 1), |
| 170 | PIN_FIELD_BASE(27, 27, 1, 0xc0, 0x10, 16, 1), |
| 171 | PIN_FIELD_BASE(28, 28, 1, 0xc0, 0x10, 19, 1), |
| 172 | PIN_FIELD_BASE(29, 29, 1, 0xc0, 0x10, 20, 1), |
| 173 | PIN_FIELD_BASE(30, 30, 1, 0xc0, 0x10, 23, 1), |
| 174 | PIN_FIELD_BASE(31, 31, 1, 0xc0, 0x10, 22, 1), |
| 175 | PIN_FIELD_BASE(32, 32, 1, 0xc0, 0x10, 21, 1), |
| 176 | PIN_FIELD_BASE(33, 33, 3, 0x90, 0x10, 4, 1), |
| 177 | PIN_FIELD_BASE(34, 34, 3, 0x90, 0x10, 8, 1), |
| 178 | PIN_FIELD_BASE(35, 35, 3, 0x90, 0x10, 7, 1), |
| 179 | PIN_FIELD_BASE(36, 36, 3, 0x90, 0x10, 5, 1), |
| 180 | PIN_FIELD_BASE(37, 37, 3, 0x90, 0x10, 6, 1), |
| 181 | PIN_FIELD_BASE(38, 38, 3, 0x90, 0x10, 9, 1), |
| 182 | PIN_FIELD_BASE(39, 39, 2, 0xf0, 0x10, 18, 1), |
| 183 | PIN_FIELD_BASE(40, 40, 2, 0xf0, 0x10, 19, 1), |
| 184 | PIN_FIELD_BASE(41, 41, 2, 0xf0, 0x10, 12, 1), |
| 185 | PIN_FIELD_BASE(42, 42, 2, 0xf0, 0x10, 22, 1), |
| 186 | PIN_FIELD_BASE(43, 43, 2, 0xf0, 0x10, 23, 1), |
| 187 | PIN_FIELD_BASE(44, 44, 2, 0xf0, 0x10, 20, 1), |
| 188 | PIN_FIELD_BASE(45, 45, 2, 0xf0, 0x10, 21, 1), |
| 189 | PIN_FIELD_BASE(46, 46, 2, 0xf0, 0x10, 26, 1), |
| 190 | PIN_FIELD_BASE(47, 47, 2, 0xf0, 0x10, 27, 1), |
| 191 | PIN_FIELD_BASE(48, 48, 2, 0xf0, 0x10, 24, 1), |
| 192 | PIN_FIELD_BASE(49, 49, 2, 0xf0, 0x10, 25, 1), |
| 193 | PIN_FIELD_BASE(50, 50, 1, 0xc0, 0x10, 2, 1), |
| 194 | PIN_FIELD_BASE(51, 51, 1, 0xc0, 0x10, 3, 1), |
| 195 | PIN_FIELD_BASE(52, 52, 1, 0xc0, 0x10, 4, 1), |
| 196 | PIN_FIELD_BASE(53, 53, 1, 0xc0, 0x10, 5, 1), |
| 197 | PIN_FIELD_BASE(54, 54, 1, 0xc0, 0x10, 6, 1), |
| 198 | PIN_FIELD_BASE(55, 55, 1, 0xc0, 0x10, 7, 1), |
| 199 | PIN_FIELD_BASE(56, 56, 1, 0xc0, 0x10, 8, 1), |
| 200 | PIN_FIELD_BASE(57, 57, 1, 0xc0, 0x10, 9, 1), |
| 201 | PIN_FIELD_BASE(58, 58, 1, 0xc0, 0x10, 1, 1), |
| 202 | PIN_FIELD_BASE(59, 59, 1, 0xc0, 0x10, 0, 1), |
| 203 | PIN_FIELD_BASE(60, 60, 1, 0xc0, 0x10, 10, 1), |
| 204 | PIN_FIELD_BASE(61, 61, 1, 0xc0, 0x10, 11, 1), |
| 205 | PIN_FIELD_BASE(62, 62, 2, 0xf0, 0x10, 15, 1), |
| 206 | PIN_FIELD_BASE(63, 63, 2, 0xf0, 0x10, 14, 1), |
| 207 | PIN_FIELD_BASE(64, 64, 2, 0xf0, 0x10, 13, 1), |
| 208 | PIN_FIELD_BASE(65, 65, 2, 0xf0, 0x10, 16, 1), |
| 209 | PIN_FIELD_BASE(66, 66, 4, 0x90, 0x10, 2, 1), |
| 210 | PIN_FIELD_BASE(67, 67, 4, 0x90, 0x10, 3, 1), |
| 211 | PIN_FIELD_BASE(68, 68, 4, 0x90, 0x10, 4, 1), |
| 212 | PIN_FIELD_BASE(69, 69, 5, 0x80, 0x10, 1, 1), |
| 213 | PIN_FIELD_BASE(70, 70, 5, 0x80, 0x10, 0, 1), |
| 214 | PIN_FIELD_BASE(71, 71, 5, 0x80, 0x10, 16, 1), |
| 215 | PIN_FIELD_BASE(72, 72, 5, 0x80, 0x10, 14, 1), |
| 216 | PIN_FIELD_BASE(73, 73, 5, 0x80, 0x10, 15, 1), |
| 217 | PIN_FIELD_BASE(74, 74, 5, 0x80, 0x10, 4, 1), |
| 218 | PIN_FIELD_BASE(75, 75, 5, 0x80, 0x10, 6, 1), |
| 219 | PIN_FIELD_BASE(76, 76, 5, 0x80, 0x10, 7, 1), |
| 220 | PIN_FIELD_BASE(77, 77, 5, 0x80, 0x10, 8, 1), |
| 221 | PIN_FIELD_BASE(78, 78, 5, 0x80, 0x10, 2, 1), |
| 222 | PIN_FIELD_BASE(79, 79, 5, 0x80, 0x10, 3, 1), |
| 223 | PIN_FIELD_BASE(80, 80, 5, 0x80, 0x10, 9, 1), |
| 224 | PIN_FIELD_BASE(81, 81, 5, 0x80, 0x10, 10, 1), |
| 225 | PIN_FIELD_BASE(82, 82, 5, 0x80, 0x10, 11, 1), |
| 226 | PIN_FIELD_BASE(83, 83, 5, 0x80, 0x10, 12, 1), |
| 227 | PIN_FIELD_BASE(84, 84, 5, 0x80, 0x10, 13, 1), |
| 228 | PIN_FIELD_BASE(85, 85, 5, 0x80, 0x10, 5, 1), |
| 229 | PIN_FIELD_BASE(86, 86, 6, 0x70, 0x10, 1, 1), |
| 230 | PIN_FIELD_BASE(87, 87, 6, 0x70, 0x10, 0, 1), |
| 231 | PIN_FIELD_BASE(88, 88, 6, 0x70, 0x10, 14, 1), |
| 232 | PIN_FIELD_BASE(89, 89, 6, 0x70, 0x10, 12, 1), |
| 233 | PIN_FIELD_BASE(90, 90, 6, 0x70, 0x10, 13, 1), |
| 234 | PIN_FIELD_BASE(91, 91, 6, 0x70, 0x10, 4, 1), |
| 235 | PIN_FIELD_BASE(92, 92, 6, 0x70, 0x10, 5, 1), |
| 236 | PIN_FIELD_BASE(93, 93, 6, 0x70, 0x10, 6, 1), |
| 237 | PIN_FIELD_BASE(94, 94, 6, 0x70, 0x10, 7, 1), |
| 238 | PIN_FIELD_BASE(95, 95, 6, 0x70, 0x10, 2, 1), |
| 239 | PIN_FIELD_BASE(96, 96, 6, 0x70, 0x10, 3, 1), |
| 240 | PIN_FIELD_BASE(97, 97, 6, 0x70, 0x10, 8, 1), |
| 241 | PIN_FIELD_BASE(98, 98, 6, 0x70, 0x10, 9, 1), |
| 242 | PIN_FIELD_BASE(99, 99, 6, 0x70, 0x10, 10, 1), |
| 243 | PIN_FIELD_BASE(100, 100, 6, 0x70, 0x10, 11, 1), |
| 244 | }; |
| 245 | |
| 246 | static const struct mtk_pin_field_calc mt7986_pin_pu_range[] = { |
| 247 | PIN_FIELD_BASE(69, 69, 5, 0x50, 0x10, 1, 1), |
| 248 | PIN_FIELD_BASE(70, 70, 5, 0x50, 0x10, 0, 1), |
| 249 | PIN_FIELD_BASE(71, 71, 5, 0x50, 0x10, 16, 1), |
| 250 | PIN_FIELD_BASE(72, 72, 5, 0x50, 0x10, 14, 1), |
| 251 | PIN_FIELD_BASE(73, 73, 5, 0x50, 0x10, 15, 1), |
| 252 | PIN_FIELD_BASE(74, 74, 5, 0x50, 0x10, 4, 1), |
| 253 | PIN_FIELD_BASE(75, 75, 5, 0x50, 0x10, 6, 1), |
| 254 | PIN_FIELD_BASE(76, 76, 5, 0x50, 0x10, 7, 1), |
| 255 | PIN_FIELD_BASE(77, 77, 5, 0x50, 0x10, 8, 1), |
| 256 | PIN_FIELD_BASE(78, 78, 5, 0x50, 0x10, 2, 1), |
| 257 | PIN_FIELD_BASE(79, 79, 5, 0x50, 0x10, 3, 1), |
| 258 | PIN_FIELD_BASE(80, 80, 5, 0x50, 0x10, 9, 1), |
| 259 | PIN_FIELD_BASE(81, 81, 5, 0x50, 0x10, 10, 1), |
| 260 | PIN_FIELD_BASE(82, 82, 5, 0x50, 0x10, 11, 1), |
| 261 | PIN_FIELD_BASE(83, 83, 5, 0x50, 0x10, 12, 1), |
| 262 | PIN_FIELD_BASE(84, 84, 5, 0x50, 0x10, 13, 1), |
| 263 | PIN_FIELD_BASE(85, 85, 5, 0x50, 0x10, 5, 1), |
| 264 | PIN_FIELD_BASE(86, 86, 6, 0x50, 0x10, 1, 1), |
| 265 | PIN_FIELD_BASE(87, 87, 6, 0x50, 0x10, 0, 1), |
| 266 | PIN_FIELD_BASE(88, 88, 6, 0x50, 0x10, 14, 1), |
| 267 | PIN_FIELD_BASE(89, 89, 6, 0x50, 0x10, 12, 1), |
| 268 | PIN_FIELD_BASE(90, 90, 6, 0x50, 0x10, 13, 1), |
| 269 | PIN_FIELD_BASE(91, 91, 6, 0x50, 0x10, 4, 1), |
| 270 | PIN_FIELD_BASE(92, 92, 6, 0x50, 0x10, 5, 1), |
| 271 | PIN_FIELD_BASE(93, 93, 6, 0x50, 0x10, 6, 1), |
| 272 | PIN_FIELD_BASE(94, 94, 6, 0x50, 0x10, 7, 1), |
| 273 | PIN_FIELD_BASE(95, 95, 6, 0x50, 0x10, 2, 1), |
| 274 | PIN_FIELD_BASE(96, 96, 6, 0x50, 0x10, 3, 1), |
| 275 | PIN_FIELD_BASE(97, 97, 6, 0x50, 0x10, 8, 1), |
| 276 | PIN_FIELD_BASE(98, 98, 6, 0x50, 0x10, 9, 1), |
| 277 | PIN_FIELD_BASE(99, 99, 6, 0x50, 0x10, 10, 1), |
| 278 | PIN_FIELD_BASE(100, 100, 6, 0x50, 0x10, 11, 1), |
| 279 | }; |
| 280 | |
| 281 | static const struct mtk_pin_field_calc mt7986_pin_pd_range[] = { |
| 282 | PIN_FIELD_BASE(69, 69, 5, 0x40, 0x10, 1, 1), |
| 283 | PIN_FIELD_BASE(70, 70, 5, 0x40, 0x10, 0, 1), |
| 284 | PIN_FIELD_BASE(71, 71, 5, 0x40, 0x10, 16, 1), |
| 285 | PIN_FIELD_BASE(72, 72, 5, 0x40, 0x10, 14, 1), |
| 286 | PIN_FIELD_BASE(73, 73, 5, 0x40, 0x10, 15, 1), |
| 287 | PIN_FIELD_BASE(74, 74, 5, 0x40, 0x10, 4, 1), |
| 288 | PIN_FIELD_BASE(75, 75, 5, 0x40, 0x10, 6, 1), |
| 289 | PIN_FIELD_BASE(76, 76, 5, 0x40, 0x10, 7, 1), |
| 290 | PIN_FIELD_BASE(77, 77, 5, 0x40, 0x10, 8, 1), |
| 291 | PIN_FIELD_BASE(78, 78, 5, 0x40, 0x10, 2, 1), |
| 292 | PIN_FIELD_BASE(79, 79, 5, 0x40, 0x10, 3, 1), |
| 293 | PIN_FIELD_BASE(80, 80, 5, 0x40, 0x10, 9, 1), |
| 294 | PIN_FIELD_BASE(81, 81, 5, 0x40, 0x10, 10, 1), |
| 295 | PIN_FIELD_BASE(82, 82, 5, 0x40, 0x10, 11, 1), |
| 296 | PIN_FIELD_BASE(83, 83, 5, 0x40, 0x10, 12, 1), |
| 297 | PIN_FIELD_BASE(84, 84, 5, 0x40, 0x10, 13, 1), |
| 298 | PIN_FIELD_BASE(85, 85, 5, 0x40, 0x10, 5, 1), |
| 299 | PIN_FIELD_BASE(86, 86, 6, 0x40, 0x10, 1, 1), |
| 300 | PIN_FIELD_BASE(87, 87, 6, 0x40, 0x10, 0, 1), |
| 301 | PIN_FIELD_BASE(88, 88, 6, 0x40, 0x10, 14, 1), |
| 302 | PIN_FIELD_BASE(89, 89, 6, 0x40, 0x10, 12, 1), |
| 303 | PIN_FIELD_BASE(90, 90, 6, 0x40, 0x10, 13, 1), |
| 304 | PIN_FIELD_BASE(91, 91, 6, 0x40, 0x10, 4, 1), |
| 305 | PIN_FIELD_BASE(92, 92, 6, 0x40, 0x10, 5, 1), |
| 306 | PIN_FIELD_BASE(93, 93, 6, 0x40, 0x10, 6, 1), |
| 307 | PIN_FIELD_BASE(94, 94, 6, 0x40, 0x10, 7, 1), |
| 308 | PIN_FIELD_BASE(95, 95, 6, 0x40, 0x10, 2, 1), |
| 309 | PIN_FIELD_BASE(96, 96, 6, 0x40, 0x10, 3, 1), |
| 310 | PIN_FIELD_BASE(97, 97, 6, 0x40, 0x10, 8, 1), |
| 311 | PIN_FIELD_BASE(98, 98, 6, 0x40, 0x10, 9, 1), |
| 312 | PIN_FIELD_BASE(99, 99, 6, 0x40, 0x10, 10, 1), |
| 313 | PIN_FIELD_BASE(100, 100, 6, 0x40, 0x10, 11, 1), |
| 314 | }; |
| 315 | |
| 316 | static const struct mtk_pin_field_calc mt7986_pin_drv_range[] = { |
| 317 | PIN_FIELD_BASE(0, 0, 2, 0x10, 0x10, 21, 3), |
| 318 | PIN_FIELD_BASE(1, 1, 3, 0x10, 0x10, 0, 3), |
| 319 | PIN_FIELD_BASE(2, 2, 3, 0x10, 0x10, 3, 3), |
| 320 | PIN_FIELD_BASE(3, 3, 4, 0x00, 0x10, 0, 1), |
| 321 | PIN_FIELD_BASE(4, 4, 4, 0x00, 0x10, 1, 1), |
| 322 | PIN_FIELD_BASE(5, 5, 2, 0x00, 0x10, 0, 3), |
| 323 | PIN_FIELD_BASE(6, 6, 2, 0x00, 0x10, 21, 3), |
| 324 | PIN_FIELD_BASE(7, 7, 3, 0x00, 0x10, 0, 3), |
| 325 | PIN_FIELD_BASE(8, 8, 3, 0x00, 0x10, 3, 3), |
| 326 | PIN_FIELD_BASE(9, 9, 3, 0x00, 0x10, 6, 3), |
| 327 | PIN_FIELD_BASE(10, 10, 3, 0x00, 0x10, 9, 3), |
| 328 | PIN_FIELD_BASE(11, 11, 2, 0x00, 0x10, 24, 3), |
| 329 | PIN_FIELD_BASE(12, 12, 2, 0x00, 0x10, 27, 3), |
| 330 | PIN_FIELD_BASE(13, 13, 2, 0x10, 0x10, 0, 3), |
| 331 | PIN_FIELD_BASE(14, 14, 2, 0x10, 0x10, 3, 3), |
| 332 | PIN_FIELD_BASE(15, 15, 2, 0x00, 0x10, 3, 3), |
| 333 | PIN_FIELD_BASE(16, 16, 2, 0x00, 0x10, 6, 3), |
| 334 | PIN_FIELD_BASE(17, 17, 2, 0x00, 0x10, 9, 3), |
| 335 | PIN_FIELD_BASE(18, 18, 2, 0x00, 0x10, 12, 3), |
| 336 | PIN_FIELD_BASE(19, 19, 2, 0x00, 0x10, 15, 3), |
| 337 | PIN_FIELD_BASE(20, 20, 2, 0x00, 0x10, 18, 3), |
| 338 | PIN_FIELD_BASE(21, 21, 1, 0x10, 0x10, 6, 3), |
| 339 | PIN_FIELD_BASE(22, 22, 1, 0x10, 0x10, 9, 3), |
| 340 | PIN_FIELD_BASE(23, 23, 1, 0x10, 0x10, 12, 3), |
| 341 | PIN_FIELD_BASE(24, 24, 1, 0x10, 0x10, 24, 3), |
| 342 | PIN_FIELD_BASE(25, 25, 1, 0x10, 0x10, 21, 3), |
| 343 | PIN_FIELD_BASE(26, 26, 1, 0x10, 0x10, 15, 3), |
| 344 | PIN_FIELD_BASE(27, 27, 1, 0x10, 0x10, 18, 3), |
| 345 | PIN_FIELD_BASE(28, 28, 1, 0x10, 0x10, 27, 3), |
| 346 | PIN_FIELD_BASE(29, 29, 1, 0x20, 0x10, 0, 3), |
| 347 | PIN_FIELD_BASE(30, 30, 1, 0x20, 0x10, 9, 3), |
| 348 | PIN_FIELD_BASE(31, 31, 1, 0x20, 0x10, 6, 3), |
| 349 | PIN_FIELD_BASE(32, 32, 1, 0x20, 0x10, 3, 3), |
| 350 | PIN_FIELD_BASE(33, 33, 3, 0x00, 0x10, 12, 3), |
| 351 | PIN_FIELD_BASE(34, 34, 3, 0x00, 0x10, 24, 3), |
| 352 | PIN_FIELD_BASE(35, 35, 3, 0x00, 0x10, 21, 3), |
| 353 | PIN_FIELD_BASE(36, 36, 3, 0x00, 0x10, 15, 3), |
| 354 | PIN_FIELD_BASE(37, 37, 3, 0x00, 0x10, 18, 3), |
| 355 | PIN_FIELD_BASE(38, 38, 3, 0x00, 0x10, 27, 3), |
| 356 | PIN_FIELD_BASE(39, 39, 2, 0x10, 0x10, 27, 3), |
| 357 | PIN_FIELD_BASE(40, 40, 2, 0x20, 0x10, 0, 3), |
| 358 | PIN_FIELD_BASE(41, 41, 2, 0x10, 0x10, 6, 3), |
| 359 | PIN_FIELD_BASE(42, 42, 2, 0x20, 0x10, 9, 3), |
| 360 | PIN_FIELD_BASE(43, 43, 2, 0x20, 0x10, 12, 3), |
| 361 | PIN_FIELD_BASE(44, 44, 2, 0x20, 0x10, 3, 3), |
| 362 | PIN_FIELD_BASE(45, 45, 2, 0x20, 0x10, 6, 3), |
| 363 | PIN_FIELD_BASE(46, 46, 2, 0x20, 0x10, 21, 3), |
| 364 | PIN_FIELD_BASE(47, 47, 2, 0x20, 0x10, 24, 3), |
| 365 | PIN_FIELD_BASE(48, 48, 2, 0x20, 0x10, 15, 3), |
| 366 | PIN_FIELD_BASE(49, 49, 2, 0x20, 0x10, 18, 3), |
| 367 | PIN_FIELD_BASE(50, 50, 1, 0x00, 0x10, 6, 3), |
| 368 | PIN_FIELD_BASE(51, 51, 1, 0x00, 0x10, 9, 3), |
| 369 | PIN_FIELD_BASE(52, 52, 1, 0x00, 0x10, 12, 3), |
| 370 | PIN_FIELD_BASE(53, 53, 1, 0x00, 0x10, 15, 3), |
| 371 | PIN_FIELD_BASE(54, 54, 1, 0x00, 0x10, 18, 3), |
| 372 | PIN_FIELD_BASE(55, 55, 1, 0x00, 0x10, 21, 3), |
| 373 | PIN_FIELD_BASE(56, 56, 1, 0x00, 0x10, 24, 3), |
| 374 | PIN_FIELD_BASE(57, 57, 1, 0x00, 0x10, 27, 3), |
| 375 | PIN_FIELD_BASE(58, 58, 1, 0x00, 0x10, 3, 3), |
| 376 | PIN_FIELD_BASE(59, 59, 1, 0x00, 0x10, 0, 3), |
| 377 | PIN_FIELD_BASE(60, 60, 1, 0x10, 0x10, 0, 3), |
| 378 | PIN_FIELD_BASE(61, 61, 1, 0x10, 0x10, 3, 3), |
| 379 | PIN_FIELD_BASE(62, 62, 2, 0x10, 0x10, 15, 3), |
| 380 | PIN_FIELD_BASE(63, 63, 2, 0x10, 0x10, 12, 3), |
| 381 | PIN_FIELD_BASE(64, 64, 2, 0x10, 0x10, 9, 3), |
| 382 | PIN_FIELD_BASE(65, 65, 2, 0x10, 0x10, 18, 3), |
| 383 | PIN_FIELD_BASE(66, 66, 4, 0x00, 0x10, 2, 3), |
| 384 | PIN_FIELD_BASE(67, 67, 4, 0x00, 0x10, 5, 3), |
| 385 | PIN_FIELD_BASE(68, 68, 4, 0x00, 0x10, 8, 3), |
| 386 | PIN_FIELD_BASE(69, 69, 5, 0x00, 0x10, 3, 3), |
| 387 | PIN_FIELD_BASE(70, 70, 5, 0x00, 0x10, 0, 3), |
| 388 | PIN_FIELD_BASE(71, 71, 5, 0x10, 0x10, 18, 3), |
| 389 | PIN_FIELD_BASE(72, 72, 5, 0x10, 0x10, 12, 3), |
| 390 | PIN_FIELD_BASE(73, 73, 5, 0x10, 0x10, 15, 3), |
| 391 | PIN_FIELD_BASE(74, 74, 5, 0x00, 0x10, 15, 3), |
| 392 | PIN_FIELD_BASE(75, 75, 5, 0x00, 0x10, 18, 3), |
| 393 | PIN_FIELD_BASE(76, 76, 5, 0x00, 0x10, 21, 3), |
| 394 | PIN_FIELD_BASE(77, 77, 5, 0x00, 0x10, 24, 3), |
| 395 | PIN_FIELD_BASE(78, 78, 5, 0x00, 0x10, 6, 3), |
| 396 | PIN_FIELD_BASE(79, 79, 5, 0x00, 0x10, 9, 3), |
| 397 | PIN_FIELD_BASE(80, 80, 5, 0x00, 0x10, 27, 3), |
| 398 | PIN_FIELD_BASE(81, 81, 5, 0x10, 0x10, 0, 3), |
| 399 | PIN_FIELD_BASE(82, 82, 5, 0x10, 0x10, 3, 3), |
| 400 | PIN_FIELD_BASE(83, 83, 5, 0x10, 0x10, 6, 3), |
| 401 | PIN_FIELD_BASE(84, 84, 5, 0x10, 0x10, 9, 3), |
| 402 | PIN_FIELD_BASE(85, 85, 5, 0x00, 0x10, 12, 3), |
| 403 | PIN_FIELD_BASE(86, 86, 6, 0x00, 0x10, 3, 3), |
| 404 | PIN_FIELD_BASE(87, 87, 6, 0x00, 0x10, 0, 3), |
| 405 | PIN_FIELD_BASE(88, 88, 6, 0x10, 0x10, 12, 3), |
| 406 | PIN_FIELD_BASE(89, 89, 6, 0x10, 0x10, 6, 3), |
| 407 | PIN_FIELD_BASE(90, 90, 6, 0x10, 0x10, 9, 3), |
| 408 | PIN_FIELD_BASE(91, 91, 6, 0x00, 0x10, 12, 3), |
| 409 | PIN_FIELD_BASE(92, 92, 6, 0x00, 0x10, 15, 3), |
| 410 | PIN_FIELD_BASE(93, 93, 6, 0x00, 0x10, 18, 3), |
| 411 | PIN_FIELD_BASE(94, 94, 6, 0x00, 0x10, 21, 3), |
| 412 | PIN_FIELD_BASE(95, 95, 6, 0x00, 0x10, 6, 3), |
| 413 | PIN_FIELD_BASE(96, 96, 6, 0x00, 0x10, 9, 3), |
| 414 | PIN_FIELD_BASE(97, 97, 6, 0x00, 0x10, 24, 3), |
| 415 | PIN_FIELD_BASE(98, 98, 6, 0x00, 0x10, 27, 3), |
| 416 | PIN_FIELD_BASE(99, 99, 6, 0x10, 0x10, 2, 3), |
| 417 | PIN_FIELD_BASE(100, 100, 6, 0x10, 0x10, 5, 3), |
| 418 | }; |
| 419 | |
| 420 | static const struct mtk_pin_field_calc mt7986_pin_pupd_range[] = { |
| 421 | PIN_FIELD_BASE(0, 0, 2, 0x60, 0x10, 17, 1), |
| 422 | PIN_FIELD_BASE(1, 1, 3, 0x30, 0x10, 10, 1), |
| 423 | PIN_FIELD_BASE(2, 2, 3, 0x30, 0x10, 11, 1), |
| 424 | PIN_FIELD_BASE(3, 3, 4, 0x40, 0x10, 0, 1), |
| 425 | PIN_FIELD_BASE(4, 4, 4, 0x40, 0x10, 1, 1), |
| 426 | PIN_FIELD_BASE(5, 5, 2, 0x60, 0x10, 0, 1), |
| 427 | PIN_FIELD_BASE(6, 6, 2, 0x60, 0x10, 1, 1), |
| 428 | PIN_FIELD_BASE(7, 7, 3, 0x30, 0x10, 0, 1), |
| 429 | PIN_FIELD_BASE(8, 8, 3, 0x30, 0x10, 1, 1), |
| 430 | PIN_FIELD_BASE(9, 9, 3, 0x30, 0x10, 2, 1), |
| 431 | PIN_FIELD_BASE(10, 10, 3, 0x30, 0x10, 3, 1), |
| 432 | PIN_FIELD_BASE(11, 11, 2, 0x60, 0x10, 8, 1), |
| 433 | PIN_FIELD_BASE(12, 12, 2, 0x60, 0x10, 9, 1), |
| 434 | PIN_FIELD_BASE(13, 13, 2, 0x60, 0x10, 10, 1), |
| 435 | PIN_FIELD_BASE(14, 14, 2, 0x60, 0x10, 11, 1), |
| 436 | PIN_FIELD_BASE(15, 15, 2, 0x60, 0x10, 2, 1), |
| 437 | PIN_FIELD_BASE(16, 16, 2, 0x60, 0x10, 3, 1), |
| 438 | PIN_FIELD_BASE(17, 17, 2, 0x60, 0x10, 4, 1), |
| 439 | PIN_FIELD_BASE(18, 18, 2, 0x60, 0x10, 5, 1), |
| 440 | PIN_FIELD_BASE(19, 19, 2, 0x60, 0x10, 6, 1), |
| 441 | PIN_FIELD_BASE(20, 20, 2, 0x60, 0x10, 7, 1), |
| 442 | PIN_FIELD_BASE(21, 21, 1, 0x40, 0x10, 12, 1), |
| 443 | PIN_FIELD_BASE(22, 22, 1, 0x40, 0x10, 13, 1), |
| 444 | PIN_FIELD_BASE(23, 23, 1, 0x40, 0x10, 14, 1), |
| 445 | PIN_FIELD_BASE(24, 24, 1, 0x40, 0x10, 18, 1), |
| 446 | PIN_FIELD_BASE(25, 25, 1, 0x40, 0x10, 17, 1), |
| 447 | PIN_FIELD_BASE(26, 26, 1, 0x40, 0x10, 15, 1), |
| 448 | PIN_FIELD_BASE(27, 27, 1, 0x40, 0x10, 16, 1), |
| 449 | PIN_FIELD_BASE(28, 28, 1, 0x40, 0x10, 19, 1), |
| 450 | PIN_FIELD_BASE(29, 29, 1, 0x40, 0x10, 20, 1), |
| 451 | PIN_FIELD_BASE(30, 30, 1, 0x40, 0x10, 23, 1), |
| 452 | PIN_FIELD_BASE(31, 31, 1, 0x40, 0x10, 22, 1), |
| 453 | PIN_FIELD_BASE(32, 32, 1, 0x40, 0x10, 21, 1), |
| 454 | PIN_FIELD_BASE(33, 33, 3, 0x30, 0x10, 4, 1), |
| 455 | PIN_FIELD_BASE(34, 34, 3, 0x30, 0x10, 8, 1), |
| 456 | PIN_FIELD_BASE(35, 35, 3, 0x30, 0x10, 7, 1), |
| 457 | PIN_FIELD_BASE(36, 36, 3, 0x30, 0x10, 5, 1), |
| 458 | PIN_FIELD_BASE(37, 37, 3, 0x30, 0x10, 6, 1), |
| 459 | PIN_FIELD_BASE(38, 38, 3, 0x30, 0x10, 9, 1), |
| 460 | PIN_FIELD_BASE(39, 39, 2, 0x60, 0x10, 18, 1), |
| 461 | PIN_FIELD_BASE(40, 40, 2, 0x60, 0x10, 19, 1), |
| 462 | PIN_FIELD_BASE(41, 41, 2, 0x60, 0x10, 12, 1), |
developer | e0c5667 | 2022-02-21 10:07:15 +0800 | [diff] [blame] | 463 | PIN_FIELD_BASE(42, 42, 2, 0x60, 0x10, 23, 1), |
| 464 | PIN_FIELD_BASE(43, 43, 2, 0x60, 0x10, 24, 1), |
| 465 | PIN_FIELD_BASE(44, 44, 2, 0x60, 0x10, 21, 1), |
| 466 | PIN_FIELD_BASE(45, 45, 2, 0x60, 0x10, 22, 1), |
| 467 | PIN_FIELD_BASE(46, 46, 2, 0x60, 0x10, 27, 1), |
| 468 | PIN_FIELD_BASE(47, 47, 2, 0x60, 0x10, 28, 1), |
| 469 | PIN_FIELD_BASE(48, 48, 2, 0x60, 0x10, 25, 1), |
| 470 | PIN_FIELD_BASE(49, 49, 2, 0x60, 0x10, 26, 1), |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 471 | PIN_FIELD_BASE(50, 50, 1, 0x40, 0x10, 2, 1), |
| 472 | PIN_FIELD_BASE(51, 51, 1, 0x40, 0x10, 3, 1), |
| 473 | PIN_FIELD_BASE(52, 52, 1, 0x40, 0x10, 4, 1), |
| 474 | PIN_FIELD_BASE(53, 53, 1, 0x40, 0x10, 5, 1), |
| 475 | PIN_FIELD_BASE(54, 54, 1, 0x40, 0x10, 6, 1), |
| 476 | PIN_FIELD_BASE(55, 55, 1, 0x40, 0x10, 7, 1), |
| 477 | PIN_FIELD_BASE(56, 56, 1, 0x40, 0x10, 8, 1), |
| 478 | PIN_FIELD_BASE(57, 57, 1, 0x40, 0x10, 9, 1), |
| 479 | PIN_FIELD_BASE(58, 58, 1, 0x40, 0x10, 1, 1), |
| 480 | PIN_FIELD_BASE(59, 59, 1, 0x40, 0x10, 0, 1), |
| 481 | PIN_FIELD_BASE(60, 60, 1, 0x40, 0x10, 10, 1), |
| 482 | PIN_FIELD_BASE(61, 61, 1, 0x40, 0x10, 11, 1), |
| 483 | PIN_FIELD_BASE(62, 62, 2, 0x60, 0x10, 15, 1), |
| 484 | PIN_FIELD_BASE(63, 63, 2, 0x60, 0x10, 14, 1), |
| 485 | PIN_FIELD_BASE(64, 64, 2, 0x60, 0x10, 13, 1), |
| 486 | PIN_FIELD_BASE(65, 65, 2, 0x60, 0x10, 16, 1), |
| 487 | PIN_FIELD_BASE(66, 66, 4, 0x40, 0x10, 2, 1), |
| 488 | PIN_FIELD_BASE(67, 67, 4, 0x40, 0x10, 3, 1), |
| 489 | PIN_FIELD_BASE(68, 68, 4, 0x40, 0x10, 4, 1), |
| 490 | }; |
| 491 | |
| 492 | static const struct mtk_pin_field_calc mt7986_pin_r0_range[] = { |
| 493 | PIN_FIELD_BASE(0, 0, 2, 0x70, 0x10, 17, 1), |
| 494 | PIN_FIELD_BASE(1, 1, 3, 0x40, 0x10, 10, 1), |
| 495 | PIN_FIELD_BASE(2, 2, 3, 0x40, 0x10, 11, 1), |
| 496 | PIN_FIELD_BASE(3, 3, 4, 0x50, 0x10, 0, 1), |
| 497 | PIN_FIELD_BASE(4, 4, 4, 0x50, 0x10, 1, 1), |
| 498 | PIN_FIELD_BASE(5, 5, 2, 0x70, 0x10, 0, 1), |
| 499 | PIN_FIELD_BASE(6, 6, 2, 0x70, 0x10, 1, 1), |
| 500 | PIN_FIELD_BASE(7, 7, 3, 0x40, 0x10, 0, 1), |
| 501 | PIN_FIELD_BASE(8, 8, 3, 0x40, 0x10, 1, 1), |
| 502 | PIN_FIELD_BASE(9, 9, 3, 0x40, 0x10, 2, 1), |
| 503 | PIN_FIELD_BASE(10, 10, 3, 0x40, 0x10, 3, 1), |
| 504 | PIN_FIELD_BASE(11, 11, 2, 0x70, 0x10, 8, 1), |
| 505 | PIN_FIELD_BASE(12, 12, 2, 0x70, 0x10, 9, 1), |
| 506 | PIN_FIELD_BASE(13, 13, 2, 0x70, 0x10, 10, 1), |
| 507 | PIN_FIELD_BASE(14, 14, 2, 0x70, 0x10, 11, 1), |
| 508 | PIN_FIELD_BASE(15, 15, 2, 0x70, 0x10, 2, 1), |
| 509 | PIN_FIELD_BASE(16, 16, 2, 0x70, 0x10, 3, 1), |
| 510 | PIN_FIELD_BASE(17, 17, 2, 0x70, 0x10, 4, 1), |
| 511 | PIN_FIELD_BASE(18, 18, 2, 0x70, 0x10, 5, 1), |
| 512 | PIN_FIELD_BASE(19, 19, 2, 0x70, 0x10, 6, 1), |
| 513 | PIN_FIELD_BASE(20, 20, 2, 0x70, 0x10, 7, 1), |
| 514 | PIN_FIELD_BASE(21, 21, 1, 0x50, 0x10, 12, 1), |
| 515 | PIN_FIELD_BASE(22, 22, 1, 0x50, 0x10, 13, 1), |
| 516 | PIN_FIELD_BASE(23, 23, 1, 0x50, 0x10, 14, 1), |
| 517 | PIN_FIELD_BASE(24, 24, 1, 0x50, 0x10, 18, 1), |
| 518 | PIN_FIELD_BASE(25, 25, 1, 0x50, 0x10, 17, 1), |
| 519 | PIN_FIELD_BASE(26, 26, 1, 0x50, 0x10, 15, 1), |
| 520 | PIN_FIELD_BASE(27, 27, 1, 0x50, 0x10, 16, 1), |
| 521 | PIN_FIELD_BASE(28, 28, 1, 0x50, 0x10, 19, 1), |
| 522 | PIN_FIELD_BASE(29, 29, 1, 0x50, 0x10, 20, 1), |
| 523 | PIN_FIELD_BASE(30, 30, 1, 0x50, 0x10, 23, 1), |
| 524 | PIN_FIELD_BASE(31, 31, 1, 0x50, 0x10, 22, 1), |
| 525 | PIN_FIELD_BASE(32, 32, 1, 0x50, 0x10, 21, 1), |
| 526 | PIN_FIELD_BASE(33, 33, 3, 0x40, 0x10, 4, 1), |
| 527 | PIN_FIELD_BASE(34, 34, 3, 0x40, 0x10, 8, 1), |
| 528 | PIN_FIELD_BASE(35, 35, 3, 0x40, 0x10, 7, 1), |
| 529 | PIN_FIELD_BASE(36, 36, 3, 0x40, 0x10, 5, 1), |
| 530 | PIN_FIELD_BASE(37, 37, 3, 0x40, 0x10, 6, 1), |
| 531 | PIN_FIELD_BASE(38, 38, 3, 0x40, 0x10, 9, 1), |
| 532 | PIN_FIELD_BASE(39, 39, 2, 0x70, 0x10, 18, 1), |
| 533 | PIN_FIELD_BASE(40, 40, 2, 0x70, 0x10, 19, 1), |
| 534 | PIN_FIELD_BASE(41, 41, 2, 0x70, 0x10, 12, 1), |
developer | e0c5667 | 2022-02-21 10:07:15 +0800 | [diff] [blame] | 535 | PIN_FIELD_BASE(42, 42, 2, 0x70, 0x10, 23, 1), |
| 536 | PIN_FIELD_BASE(43, 43, 2, 0x70, 0x10, 24, 1), |
| 537 | PIN_FIELD_BASE(44, 44, 2, 0x70, 0x10, 21, 1), |
| 538 | PIN_FIELD_BASE(45, 45, 2, 0x70, 0x10, 22, 1), |
| 539 | PIN_FIELD_BASE(46, 46, 2, 0x70, 0x10, 27, 1), |
| 540 | PIN_FIELD_BASE(47, 47, 2, 0x70, 0x10, 28, 1), |
| 541 | PIN_FIELD_BASE(48, 48, 2, 0x70, 0x10, 25, 1), |
| 542 | PIN_FIELD_BASE(49, 49, 2, 0x70, 0x10, 26, 1), |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 543 | PIN_FIELD_BASE(50, 50, 1, 0x50, 0x10, 2, 1), |
| 544 | PIN_FIELD_BASE(51, 51, 1, 0x50, 0x10, 3, 1), |
| 545 | PIN_FIELD_BASE(52, 52, 1, 0x50, 0x10, 4, 1), |
| 546 | PIN_FIELD_BASE(53, 53, 1, 0x50, 0x10, 5, 1), |
| 547 | PIN_FIELD_BASE(54, 54, 1, 0x50, 0x10, 6, 1), |
| 548 | PIN_FIELD_BASE(55, 55, 1, 0x50, 0x10, 7, 1), |
| 549 | PIN_FIELD_BASE(56, 56, 1, 0x50, 0x10, 8, 1), |
| 550 | PIN_FIELD_BASE(57, 57, 1, 0x50, 0x10, 9, 1), |
| 551 | PIN_FIELD_BASE(58, 58, 1, 0x50, 0x10, 1, 1), |
| 552 | PIN_FIELD_BASE(59, 59, 1, 0x50, 0x10, 0, 1), |
| 553 | PIN_FIELD_BASE(60, 60, 1, 0x50, 0x10, 10, 1), |
| 554 | PIN_FIELD_BASE(61, 61, 1, 0x50, 0x10, 11, 1), |
| 555 | PIN_FIELD_BASE(62, 62, 2, 0x70, 0x10, 15, 1), |
| 556 | PIN_FIELD_BASE(63, 63, 2, 0x70, 0x10, 14, 1), |
| 557 | PIN_FIELD_BASE(64, 64, 2, 0x70, 0x10, 13, 1), |
| 558 | PIN_FIELD_BASE(65, 65, 2, 0x70, 0x10, 16, 1), |
| 559 | PIN_FIELD_BASE(66, 66, 4, 0x50, 0x10, 2, 1), |
| 560 | PIN_FIELD_BASE(67, 67, 4, 0x50, 0x10, 3, 1), |
| 561 | PIN_FIELD_BASE(68, 68, 4, 0x50, 0x10, 4, 1), |
| 562 | }; |
| 563 | |
| 564 | static const struct mtk_pin_field_calc mt7986_pin_r1_range[] = { |
| 565 | PIN_FIELD_BASE(0, 0, 2, 0x80, 0x10, 17, 1), |
| 566 | PIN_FIELD_BASE(1, 1, 3, 0x50, 0x10, 10, 1), |
| 567 | PIN_FIELD_BASE(2, 2, 3, 0x50, 0x10, 11, 1), |
| 568 | PIN_FIELD_BASE(3, 3, 4, 0x60, 0x10, 0, 1), |
| 569 | PIN_FIELD_BASE(4, 4, 4, 0x60, 0x10, 1, 1), |
| 570 | PIN_FIELD_BASE(5, 5, 2, 0x80, 0x10, 0, 1), |
| 571 | PIN_FIELD_BASE(6, 6, 2, 0x80, 0x10, 1, 1), |
| 572 | PIN_FIELD_BASE(7, 7, 3, 0x50, 0x10, 0, 1), |
| 573 | PIN_FIELD_BASE(8, 8, 3, 0x50, 0x10, 1, 1), |
| 574 | PIN_FIELD_BASE(9, 9, 3, 0x50, 0x10, 2, 1), |
| 575 | PIN_FIELD_BASE(10, 10, 3, 0x50, 0x10, 3, 1), |
| 576 | PIN_FIELD_BASE(11, 11, 2, 0x80, 0x10, 8, 1), |
| 577 | PIN_FIELD_BASE(12, 12, 2, 0x80, 0x10, 9, 1), |
| 578 | PIN_FIELD_BASE(13, 13, 2, 0x80, 0x10, 10, 1), |
| 579 | PIN_FIELD_BASE(14, 14, 2, 0x80, 0x10, 11, 1), |
| 580 | PIN_FIELD_BASE(15, 15, 2, 0x80, 0x10, 2, 1), |
| 581 | PIN_FIELD_BASE(16, 16, 2, 0x80, 0x10, 3, 1), |
| 582 | PIN_FIELD_BASE(17, 17, 2, 0x80, 0x10, 4, 1), |
| 583 | PIN_FIELD_BASE(18, 18, 2, 0x80, 0x10, 5, 1), |
| 584 | PIN_FIELD_BASE(19, 19, 2, 0x80, 0x10, 6, 1), |
| 585 | PIN_FIELD_BASE(20, 20, 2, 0x80, 0x10, 7, 1), |
| 586 | PIN_FIELD_BASE(21, 21, 1, 0x60, 0x10, 12, 1), |
| 587 | PIN_FIELD_BASE(22, 22, 1, 0x60, 0x10, 13, 1), |
| 588 | PIN_FIELD_BASE(23, 23, 1, 0x60, 0x10, 14, 1), |
| 589 | PIN_FIELD_BASE(24, 24, 1, 0x60, 0x10, 18, 1), |
| 590 | PIN_FIELD_BASE(25, 25, 1, 0x60, 0x10, 17, 1), |
| 591 | PIN_FIELD_BASE(26, 26, 1, 0x60, 0x10, 15, 1), |
| 592 | PIN_FIELD_BASE(27, 27, 1, 0x60, 0x10, 16, 1), |
| 593 | PIN_FIELD_BASE(28, 28, 1, 0x60, 0x10, 19, 1), |
| 594 | PIN_FIELD_BASE(29, 29, 1, 0x60, 0x10, 20, 1), |
| 595 | PIN_FIELD_BASE(30, 30, 1, 0x60, 0x10, 23, 1), |
| 596 | PIN_FIELD_BASE(31, 31, 1, 0x60, 0x10, 22, 1), |
| 597 | PIN_FIELD_BASE(32, 32, 1, 0x60, 0x10, 21, 1), |
| 598 | PIN_FIELD_BASE(33, 33, 3, 0x50, 0x10, 4, 1), |
| 599 | PIN_FIELD_BASE(34, 34, 3, 0x50, 0x10, 8, 1), |
| 600 | PIN_FIELD_BASE(35, 35, 3, 0x50, 0x10, 7, 1), |
| 601 | PIN_FIELD_BASE(36, 36, 3, 0x50, 0x10, 5, 1), |
| 602 | PIN_FIELD_BASE(37, 37, 3, 0x50, 0x10, 6, 1), |
| 603 | PIN_FIELD_BASE(38, 38, 3, 0x50, 0x10, 9, 1), |
| 604 | PIN_FIELD_BASE(39, 39, 2, 0x80, 0x10, 18, 1), |
| 605 | PIN_FIELD_BASE(40, 40, 2, 0x80, 0x10, 19, 1), |
| 606 | PIN_FIELD_BASE(41, 41, 2, 0x80, 0x10, 12, 1), |
developer | e0c5667 | 2022-02-21 10:07:15 +0800 | [diff] [blame] | 607 | PIN_FIELD_BASE(42, 42, 2, 0x80, 0x10, 23, 1), |
| 608 | PIN_FIELD_BASE(43, 43, 2, 0x80, 0x10, 24, 1), |
| 609 | PIN_FIELD_BASE(44, 44, 2, 0x80, 0x10, 21, 1), |
| 610 | PIN_FIELD_BASE(45, 45, 2, 0x80, 0x10, 22, 1), |
| 611 | PIN_FIELD_BASE(46, 46, 2, 0x80, 0x10, 27, 1), |
| 612 | PIN_FIELD_BASE(47, 47, 2, 0x80, 0x10, 28, 1), |
| 613 | PIN_FIELD_BASE(48, 48, 2, 0x80, 0x10, 25, 1), |
| 614 | PIN_FIELD_BASE(49, 49, 2, 0x80, 0x10, 26, 1), |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 615 | PIN_FIELD_BASE(50, 50, 1, 0x60, 0x10, 2, 1), |
| 616 | PIN_FIELD_BASE(51, 51, 1, 0x60, 0x10, 3, 1), |
| 617 | PIN_FIELD_BASE(52, 52, 1, 0x60, 0x10, 4, 1), |
| 618 | PIN_FIELD_BASE(53, 53, 1, 0x60, 0x10, 5, 1), |
| 619 | PIN_FIELD_BASE(54, 54, 1, 0x60, 0x10, 6, 1), |
| 620 | PIN_FIELD_BASE(55, 55, 1, 0x60, 0x10, 7, 1), |
| 621 | PIN_FIELD_BASE(56, 56, 1, 0x60, 0x10, 8, 1), |
| 622 | PIN_FIELD_BASE(57, 57, 1, 0x60, 0x10, 9, 1), |
| 623 | PIN_FIELD_BASE(58, 58, 1, 0x60, 0x10, 1, 1), |
| 624 | PIN_FIELD_BASE(59, 59, 1, 0x60, 0x10, 0, 1), |
| 625 | PIN_FIELD_BASE(60, 60, 1, 0x60, 0x10, 10, 1), |
| 626 | PIN_FIELD_BASE(61, 61, 1, 0x60, 0x10, 11, 1), |
| 627 | PIN_FIELD_BASE(62, 62, 2, 0x80, 0x10, 15, 1), |
| 628 | PIN_FIELD_BASE(63, 63, 2, 0x80, 0x10, 14, 1), |
| 629 | PIN_FIELD_BASE(64, 64, 2, 0x80, 0x10, 13, 1), |
| 630 | PIN_FIELD_BASE(65, 65, 2, 0x80, 0x10, 16, 1), |
| 631 | PIN_FIELD_BASE(66, 66, 4, 0x60, 0x10, 2, 1), |
| 632 | PIN_FIELD_BASE(67, 67, 4, 0x60, 0x10, 3, 1), |
| 633 | PIN_FIELD_BASE(68, 68, 4, 0x60, 0x10, 4, 1), |
| 634 | }; |
| 635 | |
| 636 | static const struct mtk_pin_reg_calc mt7986_reg_cals[] = { |
| 637 | [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt7986_pin_mode_range), |
| 638 | [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt7986_pin_dir_range), |
| 639 | [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt7986_pin_di_range), |
| 640 | [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt7986_pin_do_range), |
| 641 | [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt7986_pin_smt_range), |
| 642 | [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt7986_pin_ies_range), |
| 643 | [PINCTRL_PIN_REG_PU] = MTK_RANGE(mt7986_pin_pu_range), |
| 644 | [PINCTRL_PIN_REG_PD] = MTK_RANGE(mt7986_pin_pd_range), |
| 645 | [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt7986_pin_drv_range), |
| 646 | [PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt7986_pin_pupd_range), |
| 647 | [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt7986_pin_r0_range), |
| 648 | [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt7986_pin_r1_range), |
| 649 | }; |
| 650 | |
| 651 | static const struct mtk_pin_desc mt7986_pins[] = { |
| 652 | MT7986_PIN(0, "SYS_WATCHDOG"), |
| 653 | MT7986_PIN(1, "WF2G_LED"), |
| 654 | MT7986_PIN(2, "WF5G_LED"), |
| 655 | MT7986_PIN(3, "I2C_SCL"), |
| 656 | MT7986_PIN(4, "I2C_SDA"), |
| 657 | MT7986_PIN(5, "GPIO_0"), |
| 658 | MT7986_PIN(6, "GPIO_1"), |
| 659 | MT7986_PIN(7, "GPIO_2"), |
| 660 | MT7986_PIN(8, "GPIO_3"), |
| 661 | MT7986_PIN(9, "GPIO_4"), |
| 662 | MT7986_PIN(10, "GPIO_5"), |
| 663 | MT7986_PIN(11, "GPIO_6"), |
| 664 | MT7986_PIN(12, "GPIO_7"), |
| 665 | MT7986_PIN(13, "GPIO_8"), |
| 666 | MT7986_PIN(14, "GPIO_9"), |
| 667 | MT7986_PIN(15, "GPIO_10"), |
| 668 | MT7986_PIN(16, "GPIO_11"), |
| 669 | MT7986_PIN(17, "GPIO_12"), |
| 670 | MT7986_PIN(18, "GPIO_13"), |
| 671 | MT7986_PIN(19, "GPIO_14"), |
| 672 | MT7986_PIN(20, "GPIO_15"), |
| 673 | MT7986_PIN(21, "PWM0"), |
| 674 | MT7986_PIN(22, "PWM1"), |
| 675 | MT7986_PIN(23, "SPI0_CLK"), |
| 676 | MT7986_PIN(24, "SPI0_MOSI"), |
| 677 | MT7986_PIN(25, "SPI0_MISO"), |
| 678 | MT7986_PIN(26, "SPI0_CS"), |
| 679 | MT7986_PIN(27, "SPI0_HOLD"), |
| 680 | MT7986_PIN(28, "SPI0_WP"), |
| 681 | MT7986_PIN(29, "SPI1_CLK"), |
| 682 | MT7986_PIN(30, "SPI1_MOSI"), |
| 683 | MT7986_PIN(31, "SPI1_MISO"), |
| 684 | MT7986_PIN(32, "SPI1_CS"), |
| 685 | MT7986_PIN(33, "SPI2_CLK"), |
| 686 | MT7986_PIN(34, "SPI2_MOSI"), |
| 687 | MT7986_PIN(35, "SPI2_MISO"), |
| 688 | MT7986_PIN(36, "SPI2_CS"), |
| 689 | MT7986_PIN(37, "SPI2_HOLD"), |
| 690 | MT7986_PIN(38, "SPI2_WP"), |
| 691 | MT7986_PIN(39, "UART0_RXD"), |
| 692 | MT7986_PIN(40, "UART0_TXD"), |
| 693 | MT7986_PIN(41, "PCIE_PERESET_N"), |
| 694 | MT7986_PIN(42, "UART1_RXD"), |
| 695 | MT7986_PIN(43, "UART1_TXD"), |
| 696 | MT7986_PIN(44, "UART1_CTS"), |
| 697 | MT7986_PIN(45, "UART1_RTS"), |
| 698 | MT7986_PIN(46, "UART2_RXD"), |
| 699 | MT7986_PIN(47, "UART2_TXD"), |
| 700 | MT7986_PIN(48, "UART2_CTS"), |
| 701 | MT7986_PIN(49, "UART2_RTS"), |
| 702 | MT7986_PIN(50, "EMMC_DATA_0"), |
| 703 | MT7986_PIN(51, "EMMC_DATA_1"), |
| 704 | MT7986_PIN(52, "EMMC_DATA_2"), |
| 705 | MT7986_PIN(53, "EMMC_DATA_3"), |
| 706 | MT7986_PIN(54, "EMMC_DATA_4"), |
| 707 | MT7986_PIN(55, "EMMC_DATA_5"), |
| 708 | MT7986_PIN(56, "EMMC_DATA_6"), |
| 709 | MT7986_PIN(57, "EMMC_DATA_7"), |
| 710 | MT7986_PIN(58, "EMMC_CMD"), |
| 711 | MT7986_PIN(59, "EMMC_CK"), |
| 712 | MT7986_PIN(60, "EMMC_DSL"), |
| 713 | MT7986_PIN(61, "EMMC_RSTB"), |
| 714 | MT7986_PIN(62, "PCM_DTX"), |
| 715 | MT7986_PIN(63, "PCM_DRX"), |
| 716 | MT7986_PIN(64, "PCM_CLK"), |
| 717 | MT7986_PIN(65, "PCM_FS"), |
| 718 | MT7986_PIN(66, "MT7531_INT"), |
| 719 | MT7986_PIN(67, "SMI_MDC"), |
| 720 | MT7986_PIN(68, "SMI_MDIO"), |
| 721 | MT7986_PIN(69, "WF0_DIG_RESETB"), |
| 722 | MT7986_PIN(70, "WF0_CBA_RESETB"), |
| 723 | MT7986_PIN(71, "WF0_XO_REQ"), |
| 724 | MT7986_PIN(72, "WF0_TOP_CLK"), |
| 725 | MT7986_PIN(73, "WF0_TOP_DATA"), |
| 726 | MT7986_PIN(74, "WF0_HB1"), |
| 727 | MT7986_PIN(75, "WF0_HB2"), |
| 728 | MT7986_PIN(76, "WF0_HB3"), |
| 729 | MT7986_PIN(77, "WF0_HB4"), |
| 730 | MT7986_PIN(78, "WF0_HB0"), |
| 731 | MT7986_PIN(79, "WF0_HB0_B"), |
| 732 | MT7986_PIN(80, "WF0_HB5"), |
| 733 | MT7986_PIN(81, "WF0_HB6"), |
| 734 | MT7986_PIN(82, "WF0_HB7"), |
| 735 | MT7986_PIN(83, "WF0_HB8"), |
| 736 | MT7986_PIN(84, "WF0_HB9"), |
| 737 | MT7986_PIN(85, "WF0_HB10"), |
| 738 | MT7986_PIN(86, "WF1_DIG_RESETB"), |
| 739 | MT7986_PIN(87, "WF1_CBA_RESETB"), |
| 740 | MT7986_PIN(88, "WF1_XO_REQ"), |
| 741 | MT7986_PIN(89, "WF1_TOP_CLK"), |
| 742 | MT7986_PIN(90, "WF1_TOP_DATA"), |
| 743 | MT7986_PIN(91, "WF1_HB1"), |
| 744 | MT7986_PIN(92, "WF1_HB2"), |
| 745 | MT7986_PIN(93, "WF1_HB3"), |
| 746 | MT7986_PIN(94, "WF1_HB4"), |
| 747 | MT7986_PIN(95, "WF1_HB0"), |
| 748 | MT7986_PIN(96, "WF1_HB0_B"), |
| 749 | MT7986_PIN(97, "WF1_HB5"), |
| 750 | MT7986_PIN(98, "WF1_HB6"), |
| 751 | MT7986_PIN(99, "WF1_HB7"), |
| 752 | MT7986_PIN(100, "WF1_HB8"), |
| 753 | }; |
| 754 | |
| 755 | /* List all groups consisting of these pins dedicated to the enablement of |
| 756 | * certain hardware block and the corresponding mode for all of the pins. |
| 757 | * The hardware probably has multiple combinations of these pinouts. |
| 758 | */ |
| 759 | |
| 760 | /* SYS_WATCHDOG */ |
| 761 | static int mt7986_watchdog_pins[] = { 0, }; |
| 762 | static int mt7986_watchdog_funcs[] = { 1, }; |
| 763 | |
| 764 | /* WF2G_LED(1), WF5G_LED */ |
| 765 | static int mt7986_wifi_led_pins[] = { 1, 2, }; |
| 766 | static int mt7986_wifi_led_funcs[] = { 1, 1, }; |
| 767 | |
| 768 | /* I2C */ |
| 769 | static int mt7986_i2c_pins[] = { 3, 4, }; |
| 770 | static int mt7986_i2c_funcs[] = { 1, 1, }; |
| 771 | |
| 772 | /* UART1 */ |
| 773 | static int mt7986_uart1_0_pins[] = { 7, 8, 9, 10, }; |
| 774 | static int mt7986_uart1_0_funcs[] = { 3, 3, 3, 3, }; |
| 775 | |
| 776 | /* JTAG */ |
| 777 | static int mt7986_jtag_pins[] = { 11, 12, 13, 14, 15, }; |
| 778 | static int mt7986_jtag_funcs[] = { 1, 1, 1, 1, 1, }; |
| 779 | |
| 780 | /* SPI1 */ |
| 781 | static int mt7986_spi1_0_pins[] = { 11, 12, 13, 14, }; |
| 782 | static int mt7986_spi1_0_funcs[] = { 3, 3, 3, 3, }; |
| 783 | |
| 784 | /* PWM */ |
| 785 | static int mt7986_pwm1_1_pins[] = { 20, }; |
| 786 | static int mt7986_pwm1_1_funcs[] = { 2, }; |
| 787 | |
| 788 | /* PWM */ |
| 789 | static int mt7986_pwm0_pins[] = { 21, }; |
| 790 | static int mt7986_pwm0_funcs[] = { 1, }; |
| 791 | |
| 792 | /* PWM */ |
| 793 | static int mt7986_pwm1_0_pins[] = { 22, }; |
| 794 | static int mt7986_pwm1_0_funcs[] = { 1, }; |
| 795 | |
| 796 | /* EMMC */ |
| 797 | static int mt7986_emmc_45_pins[] = { 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, }; |
| 798 | static int mt7986_emmc_45_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; |
| 799 | |
| 800 | /* SNFI */ |
| 801 | static int mt7986_snfi_pins[] = { 23, 24, 25, 26, 27, 28, }; |
| 802 | static int mt7986_snfi_funcs[] = { 1, 1, 1, 1, 1, 1, }; |
| 803 | |
| 804 | /* SPI1 */ |
| 805 | static int mt7986_spi1_1_pins[] = { 23, 24, 25, 26, }; |
| 806 | static int mt7986_spi1_1_funcs[] = { 3, 3, 3, 3, }; |
| 807 | |
| 808 | /* UART1 */ |
| 809 | static int mt7986_uart1_1_pins[] = { 23, 24, 25, 26, }; |
| 810 | static int mt7986_uart1_1_funcs[] = { 4, 4, 4, 4, }; |
| 811 | |
| 812 | /* SPI1 */ |
| 813 | static int mt7986_spi1_2_pins[] = { 29, 30, 31, 32, }; |
| 814 | static int mt7986_spi1_2_funcs[] = { 1, 1, 1, 1, }; |
| 815 | |
| 816 | /* UART1 */ |
| 817 | static int mt7986_uart1_2_pins[] = { 29, 30, 31, 32, }; |
| 818 | static int mt7986_uart1_2_funcs[] = { 3, 3, 3, 3, }; |
| 819 | |
| 820 | /* UART2 */ |
| 821 | static int mt7986_uart2_0_pins[] = { 29, 30, 31, 32, }; |
| 822 | static int mt7986_uart2_0_funcs[] = { 4, 4, 4, 4, }; |
| 823 | |
| 824 | /* SPI0 */ |
| 825 | static int mt7986_spi0_pins[] = { 33, 34, 35, 36, }; |
| 826 | static int mt7986_spi0_funcs[] = { 1, 1, 1, 1, }; |
| 827 | |
| 828 | /* SPI0 */ |
| 829 | static int mt7986_spi0_wp_hold_pins[] = { 37, 38, }; |
| 830 | static int mt7986_spi0_wp_hold_funcs[] = { 1, 1, }; |
| 831 | |
| 832 | /* UART2 */ |
| 833 | static int mt7986_uart2_1_pins[] = { 33, 34, 35, 36, }; |
| 834 | static int mt7986_uart2_1_funcs[] = { 3, 3, 3, 3, }; |
| 835 | |
| 836 | /* UART1 */ |
| 837 | static int mt7986_uart1_3_rx_tx_pins[] = { 35, 36, }; |
| 838 | static int mt7986_uart1_3_rx_tx_funcs[] = { 2, 2, }; |
| 839 | |
| 840 | /* UART1 */ |
| 841 | static int mt7986_uart1_3_cts_rts_pins[] = { 37, 38, }; |
| 842 | static int mt7986_uart1_3_cts_rts_funcs[] = { 2, 2, }; |
| 843 | |
| 844 | /* SPI1 */ |
| 845 | static int mt7986_spi1_3_pins[] = { 33, 34, 35, 36, }; |
| 846 | static int mt7986_spi1_3_funcs[] = { 4, 4, 4, 4, }; |
| 847 | |
| 848 | /* UART0 */ |
| 849 | static int mt7986_uart0_pins[] = { 39, 40, }; |
| 850 | static int mt7986_uart0_funcs[] = { 1, 1, }; |
| 851 | |
| 852 | /* PCIE_PERESET_N */ |
| 853 | static int mt7986_pcie_reset_pins[] = { 41, }; |
| 854 | static int mt7986_pcie_reset_funcs[] = { 1, }; |
| 855 | |
| 856 | /* UART1 */ |
| 857 | static int mt7986_uart1_pins[] = { 42, 43, 44, 45, }; |
| 858 | static int mt7986_uart1_funcs[] = { 1, 1, 1, 1, }; |
| 859 | |
| 860 | /* UART1 */ |
| 861 | static int mt7986_uart2_pins[] = { 46, 47, 48, 49, }; |
| 862 | static int mt7986_uart2_funcs[] = { 1, 1, 1, 1, }; |
| 863 | |
| 864 | /* EMMC */ |
| 865 | static int mt7986_emmc_51_pins[] = { 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, }; |
| 866 | static int mt7986_emmc_51_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; |
| 867 | |
| 868 | /* PCM */ |
| 869 | static int mt7986_pcm_pins[] = { 62, 63, 64, 65, }; |
| 870 | static int mt7986_pcm_funcs[] = { 1, 1, 1, 1, }; |
| 871 | |
| 872 | /* MT7531_INT */ |
| 873 | static int mt7986_switch_int_pins[] = { 66, }; |
| 874 | static int mt7986_switch_int_funcs[] = { 1, }; |
| 875 | |
| 876 | /* MDC_MDIO */ |
| 877 | static int mt7986_mdc_mdio_pins[] = { 67, 68, }; |
| 878 | static int mt7986_mdc_mdio_funcs[] = { 1, 1, }; |
| 879 | |
| 880 | /* WF0_MODE1 */ |
| 881 | static int mt7986_wf0_mode1_pins[] = { 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85 }; |
| 882 | static int mt7986_wf0_mode1_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; |
| 883 | |
developer | e138bcd | 2021-12-06 09:20:47 +0800 | [diff] [blame] | 884 | static int mt7986_wf_2g_pins[] = {74, 75, 76, 77, 78, 79, 80, 81, 82, 83, }; |
| 885 | static int mt7986_wf_2g_funcs[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; |
| 886 | |
| 887 | static int mt7986_wf_5g_pins[] = {91, 92, 93, 94, 95, 96, 97, 98, 99, 100, }; |
| 888 | static int mt7986_wf_5g_funcs[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; |
| 889 | |
| 890 | static int mt7986_wf_dbdc_pins[] = { |
| 891 | 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, }; |
| 892 | static int mt7986_wf_dbdc_funcs[] = { |
| 893 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; |
| 894 | |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 895 | /* WF0_HB */ |
| 896 | static int mt7986_wf0_hb_pins[] = { 74, 75, 76, 77, 78 }; |
| 897 | static int mt7986_wf0_hb_funcs[] = { 2, 2, 2, 2, 2 }; |
| 898 | |
| 899 | /* WF0_MODE3 */ |
| 900 | static int mt7986_wf0_mode3_pins[] = { 74, 75, 76, 77, 78, 80 }; |
| 901 | static int mt7986_wf0_mode3_funcs[] = { 3, 3, 3, 3, 3, 3 }; |
| 902 | |
| 903 | /* WF1_HB */ |
| 904 | static int mt7986_wf1_hb_pins[] = { 79, 80, 81, 82, 83, 84, 85 }; |
| 905 | static int mt7986_wf1_hb_funcs[] = { 2, 2, 2, 2, 2, 2, 2 }; |
| 906 | |
| 907 | /* WF1_MODE1 */ |
| 908 | static int mt7986_wf1_mode1_pins[] = { 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100 }; |
| 909 | static int mt7986_wf1_mode1_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; |
| 910 | |
| 911 | /* WF1_MODE2 */ |
| 912 | static int mt7986_wf1_mode2_pins[] = { 91, 92, 93, 94, 95, 97 }; |
| 913 | static int mt7986_wf1_mode2_funcs[] = { 2, 2, 2, 2, 2, 2 }; |
| 914 | |
developer | c6b00b8 | 2021-06-02 11:12:02 +0800 | [diff] [blame] | 915 | /* PCIE_CLK_REQ */ |
| 916 | static int mt7986_pcie_clk_pins[] = { 9, }; |
| 917 | static int mt7986_pcie_clk_funcs[] = { 1, }; |
| 918 | |
| 919 | /* PCIE_WAKE_N */ |
| 920 | static int mt7986_pcie_wake_pins[] = { 10, }; |
| 921 | static int mt7986_pcie_wake_funcs[] = { 1, }; |
| 922 | |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 923 | static const struct group_desc mt7986_groups[] = { |
| 924 | /* @GPIO(0): SYS_WATCHDOG(1) */ |
| 925 | PINCTRL_PIN_GROUP("watchdog", mt7986_watchdog), |
| 926 | /* @GPIO(1,2): WF2G_LED(1), WF5G_LED(1) */ |
| 927 | PINCTRL_PIN_GROUP("wifi_led", mt7986_wifi_led), |
| 928 | /* @GPIO(3,4): I2C(1) */ |
| 929 | PINCTRL_PIN_GROUP("i2c", mt7986_i2c), |
| 930 | /* @GPIO(7,10): UART1(3) */ |
| 931 | PINCTRL_PIN_GROUP("uart1_0", mt7986_uart1_0), |
developer | c6b00b8 | 2021-06-02 11:12:02 +0800 | [diff] [blame] | 932 | /* @GPIO(9): PCIE_CLK_REQ(9) */ |
| 933 | PINCTRL_PIN_GROUP("pcie_clk", mt7986_pcie_clk), |
| 934 | /* @GPIO(10): PCIE_WAKE_N(10) */ |
| 935 | PINCTRL_PIN_GROUP("pcie_wake", mt7986_pcie_wake), |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 936 | /* @GPIO(11,15): JTAG(1) */ |
| 937 | PINCTRL_PIN_GROUP("jtag", mt7986_jtag), |
| 938 | /* @GPIO(11,15): SPI1(3) */ |
| 939 | PINCTRL_PIN_GROUP("spi1_0", mt7986_spi1_0), |
| 940 | /* @GPIO(20): PWM(2) */ |
| 941 | PINCTRL_PIN_GROUP("pwm1_1", mt7986_pwm1_1), |
| 942 | /* @GPIO(21): PWM(1) */ |
| 943 | PINCTRL_PIN_GROUP("pwm0", mt7986_pwm0), |
| 944 | /* @GPIO(22): PWM(1) */ |
| 945 | PINCTRL_PIN_GROUP("pwm1_0", mt7986_pwm1_0), |
| 946 | /* @GPIO(22,32): EMMC(2) */ |
| 947 | PINCTRL_PIN_GROUP("emmc_45", mt7986_emmc_45), |
| 948 | /* @GPIO(23,28): SNFI(1) */ |
| 949 | PINCTRL_PIN_GROUP("snfi", mt7986_snfi), |
| 950 | /* @GPIO(23,26): SPI1(2) */ |
| 951 | PINCTRL_PIN_GROUP("spi1_1", mt7986_spi1_1), |
| 952 | /* @GPIO(23,26): UART1(4) */ |
| 953 | PINCTRL_PIN_GROUP("uart1_1", mt7986_uart1_1), |
| 954 | /* @GPIO(29,32): SPI1(1) */ |
| 955 | PINCTRL_PIN_GROUP("spi1_2", mt7986_spi1_2), |
| 956 | /* @GPIO(29,32): UART1(3) */ |
| 957 | PINCTRL_PIN_GROUP("uart1_2", mt7986_uart1_2), |
| 958 | /* @GPIO(29,32): UART2(4) */ |
| 959 | PINCTRL_PIN_GROUP("uart2_0", mt7986_uart2_0), |
| 960 | /* @GPIO(33,36): SPI0(1) */ |
| 961 | PINCTRL_PIN_GROUP("spi0", mt7986_spi0), |
| 962 | /* @GPIO(37,38): SPI0(1) */ |
| 963 | PINCTRL_PIN_GROUP("spi0_wp_hold", mt7986_spi0_wp_hold), |
| 964 | /* @GPIO(33,36): UART2(3) */ |
| 965 | PINCTRL_PIN_GROUP("uart2_1", mt7986_uart2_1), |
| 966 | /* @GPIO(35,36): UART1(2) */ |
| 967 | PINCTRL_PIN_GROUP("uart1_3_rx_tx", mt7986_uart1_3_rx_tx), |
| 968 | /* @GPIO(37,38): UART1(2) */ |
| 969 | PINCTRL_PIN_GROUP("uart1_3_cts_rts", mt7986_uart1_3_cts_rts), |
| 970 | /* @GPIO(33,36): SPI1(4) */ |
| 971 | PINCTRL_PIN_GROUP("spi1_3", mt7986_spi1_3), |
| 972 | /* @GPIO(39,40): UART0(1) */ |
| 973 | PINCTRL_PIN_GROUP("uart0", mt7986_uart0), |
| 974 | /* @GPIO(41): PCIE_PERESET_N(1) */ |
developer | 7aac8b2 | 2021-07-05 09:58:55 +0800 | [diff] [blame] | 975 | PINCTRL_PIN_GROUP("pcie_pereset", mt7986_pcie_reset), |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 976 | /* @GPIO(42,45): UART1(1) */ |
| 977 | PINCTRL_PIN_GROUP("uart1", mt7986_uart1), |
| 978 | /* @GPIO(46,49): UART1(1) */ |
| 979 | PINCTRL_PIN_GROUP("uart2", mt7986_uart2), |
| 980 | /* @GPIO(50,61): EMMC(1) */ |
| 981 | PINCTRL_PIN_GROUP("emmc_51", mt7986_emmc_51), |
| 982 | /* @GPIO(62,65): PCM(1) */ |
| 983 | PINCTRL_PIN_GROUP("pcm", mt7986_pcm), |
| 984 | /* @GPIO(66): MT7531_INT(1) */ |
| 985 | PINCTRL_PIN_GROUP("switch_int", mt7986_switch_int), |
| 986 | /* @GPIO(67,68): MDC_MDIO(1) */ |
| 987 | PINCTRL_PIN_GROUP("mdc_mdio", mt7986_mdc_mdio), |
| 988 | /* @GPIO(69,85): WF0_MODE1(1) */ |
| 989 | PINCTRL_PIN_GROUP("wf0_mode1", mt7986_wf0_mode1), |
| 990 | /* @GPIO(74,78): WF0_HB(2) */ |
| 991 | PINCTRL_PIN_GROUP("wf0_hb", mt7986_wf0_hb), |
| 992 | /* @GPIO(74,80): WF0_MODE3(3) */ |
| 993 | PINCTRL_PIN_GROUP("wf0_mode3", mt7986_wf0_mode3), |
| 994 | /* @GPIO(79,85): WF1_HB(2) */ |
| 995 | PINCTRL_PIN_GROUP("wf1_hb", mt7986_wf1_hb), |
| 996 | /* @GPIO(86,100): WF1_MODE1(1) */ |
| 997 | PINCTRL_PIN_GROUP("wf1_mode1", mt7986_wf1_mode1), |
| 998 | /* @GPIO(91,97): WF1_MODE2(2) */ |
| 999 | PINCTRL_PIN_GROUP("wf1_mode2", mt7986_wf1_mode2), |
developer | e138bcd | 2021-12-06 09:20:47 +0800 | [diff] [blame] | 1000 | |
| 1001 | |
| 1002 | PINCTRL_PIN_GROUP("wf_2g", mt7986_wf_2g), |
| 1003 | PINCTRL_PIN_GROUP("wf_5g", mt7986_wf_5g), |
| 1004 | PINCTRL_PIN_GROUP("wf_dbdc", mt7986_wf_dbdc), |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 1005 | }; |
| 1006 | |
| 1007 | /* Joint those groups owning the same capability in user point of view which |
| 1008 | * allows that people tend to use through the device tree. |
| 1009 | */ |
| 1010 | static const char *mt7986_ethernet_groups[] = { "mdc_mdio", "wf0_mode1", "wf0_hb", |
| 1011 | "wf0_mode3", "wf1_hb", "wf1_mode1", "wf1_mode2" }; |
| 1012 | static const char *mt7986_i2c_groups[] = { "i2c", }; |
| 1013 | static const char *mt7986_led_groups[] = { "wifi_led", }; |
| 1014 | static const char *mt7986_pwm_groups[] = { "pwm0", "pwm1_0", "pwm1_1", }; |
| 1015 | static const char *mt7986_spi_groups[] = { "spi0", "spi1_0", "spi1_1", |
| 1016 | "spi1_2", "spi1_3", }; |
| 1017 | static const char *mt7986_uart_groups[] = { "uart1_0", "uart1_1", "uart1_2", |
| 1018 | "uart1_3_rx_tx", "uart1_3_cts_rts", |
| 1019 | "uart2_0", "uart2_1", |
| 1020 | "uart0", "uart1", "uart2", }; |
| 1021 | static const char *mt7986_wdt_groups[] = { "watchdog", }; |
| 1022 | static const char *mt7986_flash_groups[] = { "snfi", "emmc_45", "emmc_51", "spi0", "spi0_wp_hold"}; |
developer | c6b00b8 | 2021-06-02 11:12:02 +0800 | [diff] [blame] | 1023 | static const char *mt7986_pcie_groups[] = { "pcie_clk", "pcie_wake", "pcie_pereset"}; |
developer | e138bcd | 2021-12-06 09:20:47 +0800 | [diff] [blame] | 1024 | static const char *mt7986_wf_groups[] = { "wf_2g", "wf_5g", "wf_dbdc", }; |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 1025 | |
| 1026 | static const struct function_desc mt7986_functions[] = { |
| 1027 | {"eth", mt7986_ethernet_groups, ARRAY_SIZE(mt7986_ethernet_groups)}, |
| 1028 | {"i2c", mt7986_i2c_groups, ARRAY_SIZE(mt7986_i2c_groups)}, |
| 1029 | {"led", mt7986_led_groups, ARRAY_SIZE(mt7986_led_groups)}, |
| 1030 | {"pwm", mt7986_pwm_groups, ARRAY_SIZE(mt7986_pwm_groups)}, |
| 1031 | {"spi", mt7986_spi_groups, ARRAY_SIZE(mt7986_spi_groups)}, |
| 1032 | {"uart", mt7986_uart_groups, ARRAY_SIZE(mt7986_uart_groups)}, |
| 1033 | {"watchdog", mt7986_wdt_groups, ARRAY_SIZE(mt7986_wdt_groups)}, |
| 1034 | {"flash", mt7986_flash_groups, ARRAY_SIZE(mt7986_flash_groups)}, |
developer | c6b00b8 | 2021-06-02 11:12:02 +0800 | [diff] [blame] | 1035 | {"pcie", mt7986_pcie_groups, ARRAY_SIZE(mt7986_pcie_groups)}, |
developer | e138bcd | 2021-12-06 09:20:47 +0800 | [diff] [blame] | 1036 | {"wifi", mt7986_wf_groups, ARRAY_SIZE(mt7986_wf_groups)}, |
developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 1037 | }; |
| 1038 | |
| 1039 | static const struct mtk_eint_hw mt7986_eint_hw = { |
| 1040 | .port_mask = 7, |
| 1041 | .ports = 7, |
| 1042 | .ap_num = ARRAY_SIZE(mt7986_pins), |
| 1043 | .db_cnt = 16, |
| 1044 | }; |
| 1045 | |
| 1046 | static const char * const mt7986_pinctrl_register_base_names[] = { |
| 1047 | "gpio_base", "iocfg_rt_base", "iocfg_rb_base", "iocfg_lt_base", |
| 1048 | "iocfg_lb_base", "iocfg_tr_base", "iocfg_tl_base", |
| 1049 | }; |
| 1050 | |
| 1051 | static struct mtk_pin_soc mt7986_data = { |
| 1052 | .reg_cal = mt7986_reg_cals, |
| 1053 | .pins = mt7986_pins, |
| 1054 | .npins = ARRAY_SIZE(mt7986_pins), |
| 1055 | .grps = mt7986_groups, |
| 1056 | .ngrps = ARRAY_SIZE(mt7986_groups), |
| 1057 | .funcs = mt7986_functions, |
| 1058 | .nfuncs = ARRAY_SIZE(mt7986_functions), |
| 1059 | .eint_hw = &mt7986_eint_hw, |
| 1060 | .gpio_m = 0, |
| 1061 | .ies_present = false, |
| 1062 | .base_names = mt7986_pinctrl_register_base_names, |
| 1063 | .nbase_names = ARRAY_SIZE(mt7986_pinctrl_register_base_names), |
| 1064 | .bias_disable_set = mtk_pinconf_bias_disable_set, |
| 1065 | .bias_disable_get = mtk_pinconf_bias_disable_get, |
| 1066 | .bias_set = mtk_pinconf_bias_set, |
| 1067 | .bias_get = mtk_pinconf_bias_get, |
| 1068 | .drive_set = mtk_pinconf_drive_set_rev1, |
| 1069 | .drive_get = mtk_pinconf_drive_get_rev1, |
| 1070 | .adv_pull_get = mtk_pinconf_adv_pull_get, |
| 1071 | .adv_pull_set = mtk_pinconf_adv_pull_set, |
| 1072 | }; |
| 1073 | |
| 1074 | static const struct of_device_id mt7986_pinctrl_of_match[] = { |
| 1075 | { .compatible = "mediatek,mt7986-pinctrl", }, |
| 1076 | {} |
| 1077 | }; |
| 1078 | |
| 1079 | static int mt7986_pinctrl_probe(struct platform_device *pdev) |
| 1080 | { |
| 1081 | return mtk_moore_pinctrl_probe(pdev, &mt7986_data); |
| 1082 | } |
| 1083 | |
| 1084 | static struct platform_driver mt7986_pinctrl_driver = { |
| 1085 | .driver = { |
| 1086 | .name = "mt7986-pinctrl", |
| 1087 | .of_match_table = mt7986_pinctrl_of_match, |
| 1088 | }, |
| 1089 | .probe = mt7986_pinctrl_probe, |
| 1090 | }; |
| 1091 | |
| 1092 | static int __init mt7986_pinctrl_init(void) |
| 1093 | { |
| 1094 | return platform_driver_register(&mt7986_pinctrl_driver); |
| 1095 | } |
| 1096 | arch_initcall(mt7986_pinctrl_init); |