developer | 0f312e8 | 2022-11-01 12:31:52 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: ISC */ |
| 2 | /* Copyright (C) 2020 MediaTek Inc. */ |
| 3 | |
| 4 | #ifndef __MT7921_MAC_H |
| 5 | #define __MT7921_MAC_H |
| 6 | |
| 7 | #include "../mt76_connac2_mac.h" |
| 8 | |
| 9 | #define MT_CT_PARSE_LEN 72 |
| 10 | #define MT_CT_DMA_BUF_NUM 2 |
| 11 | |
| 12 | #define MT_RXD0_LENGTH GENMASK(15, 0) |
| 13 | #define MT_RXD0_PKT_FLAG GENMASK(19, 16) |
| 14 | #define MT_RXD0_PKT_TYPE GENMASK(31, 27) |
| 15 | |
| 16 | #define MT_RXD0_NORMAL_ETH_TYPE_OFS GENMASK(22, 16) |
| 17 | #define MT_RXD0_NORMAL_IP_SUM BIT(23) |
| 18 | #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24) |
| 19 | |
| 20 | enum rx_pkt_type { |
| 21 | PKT_TYPE_TXS, |
| 22 | PKT_TYPE_TXRXV, |
| 23 | PKT_TYPE_NORMAL, |
| 24 | PKT_TYPE_RX_DUP_RFB, |
| 25 | PKT_TYPE_RX_TMR, |
| 26 | PKT_TYPE_RETRIEVE, |
| 27 | PKT_TYPE_TXRX_NOTIFY, |
| 28 | PKT_TYPE_RX_EVENT, |
| 29 | PKT_TYPE_NORMAL_MCU, |
| 30 | }; |
| 31 | |
| 32 | #define MT_TX_FREE_MSDU_CNT GENMASK(9, 0) |
| 33 | #define MT_TX_FREE_WLAN_ID GENMASK(23, 14) |
| 34 | #define MT_TX_FREE_LATENCY GENMASK(12, 0) |
| 35 | /* 0: success, others: dropped */ |
| 36 | #define MT_TX_FREE_STATUS GENMASK(14, 13) |
| 37 | #define MT_TX_FREE_MSDU_ID GENMASK(30, 16) |
| 38 | #define MT_TX_FREE_PAIR BIT(31) |
| 39 | /* will support this field in further revision */ |
| 40 | #define MT_TX_FREE_RATE GENMASK(13, 0) |
| 41 | |
| 42 | #define MT_WTBL_TXRX_CAP_RATE_OFFSET 7 |
| 43 | #define MT_WTBL_TXRX_RATE_G2_HE 24 |
| 44 | #define MT_WTBL_TXRX_RATE_G2 12 |
| 45 | |
| 46 | #define MT_WTBL_AC0_CTT_OFFSET 20 |
| 47 | |
| 48 | static inline u32 mt7921_mac_wtbl_lmac_addr(int idx, u8 offset) |
| 49 | { |
| 50 | return MT_WTBL_LMAC_OFFS(idx, 0) + offset * 4; |
| 51 | } |
| 52 | |
| 53 | #endif |