blob: 4ac83b34c1b695b57bcf0eae69d500f36461d485 [file] [log] [blame]
developer8c5a74e2021-05-21 14:42:21 +08001// SPDX-License-Identifier: GPL-2.0+
2#include <linux/bitfield.h>
3#include <linux/module.h>
4#include <linux/phy.h>
5
6static int gpy211_phy_config_init(struct phy_device *phydev)
7{
8 return 0;
9}
10
11int gpy211_phy_probe(struct phy_device *phydev)
12{
13 int sgmii_reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, 8);
14
15 /* enable 2.5G SGMII rate adaption */
16 phy_write_mmd(phydev, MDIO_MMD_VEND1, 8, 0x24e2);
17
18 return 0;
19}
20
21static int gpy211_get_features(struct phy_device *phydev)
22{
23 int ret;
24
25 ret = genphy_read_abilities(phydev);
26 if (ret)
27 return ret;
28
29 /* GPY211 with rate adaption supports 100M/1G/2.5G speed. */
30 linkmode_clear_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT,
31 phydev->supported);
32 linkmode_clear_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
33 phydev->supported);
34 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT,
35 phydev->supported);
36
37 return 0;
38}
39
40static struct phy_driver gpy211_phy_driver[] = {
41 {
42 PHY_ID_MATCH_MODEL(0x67c9de0a),
43 .name = "Intel GPY211 PHY",
44 .config_init = gpy211_phy_config_init,
45 .probe = gpy211_phy_probe,
46 .get_features = gpy211_get_features,
47 }
48};
49
50module_phy_driver(gpy211_phy_driver);
51
52static struct mdio_device_id __maybe_unused gpy211_phy_tbl[] = {
53 { PHY_ID_MATCH_VENDOR(0x67c9de00) },
54 { }
55};
56
57MODULE_DESCRIPTION("Intel GPY211 PHY driver with rate adaption");
58MODULE_AUTHOR("Landen Chao <landen.chao@mediatek.com>");
59MODULE_LICENSE("GPL");
60
61MODULE_DEVICE_TABLE(mdio, gpy211_phy_tbl);