developer | c2cfe0f | 2023-09-22 04:11:09 +0800 | [diff] [blame^] | 1 | From 1edcdd6bd28fb6ea388e73fd665b5c58f47c15a7 Mon Sep 17 00:00:00 2001 |
| 2 | From: Yi-Chia Hsieh <yi-chia.hsieh@mediatek.com> |
| 3 | Date: Wed, 28 Jun 2023 08:34:21 +0800 |
| 4 | Subject: [PATCH 18/22] wifi: mt76: mt7996: enable PPDU-TxS to host |
| 5 | |
| 6 | Enable PPDU-TxS by default no matter WED on or WED off |
| 7 | PPDU-TxS is also capable of getting tx_bytes and tx_retries, |
| 8 | but we'll get that from mcu command and TxFree instead. |
| 9 | --- |
| 10 | mt76_connac3_mac.h | 22 +++++++++++++++++++++- |
| 11 | mt7996/init.c | 5 +++++ |
| 12 | mt7996/mac.c | 45 +++++++++++++++++++++++++++------------------ |
| 13 | mt7996/regs.h | 7 +++++++ |
| 14 | 4 files changed, 60 insertions(+), 19 deletions(-) |
| 15 | |
| 16 | diff --git a/mt76_connac3_mac.h b/mt76_connac3_mac.h |
| 17 | index 20a2fe931..7402de245 100644 |
| 18 | --- a/mt76_connac3_mac.h |
| 19 | +++ b/mt76_connac3_mac.h |
| 20 | @@ -281,6 +281,12 @@ enum tx_mgnt_type { |
| 21 | #define MT_TXFREE_INFO_COUNT GENMASK(27, 24) |
| 22 | #define MT_TXFREE_INFO_STAT GENMASK(29, 28) |
| 23 | |
| 24 | +enum { |
| 25 | + MT_TXS_MPDU_FM0, |
| 26 | + MT_TXS_MPDU_FM1, |
| 27 | + MT_TXS_PPDU_FM |
| 28 | +}; |
| 29 | + |
| 30 | #define MT_TXS0_BW GENMASK(31, 29) |
| 31 | #define MT_TXS0_TID GENMASK(28, 26) |
| 32 | #define MT_TXS0_AMPDU BIT(25) |
| 33 | @@ -306,7 +312,7 @@ enum tx_mgnt_type { |
| 34 | |
| 35 | #define MT_TXS2_BF_STATUS GENMASK(31, 30) |
| 36 | #define MT_TXS2_BAND GENMASK(29, 28) |
| 37 | -#define MT_TXS2_WCID GENMASK(27, 16) |
| 38 | +#define MT_TXS2_MLD_ID GENMASK(27, 16) |
| 39 | #define MT_TXS2_TX_DELAY GENMASK(15, 0) |
| 40 | |
| 41 | #define MT_TXS3_PID GENMASK(31, 24) |
| 42 | @@ -318,6 +324,7 @@ enum tx_mgnt_type { |
| 43 | |
| 44 | #define MT_TXS4_TIMESTAMP GENMASK(31, 0) |
| 45 | |
| 46 | +/* MPDU based TXS */ |
| 47 | #define MT_TXS5_F0_FINAL_MPDU BIT(31) |
| 48 | #define MT_TXS5_F0_QOS BIT(30) |
| 49 | #define MT_TXS5_F0_TX_COUNT GENMASK(29, 25) |
| 50 | @@ -339,4 +346,17 @@ enum tx_mgnt_type { |
| 51 | #define MT_TXS7_F1_MPDU_RETRY_COUNT GENMASK(31, 24) |
| 52 | #define MT_TXS7_F1_MPDU_RETRY_BYTES GENMASK(23, 0) |
| 53 | |
| 54 | +/* PPDU based TXS */ |
| 55 | +#define MT_TXS5_MPDU_TX_CNT GENMASK(30, 20) |
| 56 | +#define MT_TXS5_MPDU_TX_BYTE_SCALE BIT(15) |
| 57 | +#define MT_TXS5_MPDU_TX_BYTE GENMASK(14, 0) |
| 58 | + |
| 59 | +#define MT_TXS6_MPDU_FAIL_CNT GENMASK(30, 20) |
| 60 | +#define MT_TXS6_MPDU_FAIL_BYTE_SCALE BIT(15) |
| 61 | +#define MT_TXS6_MPDU_FAIL_BYTE GENMASK(14, 0) |
| 62 | + |
| 63 | +#define MT_TXS7_MPDU_RETRY_CNT GENMASK(30, 20) |
| 64 | +#define MT_TXS7_MPDU_RETRY_BYTE_SCALE BIT(15) |
| 65 | +#define MT_TXS7_MPDU_RETRY_BYTE GENMASK(14, 0) |
| 66 | + |
| 67 | #endif /* __MT76_CONNAC3_MAC_H */ |
| 68 | diff --git a/mt7996/init.c b/mt7996/init.c |
| 69 | index a8a60a8c9..2fe3da475 100644 |
| 70 | --- a/mt7996/init.c |
| 71 | +++ b/mt7996/init.c |
| 72 | @@ -453,6 +453,11 @@ mt7996_mac_init_band(struct mt7996_dev *dev, u8 band) |
| 73 | set = FIELD_PREP(MT_WTBLOFF_RSCR_RCPI_MODE, 0) | |
| 74 | FIELD_PREP(MT_WTBLOFF_RSCR_RCPI_PARAM, 0x3); |
| 75 | mt76_rmw(dev, MT_WTBLOFF_RSCR(band), mask, set); |
| 76 | + |
| 77 | + /* MT_TXD5_TX_STATUS_HOST (MPDU format) has higher priority than |
| 78 | + * MT_AGG_ACR_PPDU_TXS2H (PPDU format) even though ACR bit is set. |
| 79 | + */ |
| 80 | + mt76_set(dev, MT_AGG_ACR4(band), MT_AGG_ACR_PPDU_TXS2H); |
| 81 | } |
| 82 | |
| 83 | static void mt7996_mac_init_basic_rates(struct mt7996_dev *dev) |
| 84 | diff --git a/mt7996/mac.c b/mt7996/mac.c |
| 85 | index 8f75da695..d4d3cf5b7 100644 |
| 86 | --- a/mt7996/mac.c |
| 87 | +++ b/mt7996/mac.c |
| 88 | @@ -1173,22 +1173,35 @@ mt7996_mac_add_txs_skb(struct mt7996_dev *dev, struct mt76_wcid *wcid, |
| 89 | bool cck = false; |
| 90 | u32 txrate, txs, mode, stbc; |
| 91 | |
| 92 | + txs = le32_to_cpu(txs_data[0]); |
| 93 | + |
| 94 | mt76_tx_status_lock(mdev, &list); |
| 95 | skb = mt76_tx_status_skb_get(mdev, wcid, pid, &list); |
| 96 | - if (!skb) |
| 97 | - goto out_no_skb; |
| 98 | |
| 99 | - txs = le32_to_cpu(txs_data[0]); |
| 100 | + if (skb) { |
| 101 | + info = IEEE80211_SKB_CB(skb); |
| 102 | + if (!(txs & MT_TXS0_ACK_ERROR_MASK)) |
| 103 | + info->flags |= IEEE80211_TX_STAT_ACK; |
| 104 | |
| 105 | - info = IEEE80211_SKB_CB(skb); |
| 106 | - if (!(txs & MT_TXS0_ACK_ERROR_MASK)) |
| 107 | - info->flags |= IEEE80211_TX_STAT_ACK; |
| 108 | + info->status.ampdu_len = 1; |
| 109 | + info->status.ampdu_ack_len = !!(info->flags & |
| 110 | + IEEE80211_TX_STAT_ACK); |
| 111 | + |
| 112 | + info->status.rates[0].idx = -1; |
| 113 | + } |
| 114 | |
| 115 | - info->status.ampdu_len = 1; |
| 116 | - info->status.ampdu_ack_len = !!(info->flags & |
| 117 | - IEEE80211_TX_STAT_ACK); |
| 118 | + /* PPDU based reporting */ |
| 119 | + if (FIELD_GET(MT_TXS0_TXS_FORMAT,txs) == MT_TXS_PPDU_FM) { |
| 120 | + if (wcid->sta) { |
| 121 | + struct ieee80211_sta *sta; |
| 122 | + u8 tid; |
| 123 | |
| 124 | - info->status.rates[0].idx = -1; |
| 125 | + sta = container_of((void *)wcid, struct ieee80211_sta, |
| 126 | + drv_priv); |
| 127 | + tid = FIELD_GET(MT_TXS0_TID, txs); |
| 128 | + ieee80211_refresh_tx_agg_session_timer(sta, tid); |
| 129 | + } |
| 130 | + } |
| 131 | |
| 132 | txrate = FIELD_GET(MT_TXS0_TX_RATE, txs); |
| 133 | |
| 134 | @@ -1288,9 +1301,8 @@ mt7996_mac_add_txs_skb(struct mt7996_dev *dev, struct mt76_wcid *wcid, |
| 135 | wcid->rate = rate; |
| 136 | |
| 137 | out: |
| 138 | - mt76_tx_status_skb_done(mdev, skb, &list); |
| 139 | - |
| 140 | -out_no_skb: |
| 141 | + if (skb) |
| 142 | + mt76_tx_status_skb_done(mdev, skb, &list); |
| 143 | mt76_tx_status_unlock(mdev, &list); |
| 144 | |
| 145 | return !!skb; |
| 146 | @@ -1304,13 +1316,10 @@ static void mt7996_mac_add_txs(struct mt7996_dev *dev, void *data) |
| 147 | u16 wcidx; |
| 148 | u8 pid; |
| 149 | |
| 150 | - if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1) |
| 151 | - return; |
| 152 | - |
| 153 | - wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID); |
| 154 | + wcidx = le32_get_bits(txs_data[2], MT_TXS2_MLD_ID); |
| 155 | pid = le32_get_bits(txs_data[3], MT_TXS3_PID); |
| 156 | |
| 157 | - if (pid < MT_PACKET_ID_FIRST) |
| 158 | + if (pid < MT_PACKET_ID_WED) |
| 159 | return; |
| 160 | |
| 161 | if (wcidx >= mt7996_wtbl_size(dev)) |
| 162 | diff --git a/mt7996/regs.h b/mt7996/regs.h |
| 163 | index b5c363a6f..5b7b8babb 100644 |
| 164 | --- a/mt7996/regs.h |
| 165 | +++ b/mt7996/regs.h |
| 166 | @@ -243,6 +243,13 @@ enum base_rev { |
| 167 | FIELD_PREP(MT_WTBL_LMAC_ID, _id) | \ |
| 168 | FIELD_PREP(MT_WTBL_LMAC_DW, _dw)) |
| 169 | |
| 170 | +/* AGG: band 0(0x820e2000), band 1(0x820f2000), band 2(0x830e2000) */ |
| 171 | +#define MT_WF_AGG_BASE(_band) __BASE(WF_AGG_BASE, (_band)) |
| 172 | +#define MT_WF_AGG(_band, ofs) (MT_WF_AGG_BASE(_band) + (ofs)) |
| 173 | + |
| 174 | +#define MT_AGG_ACR4(_band) MT_WF_AGG(_band, 0x3c) |
| 175 | +#define MT_AGG_ACR_PPDU_TXS2H BIT(1) |
| 176 | + |
| 177 | /* ARB: band 0(0x820e3000), band 1(0x820f3000), band 2(0x830e3000) */ |
| 178 | #define MT_WF_ARB_BASE(_band) __BASE(WF_ARB_BASE, (_band)) |
| 179 | #define MT_WF_ARB(_band, ofs) (MT_WF_ARB_BASE(_band) + (ofs)) |
| 180 | -- |
| 181 | 2.39.2 |
| 182 | |