developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 1 | /* Copyright (C) 2021-2022 Mediatek Inc. */ |
| 2 | #ifndef __ATENL_NL_H |
| 3 | #define __ATENL_NL_H |
| 4 | |
| 5 | /* This is copied from mt76/testmode.h */ |
| 6 | |
| 7 | /** |
| 8 | * enum mt76_testmode_attr - testmode attributes inside NL80211_ATTR_TESTDATA |
| 9 | * |
| 10 | * @MT76_TM_ATTR_UNSPEC: (invalid attribute) |
| 11 | * |
| 12 | * @MT76_TM_ATTR_RESET: reset parameters to default (flag) |
| 13 | * @MT76_TM_ATTR_STATE: test state (u32), see &enum mt76_testmode_state |
| 14 | * |
| 15 | * @MT76_TM_ATTR_MTD_PART: mtd partition used for eeprom data (string) |
| 16 | * @MT76_TM_ATTR_MTD_OFFSET: offset of eeprom data within the partition (u32) |
developer | f90c9af | 2022-12-28 22:40:23 +0800 | [diff] [blame] | 17 | * @MT76_TM_ATTR_BAND_IDX: band idx of the chip (u8) |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 18 | * |
| 19 | * @MT76_TM_ATTR_TX_COUNT: configured number of frames to send when setting |
| 20 | * state to MT76_TM_STATE_TX_FRAMES (u32) |
| 21 | * @MT76_TM_ATTR_TX_PENDING: pending frames during MT76_TM_STATE_TX_FRAMES (u32) |
developer | 887da63 | 2022-10-28 09:35:38 +0800 | [diff] [blame] | 22 | * @MT76_TM_ATTR_TX_LENGTH: packet tx mpdu length (u32) |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 23 | * @MT76_TM_ATTR_TX_RATE_MODE: packet tx mode (u8, see &enum mt76_testmode_tx_mode) |
| 24 | * @MT76_TM_ATTR_TX_RATE_NSS: packet tx number of spatial streams (u8) |
| 25 | * @MT76_TM_ATTR_TX_RATE_IDX: packet tx rate/MCS index (u8) |
| 26 | * @MT76_TM_ATTR_TX_RATE_SGI: packet tx use short guard interval (u8) |
| 27 | * @MT76_TM_ATTR_TX_RATE_LDPC: packet tx enable LDPC (u8) |
| 28 | * @MT76_TM_ATTR_TX_RATE_STBC: packet tx enable STBC (u8) |
| 29 | * @MT76_TM_ATTR_TX_LTF: packet tx LTF, set 0 to 2 for 1x, 2x, and 4x LTF (u8) |
| 30 | * |
| 31 | * @MT76_TM_ATTR_TX_ANTENNA: tx antenna mask (u8) |
| 32 | * @MT76_TM_ATTR_TX_POWER_CONTROL: enable tx power control (u8) |
| 33 | * @MT76_TM_ATTR_TX_POWER: per-antenna tx power array (nested, u8 attrs) |
| 34 | * |
| 35 | * @MT76_TM_ATTR_FREQ_OFFSET: RF frequency offset (u32) |
| 36 | * |
| 37 | * @MT76_TM_ATTR_STATS: statistics (nested, see &enum mt76_testmode_stats_attr) |
| 38 | * |
developer | 071927d | 2022-08-31 20:39:29 +0800 | [diff] [blame] | 39 | * @MT76_TM_ATTR_PRECAL: Pre-cal data (u8) |
developer | 071927d | 2022-08-31 20:39:29 +0800 | [diff] [blame] | 40 | * @MT76_TM_ATTR_PRECAL_INFO: group size, dpd size, dpd_info, transmit size, |
| 41 | * eeprom cal indicator (u32), |
| 42 | * dpd_info = [dpd_per_chan_size, chan_num_2g, |
| 43 | * chan_num_5g, chan_num_6g] |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 44 | * @MT76_TM_ATTR_TX_SPE_IDX: tx spatial extension index (u8) |
| 45 | * |
| 46 | * @MT76_TM_ATTR_TX_DUTY_CYCLE: packet tx duty cycle (u8) |
| 47 | * @MT76_TM_ATTR_TX_IPG: tx inter-packet gap, in unit of us (u32) |
| 48 | * @MT76_TM_ATTR_TX_TIME: packet transmission time, in unit of us (u32) |
| 49 | * |
developer | 887da63 | 2022-10-28 09:35:38 +0800 | [diff] [blame] | 50 | * @MT76_TM_ATTR_DRV_DATA: driver specific netlink attrs (nested) |
| 51 | * |
| 52 | * @MT76_TM_ATTR_MAC_ADDRS: array of nested MAC addresses (nested) |
| 53 | * |
| 54 | * @MT76_TM_ATTR_EEPROM_ACTION: eeprom setting actions |
| 55 | * (u8, see &enum mt76_testmode_eeprom_action) |
| 56 | * @MT76_TM_ATTR_EEPROM_OFFSET: offset of eeprom data block for writing (u32) |
| 57 | * @MT76_TM_ATTR_EEPROM_VAL: values for writing into a 16-byte data block |
| 58 | * (nested, u8 attrs) |
| 59 | * |
| 60 | * @MT76_TM_ATTR_CFG: config testmode rf feature |
| 61 | * (nested, see &mt76_testmode_cfg) |
| 62 | * @MT76_TM_ATTR_TXBF_ACT: txbf setting actions (u8) |
| 63 | * @MT76_TM_ATTR_TXBF_PARAM: txbf parameters (nested) |
| 64 | * |
| 65 | * @MT76_TM_ATTR_OFF_CH_SCAN_CH: config the channel of background chain (ZWDFS) |
| 66 | * (u8) |
| 67 | * @MT76_TM_ATTR_OFF_CH_SCAN_CENTER_CH: config the center channel of |
| 68 | * background chain (ZWDFS) (u8) |
| 69 | * @MT76_TM_ATTR_OFF_CH_SCAN_BW: config the bandwidth of |
| 70 | * background chain (ZWDFS) (u8) |
| 71 | * @MT76_TM_ATTR_OFF_CH_SCAN_PATH: config the tx path of |
| 72 | * background chain (ZWDFS) (u8) |
| 73 | * |
| 74 | * @MT76_TM_ATTR_IPI_THRESHOLD: config the IPI index you want to read (u8) |
| 75 | * @MT76_TM_ATTR_IPI_PERIOD: config the time period for reading |
| 76 | * the histogram of specific IPI index (u8) |
| 77 | * @MT76_TM_ATTR_IPI_ANTENNA_INDEX: config the antenna index for reading |
| 78 | * the histogram of specific IPI index (u8) |
| 79 | * |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 80 | */ |
| 81 | enum mt76_testmode_attr { |
| 82 | MT76_TM_ATTR_UNSPEC, |
| 83 | |
| 84 | MT76_TM_ATTR_RESET, |
| 85 | MT76_TM_ATTR_STATE, |
| 86 | |
| 87 | MT76_TM_ATTR_MTD_PART, |
| 88 | MT76_TM_ATTR_MTD_OFFSET, |
developer | f90c9af | 2022-12-28 22:40:23 +0800 | [diff] [blame] | 89 | MT76_TM_ATTR_BAND_IDX, |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 90 | |
| 91 | MT76_TM_ATTR_TX_COUNT, |
| 92 | MT76_TM_ATTR_TX_LENGTH, |
| 93 | MT76_TM_ATTR_TX_RATE_MODE, |
| 94 | MT76_TM_ATTR_TX_RATE_NSS, |
| 95 | MT76_TM_ATTR_TX_RATE_IDX, |
| 96 | MT76_TM_ATTR_TX_RATE_SGI, |
| 97 | MT76_TM_ATTR_TX_RATE_LDPC, |
| 98 | MT76_TM_ATTR_TX_RATE_STBC, |
| 99 | MT76_TM_ATTR_TX_LTF, |
| 100 | |
| 101 | MT76_TM_ATTR_TX_ANTENNA, |
| 102 | MT76_TM_ATTR_TX_POWER_CONTROL, |
| 103 | MT76_TM_ATTR_TX_POWER, |
| 104 | |
| 105 | MT76_TM_ATTR_FREQ_OFFSET, |
| 106 | |
| 107 | MT76_TM_ATTR_STATS, |
developer | 071927d | 2022-08-31 20:39:29 +0800 | [diff] [blame] | 108 | MT76_TM_ATTR_PRECAL, |
| 109 | MT76_TM_ATTR_PRECAL_INFO, |
| 110 | |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 111 | MT76_TM_ATTR_TX_SPE_IDX, |
| 112 | |
| 113 | MT76_TM_ATTR_TX_DUTY_CYCLE, |
| 114 | MT76_TM_ATTR_TX_IPG, |
| 115 | MT76_TM_ATTR_TX_TIME, |
| 116 | |
| 117 | MT76_TM_ATTR_DRV_DATA, |
| 118 | |
| 119 | MT76_TM_ATTR_MAC_ADDRS, |
developer | 5698c9c | 2022-05-30 16:40:23 +0800 | [diff] [blame] | 120 | MT76_TM_ATTR_AID, |
| 121 | MT76_TM_ATTR_RU_ALLOC, |
| 122 | MT76_TM_ATTR_RU_IDX, |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 123 | |
| 124 | MT76_TM_ATTR_EEPROM_ACTION, |
| 125 | MT76_TM_ATTR_EEPROM_OFFSET, |
| 126 | MT76_TM_ATTR_EEPROM_VAL, |
| 127 | |
| 128 | MT76_TM_ATTR_CFG, |
developer | 5698c9c | 2022-05-30 16:40:23 +0800 | [diff] [blame] | 129 | MT76_TM_ATTR_TXBF_ACT, |
| 130 | MT76_TM_ATTR_TXBF_PARAM, |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 131 | |
| 132 | MT76_TM_ATTR_OFF_CH_SCAN_CH, |
| 133 | MT76_TM_ATTR_OFF_CH_SCAN_CENTER_CH, |
| 134 | MT76_TM_ATTR_OFF_CH_SCAN_BW, |
| 135 | MT76_TM_ATTR_OFF_CH_SCAN_PATH, |
| 136 | |
developer | 887da63 | 2022-10-28 09:35:38 +0800 | [diff] [blame] | 137 | MT76_TM_ATTR_IPI_THRESHOLD, |
| 138 | MT76_TM_ATTR_IPI_PERIOD, |
| 139 | MT76_TM_ATTR_IPI_ANTENNA_INDEX, |
| 140 | |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 141 | /* keep last */ |
| 142 | NUM_MT76_TM_ATTRS, |
| 143 | MT76_TM_ATTR_MAX = NUM_MT76_TM_ATTRS - 1, |
| 144 | }; |
| 145 | |
| 146 | /** |
| 147 | * enum mt76_testmode_state - statistics attributes |
| 148 | * |
| 149 | * @MT76_TM_STATS_ATTR_TX_PENDING: pending tx frames (u32) |
| 150 | * @MT76_TM_STATS_ATTR_TX_QUEUED: queued tx frames (u32) |
| 151 | * @MT76_TM_STATS_ATTR_TX_QUEUED: completed tx frames (u32) |
| 152 | * |
| 153 | * @MT76_TM_STATS_ATTR_RX_PACKETS: number of rx packets (u64) |
| 154 | * @MT76_TM_STATS_ATTR_RX_FCS_ERROR: number of rx packets with FCS error (u64) |
| 155 | * @MT76_TM_STATS_ATTR_LAST_RX: information about the last received packet |
| 156 | * see &enum mt76_testmode_rx_attr |
| 157 | */ |
| 158 | enum mt76_testmode_stats_attr { |
| 159 | MT76_TM_STATS_ATTR_UNSPEC, |
| 160 | MT76_TM_STATS_ATTR_PAD, |
| 161 | |
| 162 | MT76_TM_STATS_ATTR_TX_PENDING, |
| 163 | MT76_TM_STATS_ATTR_TX_QUEUED, |
| 164 | MT76_TM_STATS_ATTR_TX_DONE, |
| 165 | |
| 166 | MT76_TM_STATS_ATTR_RX_PACKETS, |
| 167 | MT76_TM_STATS_ATTR_RX_FCS_ERROR, |
| 168 | MT76_TM_STATS_ATTR_LAST_RX, |
| 169 | MT76_TM_STATS_ATTR_RX_LEN_MISMATCH, |
| 170 | |
| 171 | /* keep last */ |
| 172 | NUM_MT76_TM_STATS_ATTRS, |
| 173 | MT76_TM_STATS_ATTR_MAX = NUM_MT76_TM_STATS_ATTRS - 1, |
| 174 | }; |
| 175 | |
| 176 | |
| 177 | /** |
| 178 | * enum mt76_testmode_rx_attr - packet rx information |
| 179 | * |
| 180 | * @MT76_TM_RX_ATTR_FREQ_OFFSET: frequency offset (s32) |
| 181 | * @MT76_TM_RX_ATTR_RCPI: received channel power indicator (array, u8) |
| 182 | * @MT76_TM_RX_ATTR_IB_RSSI: internal inband RSSI (array, s8) |
| 183 | * @MT76_TM_RX_ATTR_WB_RSSI: internal wideband RSSI (array, s8) |
| 184 | * @MT76_TM_RX_ATTR_SNR: signal-to-noise ratio (u8) |
| 185 | */ |
| 186 | enum mt76_testmode_rx_attr { |
| 187 | MT76_TM_RX_ATTR_UNSPEC, |
| 188 | |
| 189 | MT76_TM_RX_ATTR_FREQ_OFFSET, |
| 190 | MT76_TM_RX_ATTR_RCPI, |
| 191 | MT76_TM_RX_ATTR_IB_RSSI, |
| 192 | MT76_TM_RX_ATTR_WB_RSSI, |
| 193 | MT76_TM_RX_ATTR_SNR, |
| 194 | |
| 195 | /* keep last */ |
| 196 | NUM_MT76_TM_RX_ATTRS, |
| 197 | MT76_TM_RX_ATTR_MAX = NUM_MT76_TM_RX_ATTRS - 1, |
| 198 | }; |
| 199 | |
| 200 | /** |
| 201 | * enum mt76_testmode_state - phy test state |
| 202 | * |
| 203 | * @MT76_TM_STATE_OFF: test mode disabled (normal operation) |
| 204 | * @MT76_TM_STATE_IDLE: test mode enabled, but idle |
| 205 | * @MT76_TM_STATE_TX_FRAMES: send a fixed number of test frames |
| 206 | * @MT76_TM_STATE_RX_FRAMES: receive packets and keep statistics |
| 207 | * @MT76_TM_STATE_TX_CONT: waveform tx without time gap |
| 208 | * @MT76_TM_STATE_ON: test mode enabled used in offload firmware |
| 209 | */ |
| 210 | enum mt76_testmode_state { |
| 211 | MT76_TM_STATE_OFF, |
| 212 | MT76_TM_STATE_IDLE, |
| 213 | MT76_TM_STATE_TX_FRAMES, |
| 214 | MT76_TM_STATE_RX_FRAMES, |
| 215 | MT76_TM_STATE_TX_CONT, |
| 216 | MT76_TM_STATE_ON, |
| 217 | |
| 218 | /* keep last */ |
| 219 | NUM_MT76_TM_STATES, |
| 220 | MT76_TM_STATE_MAX = NUM_MT76_TM_STATES - 1, |
| 221 | }; |
| 222 | |
| 223 | /** |
| 224 | * enum mt76_testmode_tx_mode - packet tx phy mode |
| 225 | * |
| 226 | * @MT76_TM_TX_MODE_CCK: legacy CCK mode |
| 227 | * @MT76_TM_TX_MODE_OFDM: legacy OFDM mode |
| 228 | * @MT76_TM_TX_MODE_HT: 802.11n MCS |
| 229 | * @MT76_TM_TX_MODE_VHT: 802.11ac MCS |
| 230 | * @MT76_TM_TX_MODE_HE_SU: 802.11ax single-user MIMO |
| 231 | * @MT76_TM_TX_MODE_HE_EXT_SU: 802.11ax extended-range SU |
| 232 | * @MT76_TM_TX_MODE_HE_TB: 802.11ax trigger-based |
| 233 | * @MT76_TM_TX_MODE_HE_MU: 802.11ax multi-user MIMO |
| 234 | */ |
| 235 | enum mt76_testmode_tx_mode { |
| 236 | MT76_TM_TX_MODE_CCK, |
| 237 | MT76_TM_TX_MODE_OFDM, |
| 238 | MT76_TM_TX_MODE_HT, |
| 239 | MT76_TM_TX_MODE_VHT, |
| 240 | MT76_TM_TX_MODE_HE_SU, |
| 241 | MT76_TM_TX_MODE_HE_EXT_SU, |
| 242 | MT76_TM_TX_MODE_HE_TB, |
| 243 | MT76_TM_TX_MODE_HE_MU, |
| 244 | |
| 245 | /* keep last */ |
| 246 | NUM_MT76_TM_TX_MODES, |
| 247 | MT76_TM_TX_MODE_MAX = NUM_MT76_TM_TX_MODES - 1, |
| 248 | }; |
| 249 | |
| 250 | /** |
| 251 | * enum mt76_testmode_eeprom_action - eeprom setting actions |
| 252 | * |
| 253 | * @MT76_TM_EEPROM_ACTION_UPDATE_DATA: update rf values to specific |
| 254 | * eeprom data block |
| 255 | * @MT76_TM_EEPROM_ACTION_UPDATE_BUFFER_MODE: send updated eeprom data to fw |
| 256 | * @MT76_TM_EEPROM_ACTION_WRITE_TO_EFUSE: write eeprom data back to efuse |
| 257 | */ |
| 258 | enum mt76_testmode_eeprom_action { |
| 259 | MT76_TM_EEPROM_ACTION_UPDATE_DATA, |
| 260 | MT76_TM_EEPROM_ACTION_UPDATE_BUFFER_MODE, |
| 261 | MT76_TM_EEPROM_ACTION_WRITE_TO_EFUSE, |
| 262 | |
| 263 | /* keep last */ |
| 264 | NUM_MT76_TM_EEPROM_ACTION, |
| 265 | MT76_TM_EEPROM_ACTION_MAX = NUM_MT76_TM_EEPROM_ACTION - 1, |
| 266 | }; |
| 267 | |
| 268 | enum mt76_testmode_txbf_act { |
developer | 1346ce5 | 2022-12-15 21:36:14 +0800 | [diff] [blame] | 269 | MT76_TM_TXBF_ACT_GOLDEN_INIT, |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 270 | MT76_TM_TXBF_ACT_INIT, |
developer | 1346ce5 | 2022-12-15 21:36:14 +0800 | [diff] [blame] | 271 | MT76_TM_TX_EBF_ACT_GOLDEN_INIT, |
| 272 | MT76_TM_TX_EBF_ACT_INIT, |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 273 | MT76_TM_TXBF_ACT_UPDATE_CH, |
| 274 | MT76_TM_TXBF_ACT_PHASE_COMP, |
| 275 | MT76_TM_TXBF_ACT_TX_PREP, |
| 276 | MT76_TM_TXBF_ACT_IBF_PROF_UPDATE, |
| 277 | MT76_TM_TXBF_ACT_EBF_PROF_UPDATE, |
developer | f9843e2 | 2022-09-13 10:57:15 +0800 | [diff] [blame] | 278 | MT76_TM_TXBF_ACT_APPLY_TX, |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 279 | MT76_TM_TXBF_ACT_PHASE_CAL, |
| 280 | MT76_TM_TXBF_ACT_PROF_UPDATE_ALL, |
developer | f9843e2 | 2022-09-13 10:57:15 +0800 | [diff] [blame] | 281 | MT76_TM_TXBF_ACT_PROF_UPDATE_ALL_CMD, |
developer | 5698c9c | 2022-05-30 16:40:23 +0800 | [diff] [blame] | 282 | MT76_TM_TXBF_ACT_E2P_UPDATE, |
developer | 1346ce5 | 2022-12-15 21:36:14 +0800 | [diff] [blame] | 283 | MT76_TM_TXBF_ACT_TRIGGER_SOUNDING, |
| 284 | MT76_TM_TXBF_ACT_STOP_SOUNDING, |
| 285 | MT76_TM_TXBF_ACT_PROFILE_TAG_READ, |
| 286 | MT76_TM_TXBF_ACT_PROFILE_TAG_WRITE, |
| 287 | MT76_TM_TXBF_ACT_PROFILE_TAG_INVALID, |
| 288 | MT76_TM_TXBF_ACT_STA_REC_READ, |
developer | 3abe1ad | 2022-01-24 11:13:32 +0800 | [diff] [blame] | 289 | |
| 290 | /* keep last */ |
| 291 | NUM_MT76_TM_TXBF_ACT, |
| 292 | MT76_TM_TXBF_ACT_MAX = NUM_MT76_TM_TXBF_ACT - 1, |
| 293 | }; |
| 294 | |
| 295 | #endif |