developer | 0f312e8 | 2022-11-01 12:31:52 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: ISC |
| 2 | /* |
| 3 | * Copyright (C) 2022 MediaTek Inc. |
| 4 | */ |
| 5 | |
| 6 | #include <linux/relay.h> |
| 7 | #include "mt7996.h" |
| 8 | #include "eeprom.h" |
| 9 | #include "mcu.h" |
| 10 | #include "mac.h" |
| 11 | |
| 12 | #define FW_BIN_LOG_MAGIC 0x44d9c99a |
| 13 | |
| 14 | /** global debugfs **/ |
| 15 | |
| 16 | struct hw_queue_map { |
| 17 | const char *name; |
| 18 | u8 index; |
| 19 | u8 pid; |
| 20 | u8 qid; |
| 21 | }; |
| 22 | |
| 23 | static int |
| 24 | mt7996_implicit_txbf_set(void *data, u64 val) |
| 25 | { |
| 26 | struct mt7996_dev *dev = data; |
| 27 | |
| 28 | /* The existing connected stations shall reconnect to apply |
| 29 | * new implicit txbf configuration. |
| 30 | */ |
| 31 | dev->ibf = !!val; |
| 32 | |
| 33 | return mt7996_mcu_set_txbf(dev, BF_HW_EN_UPDATE); |
| 34 | } |
| 35 | |
| 36 | static int |
| 37 | mt7996_implicit_txbf_get(void *data, u64 *val) |
| 38 | { |
| 39 | struct mt7996_dev *dev = data; |
| 40 | |
| 41 | *val = dev->ibf; |
| 42 | |
| 43 | return 0; |
| 44 | } |
| 45 | |
| 46 | DEFINE_DEBUGFS_ATTRIBUTE(fops_implicit_txbf, mt7996_implicit_txbf_get, |
| 47 | mt7996_implicit_txbf_set, "%lld\n"); |
| 48 | |
| 49 | /* test knob of system layer 1/2 error recovery */ |
| 50 | static int mt7996_fw_ser_set(void *data, u64 val) |
| 51 | { |
| 52 | enum { |
| 53 | SER_SET_RECOVER_L1 = 1, |
| 54 | SER_SET_RECOVER_L2, |
| 55 | SER_ENABLE = 2, |
| 56 | SER_RECOVER |
| 57 | }; |
| 58 | struct mt7996_dev *dev = data; |
| 59 | int ret = 0; |
| 60 | |
| 61 | switch (val) { |
| 62 | case SER_SET_RECOVER_L1: |
| 63 | case SER_SET_RECOVER_L2: |
| 64 | ret = mt7996_mcu_set_ser(dev, SER_ENABLE, BIT(val), 0); |
| 65 | if (ret) |
| 66 | return ret; |
| 67 | |
| 68 | return mt7996_mcu_set_ser(dev, SER_RECOVER, val, 0); |
| 69 | default: |
| 70 | break; |
| 71 | } |
| 72 | |
| 73 | return ret; |
| 74 | } |
| 75 | |
| 76 | DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_ser, NULL, |
| 77 | mt7996_fw_ser_set, "%lld\n"); |
| 78 | |
| 79 | static int |
| 80 | mt7996_radar_trigger(void *data, u64 val) |
| 81 | { |
| 82 | struct mt7996_dev *dev = data; |
| 83 | |
| 84 | if (val > MT_RX_SEL2) |
| 85 | return -EINVAL; |
| 86 | |
| 87 | return mt7996_mcu_rdd_cmd(dev, RDD_RADAR_EMULATE, |
| 88 | val, 0, 0); |
| 89 | } |
| 90 | |
| 91 | DEFINE_DEBUGFS_ATTRIBUTE(fops_radar_trigger, NULL, |
| 92 | mt7996_radar_trigger, "%lld\n"); |
| 93 | |
| 94 | static int |
| 95 | mt7996_rdd_monitor(struct seq_file *s, void *data) |
| 96 | { |
| 97 | struct mt7996_dev *dev = dev_get_drvdata(s->private); |
| 98 | struct cfg80211_chan_def *chandef = &dev->rdd2_chandef; |
| 99 | const char *bw; |
| 100 | int ret = 0; |
| 101 | |
| 102 | mutex_lock(&dev->mt76.mutex); |
| 103 | |
| 104 | if (!cfg80211_chandef_valid(chandef)) { |
| 105 | ret = -EINVAL; |
| 106 | goto out; |
| 107 | } |
| 108 | |
| 109 | if (!dev->rdd2_phy) { |
| 110 | seq_puts(s, "not running\n"); |
| 111 | goto out; |
| 112 | } |
| 113 | |
| 114 | switch (chandef->width) { |
| 115 | case NL80211_CHAN_WIDTH_40: |
| 116 | bw = "40"; |
| 117 | break; |
| 118 | case NL80211_CHAN_WIDTH_80: |
| 119 | bw = "80"; |
| 120 | break; |
| 121 | case NL80211_CHAN_WIDTH_160: |
| 122 | bw = "160"; |
| 123 | break; |
| 124 | case NL80211_CHAN_WIDTH_80P80: |
| 125 | bw = "80P80"; |
| 126 | break; |
| 127 | default: |
| 128 | bw = "20"; |
| 129 | break; |
| 130 | } |
| 131 | |
| 132 | seq_printf(s, "channel %d (%d MHz) width %s MHz center1: %d MHz\n", |
| 133 | chandef->chan->hw_value, chandef->chan->center_freq, |
| 134 | bw, chandef->center_freq1); |
| 135 | out: |
| 136 | mutex_unlock(&dev->mt76.mutex); |
| 137 | |
| 138 | return ret; |
| 139 | } |
| 140 | |
| 141 | static int |
| 142 | mt7996_fw_debug_wm_set(void *data, u64 val) |
| 143 | { |
| 144 | struct mt7996_dev *dev = data; |
| 145 | enum { |
| 146 | DEBUG_TXCMD = 62, |
| 147 | DEBUG_CMD_RPT_TX, |
| 148 | DEBUG_CMD_RPT_TRIG, |
| 149 | DEBUG_SPL, |
| 150 | DEBUG_RPT_RX, |
| 151 | DEBUG_RPT_RA = 68, |
| 152 | } debug; |
| 153 | bool tx, rx, en; |
| 154 | int ret; |
| 155 | |
| 156 | dev->fw_debug_wm = val ? MCU_FW_LOG_TO_HOST : 0; |
| 157 | |
| 158 | if (dev->fw_debug_bin) |
| 159 | val = MCU_FW_LOG_RELAY; |
| 160 | else |
| 161 | val = dev->fw_debug_wm; |
| 162 | |
| 163 | tx = dev->fw_debug_wm || (dev->fw_debug_bin & BIT(1)); |
| 164 | rx = dev->fw_debug_wm || (dev->fw_debug_bin & BIT(2)); |
| 165 | en = dev->fw_debug_wm || (dev->fw_debug_bin & BIT(0)); |
| 166 | |
| 167 | ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, val); |
| 168 | if (ret) |
| 169 | return ret; |
| 170 | |
| 171 | for (debug = DEBUG_TXCMD; debug <= DEBUG_RPT_RA; debug++) { |
| 172 | if (debug == 67) |
| 173 | continue; |
| 174 | |
| 175 | if (debug == DEBUG_RPT_RX) |
| 176 | val = en && rx; |
| 177 | else |
| 178 | val = en && tx; |
| 179 | |
| 180 | ret = mt7996_mcu_fw_dbg_ctrl(dev, debug, val); |
| 181 | if (ret) |
| 182 | return ret; |
| 183 | } |
| 184 | |
| 185 | return 0; |
| 186 | } |
| 187 | |
| 188 | static int |
| 189 | mt7996_fw_debug_wm_get(void *data, u64 *val) |
| 190 | { |
| 191 | struct mt7996_dev *dev = data; |
| 192 | |
| 193 | *val = dev->fw_debug_wm; |
| 194 | |
| 195 | return 0; |
| 196 | } |
| 197 | |
| 198 | DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug_wm, mt7996_fw_debug_wm_get, |
| 199 | mt7996_fw_debug_wm_set, "%lld\n"); |
| 200 | |
| 201 | static int |
| 202 | mt7996_fw_debug_wa_set(void *data, u64 val) |
| 203 | { |
| 204 | struct mt7996_dev *dev = data; |
| 205 | int ret; |
| 206 | |
| 207 | dev->fw_debug_wa = val ? MCU_FW_LOG_TO_HOST : 0; |
| 208 | |
| 209 | ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, dev->fw_debug_wa); |
| 210 | if (ret) |
| 211 | return ret; |
| 212 | |
| 213 | return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), MCU_WA_PARAM_PDMA_RX, |
| 214 | !!dev->fw_debug_wa, 0); |
| 215 | } |
| 216 | |
| 217 | static int |
| 218 | mt7996_fw_debug_wa_get(void *data, u64 *val) |
| 219 | { |
| 220 | struct mt7996_dev *dev = data; |
| 221 | |
| 222 | *val = dev->fw_debug_wa; |
| 223 | |
| 224 | return 0; |
| 225 | } |
| 226 | |
| 227 | DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug_wa, mt7996_fw_debug_wa_get, |
| 228 | mt7996_fw_debug_wa_set, "%lld\n"); |
| 229 | |
| 230 | static struct dentry * |
| 231 | create_buf_file_cb(const char *filename, struct dentry *parent, umode_t mode, |
| 232 | struct rchan_buf *buf, int *is_global) |
| 233 | { |
| 234 | struct dentry *f; |
| 235 | |
| 236 | f = debugfs_create_file("fwlog_data", mode, parent, buf, |
| 237 | &relay_file_operations); |
| 238 | if (IS_ERR(f)) |
| 239 | return NULL; |
| 240 | |
| 241 | *is_global = 1; |
| 242 | |
| 243 | return f; |
| 244 | } |
| 245 | |
| 246 | static int |
| 247 | remove_buf_file_cb(struct dentry *f) |
| 248 | { |
| 249 | debugfs_remove(f); |
| 250 | |
| 251 | return 0; |
| 252 | } |
| 253 | |
| 254 | static int |
| 255 | mt7996_fw_debug_bin_set(void *data, u64 val) |
| 256 | { |
| 257 | static struct rchan_callbacks relay_cb = { |
| 258 | .create_buf_file = create_buf_file_cb, |
| 259 | .remove_buf_file = remove_buf_file_cb, |
| 260 | }; |
| 261 | struct mt7996_dev *dev = data; |
| 262 | |
| 263 | if (!dev->relay_fwlog) |
| 264 | dev->relay_fwlog = relay_open("fwlog_data", dev->debugfs_dir, |
| 265 | 1500, 512, &relay_cb, NULL); |
| 266 | if (!dev->relay_fwlog) |
| 267 | return -ENOMEM; |
| 268 | |
| 269 | dev->fw_debug_bin = val; |
| 270 | |
| 271 | relay_reset(dev->relay_fwlog); |
| 272 | |
| 273 | return mt7996_fw_debug_wm_set(dev, dev->fw_debug_wm); |
| 274 | } |
| 275 | |
| 276 | static int |
| 277 | mt7996_fw_debug_bin_get(void *data, u64 *val) |
| 278 | { |
| 279 | struct mt7996_dev *dev = data; |
| 280 | |
| 281 | *val = dev->fw_debug_bin; |
| 282 | |
| 283 | return 0; |
| 284 | } |
| 285 | |
| 286 | DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug_bin, mt7996_fw_debug_bin_get, |
| 287 | mt7996_fw_debug_bin_set, "%lld\n"); |
| 288 | |
| 289 | static int |
| 290 | mt7996_fw_util_wa_show(struct seq_file *file, void *data) |
| 291 | { |
| 292 | struct mt7996_dev *dev = file->private; |
| 293 | |
| 294 | if (dev->fw_debug_wa) |
| 295 | return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(QUERY), |
| 296 | MCU_WA_PARAM_CPU_UTIL, 0, 0); |
| 297 | |
| 298 | return 0; |
| 299 | } |
| 300 | |
| 301 | DEFINE_SHOW_ATTRIBUTE(mt7996_fw_util_wa); |
| 302 | |
| 303 | static void |
| 304 | mt7996_ampdu_stat_read_phy(struct mt7996_phy *phy, struct seq_file *file) |
| 305 | { |
| 306 | struct mt7996_dev *dev = phy->dev; |
| 307 | int bound[15], range[8], i, n; |
| 308 | u8 band_idx = phy->mt76->band_idx; |
| 309 | |
| 310 | /* Tx ampdu stat */ |
| 311 | for (i = 0; i < ARRAY_SIZE(range); i++) |
| 312 | range[i] = mt76_rr(dev, MT_MIB_ARNG(band_idx, i)); |
| 313 | |
| 314 | for (i = 0; i < ARRAY_SIZE(bound); i++) |
| 315 | bound[i] = MT_MIB_ARNCR_RANGE(range[i / 2], i % 2) + 1; |
| 316 | |
| 317 | seq_printf(file, "\nPhy %s, Phy band %d\n", |
| 318 | wiphy_name(phy->mt76->hw->wiphy), band_idx); |
| 319 | |
| 320 | seq_printf(file, "Length: %8d | ", bound[0]); |
| 321 | for (i = 0; i < ARRAY_SIZE(bound) - 1; i++) |
| 322 | seq_printf(file, "%3d -%3d | ", |
| 323 | bound[i] + 1, bound[i + 1]); |
| 324 | |
| 325 | seq_puts(file, "\nCount: "); |
| 326 | n = ARRAY_SIZE(dev->mt76.aggr_stats) / __MT_MAX_BAND * band_idx; |
| 327 | for (i = 0; i < ARRAY_SIZE(bound); i++) |
| 328 | seq_printf(file, "%8d | ", dev->mt76.aggr_stats[i + n]); |
| 329 | seq_puts(file, "\n"); |
| 330 | |
| 331 | seq_printf(file, "BA miss count: %d\n", phy->mib.ba_miss_cnt); |
| 332 | } |
| 333 | |
| 334 | static void |
| 335 | mt7996_txbf_stat_read_phy(struct mt7996_phy *phy, struct seq_file *s) |
| 336 | { |
| 337 | static const char * const bw[] = { |
| 338 | "BW20", "BW40", "BW80", "BW160" |
| 339 | }; |
| 340 | struct mib_stats *mib = &phy->mib; |
| 341 | |
| 342 | /* Tx Beamformer monitor */ |
| 343 | seq_puts(s, "\nTx Beamformer applied PPDU counts: "); |
| 344 | |
| 345 | seq_printf(s, "iBF: %d, eBF: %d\n", |
| 346 | mib->tx_bf_ibf_ppdu_cnt, |
| 347 | mib->tx_bf_ebf_ppdu_cnt); |
| 348 | |
| 349 | /* Tx Beamformer Rx feedback monitor */ |
| 350 | seq_puts(s, "Tx Beamformer Rx feedback statistics: "); |
| 351 | |
| 352 | seq_printf(s, "All: %d, HE: %d, VHT: %d, HT: %d, ", |
| 353 | mib->tx_bf_rx_fb_all_cnt, |
| 354 | mib->tx_bf_rx_fb_he_cnt, |
| 355 | mib->tx_bf_rx_fb_vht_cnt, |
| 356 | mib->tx_bf_rx_fb_ht_cnt); |
| 357 | |
| 358 | seq_printf(s, "%s, NC: %d, NR: %d\n", |
| 359 | bw[mib->tx_bf_rx_fb_bw], |
| 360 | mib->tx_bf_rx_fb_nc_cnt, |
| 361 | mib->tx_bf_rx_fb_nr_cnt); |
| 362 | |
| 363 | /* Tx Beamformee Rx NDPA & Tx feedback report */ |
| 364 | seq_printf(s, "Tx Beamformee successful feedback frames: %d\n", |
| 365 | mib->tx_bf_fb_cpl_cnt); |
| 366 | seq_printf(s, "Tx Beamformee feedback triggered counts: %d\n", |
| 367 | mib->tx_bf_fb_trig_cnt); |
| 368 | |
| 369 | /* Tx SU & MU counters */ |
| 370 | seq_printf(s, "Tx multi-user Beamforming counts: %d\n", |
| 371 | mib->tx_mu_bf_cnt); |
| 372 | seq_printf(s, "Tx multi-user MPDU counts: %d\n", mib->tx_mu_mpdu_cnt); |
| 373 | seq_printf(s, "Tx multi-user successful MPDU counts: %d\n", |
| 374 | mib->tx_mu_acked_mpdu_cnt); |
| 375 | seq_printf(s, "Tx single-user successful MPDU counts: %d\n", |
| 376 | mib->tx_su_acked_mpdu_cnt); |
| 377 | |
| 378 | seq_puts(s, "\n"); |
| 379 | } |
| 380 | |
| 381 | static int |
| 382 | mt7996_tx_stats_show(struct seq_file *file, void *data) |
| 383 | { |
| 384 | struct mt7996_phy *phy = file->private; |
| 385 | struct mt7996_dev *dev = phy->dev; |
| 386 | struct mib_stats *mib = &phy->mib; |
| 387 | int i; |
| 388 | u32 attempts, success, per; |
| 389 | |
| 390 | mutex_lock(&dev->mt76.mutex); |
| 391 | |
| 392 | mt7996_mac_update_stats(phy); |
| 393 | mt7996_ampdu_stat_read_phy(phy, file); |
| 394 | |
| 395 | attempts = mib->tx_mpdu_attempts_cnt; |
| 396 | success = mib->tx_mpdu_success_cnt; |
| 397 | per = attempts ? 100 - success * 100 / attempts : 100; |
| 398 | seq_printf(file, "Tx attempts: %8u (MPDUs)\n", attempts); |
| 399 | seq_printf(file, "Tx success: %8u (MPDUs)\n", success); |
| 400 | seq_printf(file, "Tx PER: %u%%\n", per); |
| 401 | |
| 402 | mt7996_txbf_stat_read_phy(phy, file); |
| 403 | |
| 404 | /* Tx amsdu info */ |
| 405 | seq_puts(file, "Tx MSDU statistics:\n"); |
| 406 | for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) { |
| 407 | seq_printf(file, "AMSDU pack count of %d MSDU in TXD: %8d ", |
| 408 | i + 1, mib->tx_amsdu[i]); |
| 409 | if (mib->tx_amsdu_cnt) |
| 410 | seq_printf(file, "(%3d%%)\n", |
| 411 | mib->tx_amsdu[i] * 100 / mib->tx_amsdu_cnt); |
| 412 | else |
| 413 | seq_puts(file, "\n"); |
| 414 | } |
| 415 | |
| 416 | mutex_unlock(&dev->mt76.mutex); |
| 417 | |
| 418 | return 0; |
| 419 | } |
| 420 | |
| 421 | DEFINE_SHOW_ATTRIBUTE(mt7996_tx_stats); |
| 422 | |
| 423 | static void |
| 424 | mt7996_hw_queue_read(struct seq_file *s, u32 size, |
| 425 | const struct hw_queue_map *map) |
| 426 | { |
| 427 | struct mt7996_phy *phy = s->private; |
| 428 | struct mt7996_dev *dev = phy->dev; |
| 429 | u32 i, val; |
| 430 | |
| 431 | val = mt76_rr(dev, MT_FL_Q_EMPTY); |
| 432 | for (i = 0; i < size; i++) { |
| 433 | u32 ctrl, head, tail, queued; |
| 434 | |
| 435 | if (val & BIT(map[i].index)) |
| 436 | continue; |
| 437 | |
| 438 | ctrl = BIT(31) | (map[i].pid << 10) | (map[i].qid << 24); |
| 439 | mt76_wr(dev, MT_FL_Q0_CTRL, ctrl); |
| 440 | |
| 441 | head = mt76_get_field(dev, MT_FL_Q2_CTRL, |
| 442 | GENMASK(11, 0)); |
| 443 | tail = mt76_get_field(dev, MT_FL_Q2_CTRL, |
| 444 | GENMASK(27, 16)); |
| 445 | queued = mt76_get_field(dev, MT_FL_Q3_CTRL, |
| 446 | GENMASK(11, 0)); |
| 447 | |
| 448 | seq_printf(s, "\t%s: ", map[i].name); |
| 449 | seq_printf(s, "queued:0x%03x head:0x%03x tail:0x%03x\n", |
| 450 | queued, head, tail); |
| 451 | } |
| 452 | } |
| 453 | |
| 454 | static void |
| 455 | mt7996_sta_hw_queue_read(void *data, struct ieee80211_sta *sta) |
| 456 | { |
| 457 | struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; |
| 458 | struct mt7996_dev *dev = msta->vif->phy->dev; |
| 459 | struct seq_file *s = data; |
| 460 | u8 ac; |
| 461 | |
| 462 | for (ac = 0; ac < 4; ac++) { |
| 463 | u32 qlen, ctrl, val; |
| 464 | u32 idx = msta->wcid.idx >> 5; |
| 465 | u8 offs = msta->wcid.idx & GENMASK(4, 0); |
| 466 | |
| 467 | ctrl = BIT(31) | BIT(11) | (ac << 24); |
| 468 | val = mt76_rr(dev, MT_PLE_AC_QEMPTY(ac, idx)); |
| 469 | |
| 470 | if (val & BIT(offs)) |
| 471 | continue; |
| 472 | |
| 473 | mt76_wr(dev, MT_FL_Q0_CTRL, ctrl | msta->wcid.idx); |
| 474 | qlen = mt76_get_field(dev, MT_FL_Q3_CTRL, |
| 475 | GENMASK(11, 0)); |
| 476 | seq_printf(s, "\tSTA %pM wcid %d: AC%d%d queued:%d\n", |
| 477 | sta->addr, msta->wcid.idx, |
| 478 | msta->vif->mt76.wmm_idx, ac, qlen); |
| 479 | } |
| 480 | } |
| 481 | |
| 482 | static int |
| 483 | mt7996_hw_queues_show(struct seq_file *file, void *data) |
| 484 | { |
| 485 | struct mt7996_phy *phy = file->private; |
| 486 | struct mt7996_dev *dev = phy->dev; |
| 487 | static const struct hw_queue_map ple_queue_map[] = { |
| 488 | { "CPU_Q0", 0, 1, MT_CTX0 }, |
| 489 | { "CPU_Q1", 1, 1, MT_CTX0 + 1 }, |
| 490 | { "CPU_Q2", 2, 1, MT_CTX0 + 2 }, |
| 491 | { "CPU_Q3", 3, 1, MT_CTX0 + 3 }, |
| 492 | { "ALTX_Q0", 8, 2, MT_LMAC_ALTX0 }, |
| 493 | { "BMC_Q0", 9, 2, MT_LMAC_BMC0 }, |
| 494 | { "BCN_Q0", 10, 2, MT_LMAC_BCN0 }, |
| 495 | { "PSMP_Q0", 11, 2, MT_LMAC_PSMP0 }, |
| 496 | { "ALTX_Q1", 12, 2, MT_LMAC_ALTX0 + 4 }, |
| 497 | { "BMC_Q1", 13, 2, MT_LMAC_BMC0 + 4 }, |
| 498 | { "BCN_Q1", 14, 2, MT_LMAC_BCN0 + 4 }, |
| 499 | { "PSMP_Q1", 15, 2, MT_LMAC_PSMP0 + 4 }, |
| 500 | }; |
| 501 | static const struct hw_queue_map pse_queue_map[] = { |
| 502 | { "CPU Q0", 0, 1, MT_CTX0 }, |
| 503 | { "CPU Q1", 1, 1, MT_CTX0 + 1 }, |
| 504 | { "CPU Q2", 2, 1, MT_CTX0 + 2 }, |
| 505 | { "CPU Q3", 3, 1, MT_CTX0 + 3 }, |
| 506 | { "HIF_Q0", 8, 0, MT_HIF0 }, |
| 507 | { "HIF_Q1", 9, 0, MT_HIF0 + 1 }, |
| 508 | { "HIF_Q2", 10, 0, MT_HIF0 + 2 }, |
| 509 | { "HIF_Q3", 11, 0, MT_HIF0 + 3 }, |
| 510 | { "HIF_Q4", 12, 0, MT_HIF0 + 4 }, |
| 511 | { "HIF_Q5", 13, 0, MT_HIF0 + 5 }, |
| 512 | { "LMAC_Q", 16, 2, 0 }, |
| 513 | { "MDP_TXQ", 17, 2, 1 }, |
| 514 | { "MDP_RXQ", 18, 2, 2 }, |
| 515 | { "SEC_TXQ", 19, 2, 3 }, |
| 516 | { "SEC_RXQ", 20, 2, 4 }, |
| 517 | }; |
| 518 | u32 val, head, tail; |
| 519 | |
| 520 | /* ple queue */ |
| 521 | val = mt76_rr(dev, MT_PLE_FREEPG_CNT); |
| 522 | head = mt76_get_field(dev, MT_PLE_FREEPG_HEAD_TAIL, GENMASK(11, 0)); |
| 523 | tail = mt76_get_field(dev, MT_PLE_FREEPG_HEAD_TAIL, GENMASK(27, 16)); |
| 524 | seq_puts(file, "PLE page info:\n"); |
| 525 | seq_printf(file, |
| 526 | "\tTotal free page: 0x%08x head: 0x%03x tail: 0x%03x\n", |
| 527 | val, head, tail); |
| 528 | |
| 529 | val = mt76_rr(dev, MT_PLE_PG_HIF_GROUP); |
| 530 | head = mt76_get_field(dev, MT_PLE_HIF_PG_INFO, GENMASK(11, 0)); |
| 531 | tail = mt76_get_field(dev, MT_PLE_HIF_PG_INFO, GENMASK(27, 16)); |
| 532 | seq_printf(file, "\tHIF free page: 0x%03x res: 0x%03x used: 0x%03x\n", |
| 533 | val, head, tail); |
| 534 | |
| 535 | seq_puts(file, "PLE non-empty queue info:\n"); |
| 536 | mt7996_hw_queue_read(file, ARRAY_SIZE(ple_queue_map), |
| 537 | &ple_queue_map[0]); |
| 538 | |
| 539 | /* iterate per-sta ple queue */ |
| 540 | ieee80211_iterate_stations_atomic(phy->mt76->hw, |
| 541 | mt7996_sta_hw_queue_read, file); |
| 542 | /* pse queue */ |
| 543 | seq_puts(file, "PSE non-empty queue info:\n"); |
| 544 | mt7996_hw_queue_read(file, ARRAY_SIZE(pse_queue_map), |
| 545 | &pse_queue_map[0]); |
| 546 | |
| 547 | return 0; |
| 548 | } |
| 549 | |
| 550 | DEFINE_SHOW_ATTRIBUTE(mt7996_hw_queues); |
| 551 | |
| 552 | static int |
| 553 | mt7996_xmit_queues_show(struct seq_file *file, void *data) |
| 554 | { |
| 555 | struct mt7996_phy *phy = file->private; |
| 556 | struct mt7996_dev *dev = phy->dev; |
| 557 | struct { |
| 558 | struct mt76_queue *q; |
| 559 | char *queue; |
| 560 | } queue_map[] = { |
| 561 | { phy->mt76->q_tx[MT_TXQ_BE], " MAIN" }, |
| 562 | { dev->mt76.q_mcu[MT_MCUQ_WM], " MCUWM" }, |
| 563 | { dev->mt76.q_mcu[MT_MCUQ_WA], " MCUWA" }, |
| 564 | { dev->mt76.q_mcu[MT_MCUQ_FWDL], "MCUFWDL" }, |
| 565 | }; |
| 566 | int i; |
| 567 | |
| 568 | seq_puts(file, " queue | hw-queued | head | tail |\n"); |
| 569 | for (i = 0; i < ARRAY_SIZE(queue_map); i++) { |
| 570 | struct mt76_queue *q = queue_map[i].q; |
| 571 | |
| 572 | if (!q) |
| 573 | continue; |
| 574 | |
| 575 | seq_printf(file, " %s | %9d | %9d | %9d |\n", |
| 576 | queue_map[i].queue, q->queued, q->head, |
| 577 | q->tail); |
| 578 | } |
| 579 | |
| 580 | return 0; |
| 581 | } |
| 582 | |
| 583 | DEFINE_SHOW_ATTRIBUTE(mt7996_xmit_queues); |
| 584 | |
| 585 | static int |
| 586 | mt7996_twt_stats(struct seq_file *s, void *data) |
| 587 | { |
| 588 | struct mt7996_dev *dev = dev_get_drvdata(s->private); |
| 589 | struct mt7996_twt_flow *iter; |
| 590 | |
| 591 | rcu_read_lock(); |
| 592 | |
| 593 | seq_puts(s, " wcid | id | flags | exp | mantissa"); |
| 594 | seq_puts(s, " | duration | tsf |\n"); |
| 595 | list_for_each_entry_rcu(iter, &dev->twt_list, list) |
| 596 | seq_printf(s, |
| 597 | "%9d | %8d | %5c%c%c%c | %8d | %8d | %8d | %14lld |\n", |
| 598 | iter->wcid, iter->id, |
| 599 | iter->sched ? 's' : 'u', |
| 600 | iter->protection ? 'p' : '-', |
| 601 | iter->trigger ? 't' : '-', |
| 602 | iter->flowtype ? '-' : 'a', |
| 603 | iter->exp, iter->mantissa, |
| 604 | iter->duration, iter->tsf); |
| 605 | |
| 606 | rcu_read_unlock(); |
| 607 | |
| 608 | return 0; |
| 609 | } |
| 610 | |
| 611 | /* The index of RF registers use the generic regidx, combined with two parts: |
| 612 | * WF selection [31:24] and offset [23:0]. |
| 613 | */ |
| 614 | static int |
| 615 | mt7996_rf_regval_get(void *data, u64 *val) |
| 616 | { |
| 617 | struct mt7996_dev *dev = data; |
| 618 | u32 regval; |
| 619 | int ret; |
| 620 | |
| 621 | ret = mt7996_mcu_rf_regval(dev, dev->mt76.debugfs_reg, ®val, false); |
| 622 | if (ret) |
| 623 | return ret; |
| 624 | |
| 625 | *val = le32_to_cpu(regval); |
| 626 | |
| 627 | return 0; |
| 628 | } |
| 629 | |
| 630 | static int |
| 631 | mt7996_rf_regval_set(void *data, u64 val) |
| 632 | { |
| 633 | struct mt7996_dev *dev = data; |
| 634 | |
| 635 | return mt7996_mcu_rf_regval(dev, dev->mt76.debugfs_reg, (u32 *)&val, true); |
| 636 | } |
| 637 | |
| 638 | DEFINE_DEBUGFS_ATTRIBUTE(fops_rf_regval, mt7996_rf_regval_get, |
| 639 | mt7996_rf_regval_set, "0x%08llx\n"); |
| 640 | |
| 641 | int mt7996_init_debugfs(struct mt7996_phy *phy) |
| 642 | { |
| 643 | struct mt7996_dev *dev = phy->dev; |
| 644 | struct dentry *dir; |
| 645 | |
| 646 | dir = mt76_register_debugfs_fops(phy->mt76, NULL); |
| 647 | if (!dir) |
| 648 | return -ENOMEM; |
| 649 | debugfs_create_file("hw-queues", 0400, dir, phy, |
| 650 | &mt7996_hw_queues_fops); |
| 651 | debugfs_create_file("xmit-queues", 0400, dir, phy, |
| 652 | &mt7996_xmit_queues_fops); |
| 653 | debugfs_create_file("tx_stats", 0400, dir, phy, &mt7996_tx_stats_fops); |
| 654 | debugfs_create_file("fw_debug_wm", 0600, dir, dev, &fops_fw_debug_wm); |
| 655 | debugfs_create_file("fw_debug_wa", 0600, dir, dev, &fops_fw_debug_wa); |
| 656 | debugfs_create_file("fw_debug_bin", 0600, dir, dev, &fops_fw_debug_bin); |
| 657 | /* TODO: wm fw cpu utilization */ |
| 658 | debugfs_create_file("fw_util_wa", 0400, dir, dev, |
| 659 | &mt7996_fw_util_wa_fops); |
| 660 | debugfs_create_file("implicit_txbf", 0600, dir, dev, |
| 661 | &fops_implicit_txbf); |
| 662 | debugfs_create_devm_seqfile(dev->mt76.dev, "twt_stats", dir, |
| 663 | mt7996_twt_stats); |
| 664 | debugfs_create_file("fw_ser", 0200, dir, dev, &fops_fw_ser); |
| 665 | debugfs_create_file("rf_regval", 0600, dir, dev, &fops_rf_regval); |
| 666 | |
| 667 | if (phy->mt76->cap.has_5ghz) { |
| 668 | debugfs_create_u32("dfs_hw_pattern", 0400, dir, |
| 669 | &dev->hw_pattern); |
| 670 | debugfs_create_file("radar_trigger", 0200, dir, dev, |
| 671 | &fops_radar_trigger); |
| 672 | debugfs_create_devm_seqfile(dev->mt76.dev, "rdd_monitor", dir, |
| 673 | mt7996_rdd_monitor); |
| 674 | } |
| 675 | |
| 676 | if (phy == &dev->phy) |
| 677 | dev->debugfs_dir = dir; |
| 678 | |
| 679 | return 0; |
| 680 | } |
| 681 | |
| 682 | static void |
| 683 | mt7996_debugfs_write_fwlog(struct mt7996_dev *dev, const void *hdr, int hdrlen, |
| 684 | const void *data, int len) |
| 685 | { |
| 686 | static DEFINE_SPINLOCK(lock); |
| 687 | unsigned long flags; |
| 688 | void *dest; |
| 689 | |
| 690 | spin_lock_irqsave(&lock, flags); |
| 691 | dest = relay_reserve(dev->relay_fwlog, hdrlen + len + 4); |
| 692 | if (dest) { |
| 693 | *(u32 *)dest = hdrlen + len; |
| 694 | dest += 4; |
| 695 | |
| 696 | if (hdrlen) { |
| 697 | memcpy(dest, hdr, hdrlen); |
| 698 | dest += hdrlen; |
| 699 | } |
| 700 | |
| 701 | memcpy(dest, data, len); |
| 702 | relay_flush(dev->relay_fwlog); |
| 703 | } |
| 704 | spin_unlock_irqrestore(&lock, flags); |
| 705 | } |
| 706 | |
| 707 | void mt7996_debugfs_rx_fw_monitor(struct mt7996_dev *dev, const void *data, int len) |
| 708 | { |
| 709 | struct { |
| 710 | __le32 magic; |
| 711 | u8 version; |
| 712 | u8 _rsv; |
| 713 | __le16 serial_id; |
| 714 | __le32 timestamp; |
| 715 | __le16 msg_type; |
| 716 | __le16 len; |
| 717 | } hdr = { |
| 718 | .version = 0x1, |
| 719 | .magic = cpu_to_le32(FW_BIN_LOG_MAGIC), |
| 720 | .msg_type = cpu_to_le16(PKT_TYPE_RX_FW_MONITOR), |
| 721 | }; |
| 722 | |
| 723 | if (!dev->relay_fwlog) |
| 724 | return; |
| 725 | |
| 726 | hdr.serial_id = cpu_to_le16(dev->fw_debug_seq++); |
| 727 | hdr.timestamp = cpu_to_le32(mt76_rr(dev, MT_LPON_FRCR(0))); |
| 728 | hdr.len = *(__le16 *)data; |
| 729 | mt7996_debugfs_write_fwlog(dev, &hdr, sizeof(hdr), data, len); |
| 730 | } |
| 731 | |
| 732 | bool mt7996_debugfs_rx_log(struct mt7996_dev *dev, const void *data, int len) |
| 733 | { |
| 734 | if (get_unaligned_le32(data) != FW_BIN_LOG_MAGIC) |
| 735 | return false; |
| 736 | |
| 737 | if (dev->relay_fwlog) |
| 738 | mt7996_debugfs_write_fwlog(dev, NULL, 0, data, len); |
| 739 | |
| 740 | return true; |
| 741 | } |
| 742 | |
| 743 | #ifdef CONFIG_MAC80211_DEBUGFS |
| 744 | /** per-station debugfs **/ |
| 745 | |
| 746 | static ssize_t mt7996_sta_fixed_rate_set(struct file *file, |
| 747 | const char __user *user_buf, |
| 748 | size_t count, loff_t *ppos) |
| 749 | { |
| 750 | #define SHORT_PREAMBLE 0 |
| 751 | #define LONG_PREAMBLE 1 |
| 752 | struct ieee80211_sta *sta = file->private_data; |
| 753 | struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; |
| 754 | struct mt7996_dev *dev = msta->vif->phy->dev; |
| 755 | struct ra_rate phy = {}; |
| 756 | char buf[100]; |
| 757 | int ret; |
| 758 | u16 gi, ltf; |
| 759 | |
| 760 | if (count >= sizeof(buf)) |
| 761 | return -EINVAL; |
| 762 | |
| 763 | if (copy_from_user(buf, user_buf, count)) |
| 764 | return -EFAULT; |
| 765 | |
| 766 | if (count && buf[count - 1] == '\n') |
| 767 | buf[count - 1] = '\0'; |
| 768 | else |
| 769 | buf[count] = '\0'; |
| 770 | |
| 771 | /* mode - cck: 0, ofdm: 1, ht: 2, gf: 3, vht: 4, he_su: 8, he_er: 9 |
| 772 | * bw - bw20: 0, bw40: 1, bw80: 2, bw160: 3 |
| 773 | * nss - vht: 1~4, he: 1~4, others: ignore |
| 774 | * mcs - cck: 0~4, ofdm: 0~7, ht: 0~32, vht: 0~9, he_su: 0~11, he_er: 0~2 |
| 775 | * gi - (ht/vht) lgi: 0, sgi: 1; (he) 0.8us: 0, 1.6us: 1, 3.2us: 2 |
| 776 | * preamble - short: 1, long: 0 |
| 777 | * ldpc - off: 0, on: 1 |
| 778 | * stbc - off: 0, on: 1 |
| 779 | * ltf - 1xltf: 0, 2xltf: 1, 4xltf: 2 |
| 780 | */ |
| 781 | if (sscanf(buf, "%hhu %hhu %hhu %hhu %hu %hhu %hhu %hhu %hhu %hu", |
| 782 | &phy.mode, &phy.bw, &phy.mcs, &phy.nss, &gi, |
| 783 | &phy.preamble, &phy.stbc, &phy.ldpc, &phy.spe, <f) != 10) { |
| 784 | dev_warn(dev->mt76.dev, |
| 785 | "format: Mode BW MCS NSS GI Preamble STBC LDPC SPE ltf\n"); |
| 786 | goto out; |
| 787 | } |
| 788 | |
| 789 | phy.wlan_idx = cpu_to_le16(msta->wcid.idx); |
| 790 | phy.gi = cpu_to_le16(gi); |
| 791 | phy.ltf = cpu_to_le16(ltf); |
| 792 | phy.ldpc = phy.ldpc ? 7 : 0; |
| 793 | phy.preamble = phy.preamble ? SHORT_PREAMBLE : LONG_PREAMBLE; |
| 794 | |
| 795 | ret = mt7996_mcu_set_fixed_rate_ctrl(dev, &phy, 0); |
| 796 | if (ret) |
| 797 | return -EFAULT; |
| 798 | |
| 799 | out: |
| 800 | return count; |
| 801 | } |
| 802 | |
| 803 | static const struct file_operations fops_fixed_rate = { |
| 804 | .write = mt7996_sta_fixed_rate_set, |
| 805 | .open = simple_open, |
| 806 | .owner = THIS_MODULE, |
| 807 | .llseek = default_llseek, |
| 808 | }; |
| 809 | |
| 810 | static int |
| 811 | mt7996_queues_show(struct seq_file *s, void *data) |
| 812 | { |
| 813 | struct ieee80211_sta *sta = s->private; |
| 814 | |
| 815 | mt7996_sta_hw_queue_read(s, sta); |
| 816 | |
| 817 | return 0; |
| 818 | } |
| 819 | |
| 820 | DEFINE_SHOW_ATTRIBUTE(mt7996_queues); |
| 821 | |
| 822 | void mt7996_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
| 823 | struct ieee80211_sta *sta, struct dentry *dir) |
| 824 | { |
| 825 | debugfs_create_file("fixed_rate", 0600, dir, sta, &fops_fixed_rate); |
| 826 | debugfs_create_file("hw-queues", 0400, dir, sta, &mt7996_queues_fops); |
| 827 | } |
| 828 | |
| 829 | #endif |