developer | 41370d5 | 2022-03-16 16:01:59 +0800 | [diff] [blame] | 1 | From bdb84a22b02b0c2ca76bb3e3e16942338f67999b Mon Sep 17 00:00:00 2001 |
| 2 | From: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com> |
| 3 | Date: Sun, 8 Nov 2020 19:37:34 +0800 |
| 4 | Subject: [PATCH] mtd: spinand: micron: Use more specific names |
| 5 | |
| 6 | Rename the read/write/update of SPINAND_OP_VARIANTS() to more |
| 7 | specialized names. |
| 8 | |
| 9 | Signed-off-by: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com> |
| 10 | Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> |
| 11 | Link: https://lore.kernel.org/linux-mtd/20201108113735.2533-2-nthirumalesha7@gmail.com |
| 12 | --- |
| 13 | drivers/mtd/nand/spi/micron.c | 60 +++++++++++++++++------------------ |
| 14 | 1 file changed, 30 insertions(+), 30 deletions(-) |
| 15 | |
| 16 | diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c |
| 17 | index 5d370cfcdaaaa9..afe3ba37dcfb8e 100644 |
| 18 | --- a/drivers/mtd/nand/spi/micron.c |
| 19 | +++ b/drivers/mtd/nand/spi/micron.c |
| 20 | @@ -28,7 +28,7 @@ |
| 21 | |
| 22 | #define MICRON_SELECT_DIE(x) ((x) << 6) |
| 23 | |
| 24 | -static SPINAND_OP_VARIANTS(read_cache_variants, |
| 25 | +static SPINAND_OP_VARIANTS(quadio_read_cache_variants, |
| 26 | SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), |
| 27 | SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), |
| 28 | SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), |
| 29 | @@ -36,11 +36,11 @@ static SPINAND_OP_VARIANTS(read_cache_variants, |
| 30 | SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), |
| 31 | SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); |
| 32 | |
| 33 | -static SPINAND_OP_VARIANTS(write_cache_variants, |
| 34 | +static SPINAND_OP_VARIANTS(x4_write_cache_variants, |
| 35 | SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), |
| 36 | SPINAND_PROG_LOAD(true, 0, NULL, 0)); |
| 37 | |
| 38 | -static SPINAND_OP_VARIANTS(update_cache_variants, |
| 39 | +static SPINAND_OP_VARIANTS(x4_update_cache_variants, |
| 40 | SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), |
| 41 | SPINAND_PROG_LOAD(false, 0, NULL, 0)); |
| 42 | |
| 43 | @@ -120,9 +120,9 @@ static const struct spinand_info micron_spinand_table[] = { |
| 44 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x24), |
| 45 | NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), |
| 46 | NAND_ECCREQ(8, 512), |
| 47 | - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 48 | - &write_cache_variants, |
| 49 | - &update_cache_variants), |
| 50 | + SPINAND_INFO_OP_VARIANTS(&quadio_read_cache_variants, |
| 51 | + &x4_write_cache_variants, |
| 52 | + &x4_update_cache_variants), |
| 53 | 0, |
| 54 | SPINAND_ECCINFO(µn_8_ooblayout, |
| 55 | micron_8_ecc_get_status)), |
| 56 | @@ -131,9 +131,9 @@ static const struct spinand_info micron_spinand_table[] = { |
| 57 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x25), |
| 58 | NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), |
| 59 | NAND_ECCREQ(8, 512), |
| 60 | - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 61 | - &write_cache_variants, |
| 62 | - &update_cache_variants), |
| 63 | + SPINAND_INFO_OP_VARIANTS(&quadio_read_cache_variants, |
| 64 | + &x4_write_cache_variants, |
| 65 | + &x4_update_cache_variants), |
| 66 | 0, |
| 67 | SPINAND_ECCINFO(µn_8_ooblayout, |
| 68 | micron_8_ecc_get_status)), |
| 69 | @@ -142,9 +142,9 @@ static const struct spinand_info micron_spinand_table[] = { |
| 70 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x14), |
| 71 | NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
| 72 | NAND_ECCREQ(8, 512), |
| 73 | - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 74 | - &write_cache_variants, |
| 75 | - &update_cache_variants), |
| 76 | + SPINAND_INFO_OP_VARIANTS(&quadio_read_cache_variants, |
| 77 | + &x4_write_cache_variants, |
| 78 | + &x4_update_cache_variants), |
| 79 | 0, |
| 80 | SPINAND_ECCINFO(µn_8_ooblayout, |
| 81 | micron_8_ecc_get_status)), |
| 82 | @@ -153,9 +153,9 @@ static const struct spinand_info micron_spinand_table[] = { |
| 83 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x15), |
| 84 | NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
| 85 | NAND_ECCREQ(8, 512), |
| 86 | - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 87 | - &write_cache_variants, |
| 88 | - &update_cache_variants), |
| 89 | + SPINAND_INFO_OP_VARIANTS(&quadio_read_cache_variants, |
| 90 | + &x4_write_cache_variants, |
| 91 | + &x4_update_cache_variants), |
| 92 | 0, |
| 93 | SPINAND_ECCINFO(µn_8_ooblayout, |
| 94 | micron_8_ecc_get_status)), |
| 95 | @@ -164,9 +164,9 @@ static const struct spinand_info micron_spinand_table[] = { |
| 96 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x36), |
| 97 | NAND_MEMORG(1, 2048, 128, 64, 2048, 80, 2, 1, 2), |
| 98 | NAND_ECCREQ(8, 512), |
| 99 | - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 100 | - &write_cache_variants, |
| 101 | - &update_cache_variants), |
| 102 | + SPINAND_INFO_OP_VARIANTS(&quadio_read_cache_variants, |
| 103 | + &x4_write_cache_variants, |
| 104 | + &x4_update_cache_variants), |
| 105 | 0, |
| 106 | SPINAND_ECCINFO(µn_8_ooblayout, |
| 107 | micron_8_ecc_get_status), |
| 108 | @@ -176,9 +176,9 @@ static const struct spinand_info micron_spinand_table[] = { |
| 109 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x34), |
| 110 | NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), |
| 111 | NAND_ECCREQ(8, 512), |
| 112 | - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 113 | - &write_cache_variants, |
| 114 | - &update_cache_variants), |
| 115 | + SPINAND_INFO_OP_VARIANTS(&quadio_read_cache_variants, |
| 116 | + &x4_write_cache_variants, |
| 117 | + &x4_update_cache_variants), |
| 118 | SPINAND_HAS_CR_FEAT_BIT, |
| 119 | SPINAND_ECCINFO(µn_8_ooblayout, |
| 120 | micron_8_ecc_get_status)), |
| 121 | @@ -187,9 +187,9 @@ static const struct spinand_info micron_spinand_table[] = { |
| 122 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x35), |
| 123 | NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), |
| 124 | NAND_ECCREQ(8, 512), |
| 125 | - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 126 | - &write_cache_variants, |
| 127 | - &update_cache_variants), |
| 128 | + SPINAND_INFO_OP_VARIANTS(&quadio_read_cache_variants, |
| 129 | + &x4_write_cache_variants, |
| 130 | + &x4_update_cache_variants), |
| 131 | SPINAND_HAS_CR_FEAT_BIT, |
| 132 | SPINAND_ECCINFO(µn_8_ooblayout, |
| 133 | micron_8_ecc_get_status)), |
| 134 | @@ -198,9 +198,9 @@ static const struct spinand_info micron_spinand_table[] = { |
| 135 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x46), |
| 136 | NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2), |
| 137 | NAND_ECCREQ(8, 512), |
| 138 | - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 139 | - &write_cache_variants, |
| 140 | - &update_cache_variants), |
| 141 | + SPINAND_INFO_OP_VARIANTS(&quadio_read_cache_variants, |
| 142 | + &x4_write_cache_variants, |
| 143 | + &x4_update_cache_variants), |
| 144 | SPINAND_HAS_CR_FEAT_BIT, |
| 145 | SPINAND_ECCINFO(µn_8_ooblayout, |
| 146 | micron_8_ecc_get_status), |
| 147 | @@ -210,9 +210,9 @@ static const struct spinand_info micron_spinand_table[] = { |
| 148 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x47), |
| 149 | NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2), |
| 150 | NAND_ECCREQ(8, 512), |
| 151 | - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 152 | - &write_cache_variants, |
| 153 | - &update_cache_variants), |
| 154 | + SPINAND_INFO_OP_VARIANTS(&quadio_read_cache_variants, |
| 155 | + &x4_write_cache_variants, |
| 156 | + &x4_update_cache_variants), |
| 157 | SPINAND_HAS_CR_FEAT_BIT, |
| 158 | SPINAND_ECCINFO(µn_8_ooblayout, |
| 159 | micron_8_ecc_get_status), |