| developer | e0cea0f | 2021-12-16 16:08:26 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0
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| 2 | /*
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| 3 | * Si3217x ProSLIC API Configuration Tool Version 4.2.1
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| 4 | * Last Updated in API Release: 9.2.0
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| 5 | * source XML file: si3217x_FLBK_GDRV_constants.xml
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| 6 | *
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| 7 | * Auto generated file from configuration tool.
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| 8 | */
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| 9 |
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| 10 | #include "../inc/vdaa.h"
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| 11 |
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| 12 | vdaa_General_Cfg Vdaa_General_Configuration = {
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| 13 | INTE_DISABLED,
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| 14 | INTE_ACTIVE_LOW,
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| 15 | RES_CAL_ENABLED,
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| 16 | FS_8KHZ,
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| 17 | FOH_128,
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| 18 | LVS_FORCE_ENABLED,
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| 19 | CVS_CURRENT,
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| 20 | CVP_ABOVE,
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| 21 | GCE_DISABLED,
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| 22 | IIR_DISABLED,
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| 23 | FULL2_ENABLED,
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| 24 | FULL_DISABLED,
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| 25 | FILT_HPF_200HZ,
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| 26 | RG1_DISABLED,
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| 27 | PWM_DELTA_SIGMA,
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| 28 | PWM_DISABLED,
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| 29 | SPIM_TRI_CS
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| 30 | };
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| 31 |
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| 32 | vdaa_Country_Cfg Vdaa_Country_Presets[] ={
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| 33 | {
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| 34 | RZ_MAX,
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| 35 | DC_50,
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| 36 | AC_600,
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| 37 | DCV3_5,
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| 38 | MINI_10MA,
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| 39 | ILIM_DISABLED,
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| 40 | OHS_LESS_THAN_0_5MS,
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| 41 | HYBRID_ENABLED
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| 42 | }, /* COU_USA */
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| 43 | {
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| 44 | RZ_MAX,
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| 45 | DC_50,
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| 46 | AC_270__750_150,
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| 47 | DCV3_5,
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| 48 | MINI_10MA,
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| 49 | ILIM_ENABLED,
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| 50 | OHS_3MS,
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| 51 | HYBRID_ENABLED
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| 52 | }, /* COU_GERMANY */
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| 53 | {
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| 54 | RZ_MAX,
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| 55 | DC_50,
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| 56 | AC_200__680_100,
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| 57 | DCV3_5,
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| 58 | MINI_10MA,
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| 59 | ILIM_DISABLED,
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| 60 | OHS_LESS_THAN_0_5MS,
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| 61 | HYBRID_ENABLED
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| 62 | }, /* COU_CHINA */
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| 63 | {
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| 64 | RZ_MAX,
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| 65 | DC_50,
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| 66 | AC_220__820_120,
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| 67 | DCV3_2,
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| 68 | MINI_12MA,
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| 69 | ILIM_DISABLED,
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| 70 | OHS_26MS,
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| 71 | HYBRID_ENABLED
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| 72 | } /* COU_AUSTRALIA */
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| 73 | };
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| 74 |
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| 75 | vdaa_audioGain_Cfg Vdaa_audioGain_Presets[] ={
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| 76 | {
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| 77 | 0, /* mute */
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| 78 | XGA_GAIN, /* xXGA2 */
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| 79 | 0, /* xXG2 */
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| 80 | XGA_GAIN, /* xXGA3 */
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| 81 | 0, /* xXG3 */
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| 82 | 64, /* AxM */
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| 83 | 0 /* cpEn */
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| 84 | }, /* AUDIO_GAIN_0DB */
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| 85 | {
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| 86 | 0, /* mute */
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| 87 | XGA_ATTEN, /* xXGA2 */
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| 88 | 4, /* xXG2 */
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| 89 | XGA_GAIN, /* xXGA3 */
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| 90 | 0, /* xXG3 */
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| 91 | 64, /* AxM */
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| 92 | 0 /* cpEn */
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| 93 | }, /* AUDIO_ATTEN_4DB */
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| 94 | {
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| 95 | 0, /* mute */
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| 96 | XGA_ATTEN, /* xXGA2 */
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| 97 | 6, /* xXG2 */
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| 98 | XGA_GAIN, /* xXGA3 */
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| 99 | 0, /* xXG3 */
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| 100 | 64, /* AxM */
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| 101 | 0 /* cpEn */
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| 102 | }, /* AUDIO_ATTEN_6DB */
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| 103 | {
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| 104 | 0, /* mute */
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| 105 | XGA_ATTEN, /* xXGA2 */
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| 106 | 11, /* xXG2 */
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| 107 | XGA_GAIN, /* xXGA3 */
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| 108 | 0, /* xXG3 */
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| 109 | 64, /* AxM */
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| 110 | 0 /* cpEn */
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| 111 | } /* AUDIO_ATTEN_11DB */
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| 112 | };
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| 113 |
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| 114 | vdaa_Ring_Detect_Cfg Vdaa_Ring_Detect_Presets[] ={
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| 115 | {
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| 116 | RDLY_512MS,
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| 117 | RT__13_5VRMS_16_5VRMS,
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| 118 | 12, /* RMX */
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| 119 | RTO_1408MS,
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| 120 | RCC_640MS,
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| 121 | RNGV_DISABLED,
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| 122 | 17, /* RAS */
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| 123 | RFWE_HALF_WAVE,
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| 124 | RDI_BEG_END_BURST,
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| 125 | RGDT_ACTIVE_LOW
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| 126 | }, /* RING_DET_NOVAL_LOWV */
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| 127 | {
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| 128 | RDLY_512MS,
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| 129 | RT__40_5VRMS_49_5VRMS,
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| 130 | 12, /* RMX */
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| 131 | RTO_1408MS,
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| 132 | RCC_640MS,
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| 133 | RNGV_ENABLED,
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| 134 | 17, /* RAS */
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| 135 | RFWE_RNGV_RING_ENV,
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| 136 | RDI_BEG_END_BURST,
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| 137 | RGDT_ACTIVE_LOW
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| 138 | } /* RING_DET_VAL_HIGHV */
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| 139 | };
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| 140 |
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| 141 | vdaa_PCM_Cfg Vdaa_PCM_Presets[] ={
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| 142 | {
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| 143 | U_LAW,
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| 144 | PCLK_1_PER_BIT,
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| 145 | TRI_POS_EDGE
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| 146 | }, /* DAA_PCM_8ULAW */
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| 147 | {
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| 148 | A_LAW,
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| 149 | PCLK_1_PER_BIT,
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| 150 | TRI_POS_EDGE
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| 151 | }, /* DAA_PCM_8ALAW */
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| 152 | {
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| 153 | LINEAR_16_BIT,
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| 154 | PCLK_1_PER_BIT,
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| 155 | TRI_POS_EDGE
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| 156 | } /* DAA_PCM_16LIN */
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| 157 | };
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| 158 |
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| 159 | vdaa_Hybrid_Cfg Vdaa_Hybrid_Presets[] ={
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| 160 | {
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| 161 | 0, /* HYB1 */
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| 162 | 254, /* HYB2 */
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| 163 | 0, /* HYB3 */
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| 164 | 1, /* HYB4 */
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| 165 | 255, /* HYB5 */
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| 166 | 1, /* HYB6 */
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| 167 | 0, /* HYB7 */
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| 168 | 0 /* HYB8 */
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| 169 | }, /* HYB_600_0_0_500FT_24AWG */
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| 170 | {
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| 171 | 4, /* HYB1 */
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| 172 | 246, /* HYB2 */
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| 173 | 242, /* HYB3 */
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| 174 | 4, /* HYB4 */
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| 175 | 254, /* HYB5 */
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| 176 | 255, /* HYB6 */
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| 177 | 1, /* HYB7 */
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| 178 | 255 /* HYB8 */
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| 179 | }, /* HYB_270_750_150_500FT_24AWG */
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| 180 | {
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| 181 | 4, /* HYB1 */
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| 182 | 245, /* HYB2 */
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| 183 | 243, /* HYB3 */
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| 184 | 7, /* HYB4 */
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| 185 | 253, /* HYB5 */
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| 186 | 0, /* HYB6 */
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| 187 | 1, /* HYB7 */
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| 188 | 255 /* HYB8 */
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| 189 | }, /* HYB_200_680_100_500FT_24AWG */
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| 190 | {
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| 191 | 4, /* HYB1 */
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| 192 | 244, /* HYB2 */
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| 193 | 241, /* HYB3 */
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| 194 | 6, /* HYB4 */
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| 195 | 253, /* HYB5 */
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| 196 | 255, /* HYB6 */
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| 197 | 2, /* HYB7 */
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| 198 | 255 /* HYB8 */
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| 199 | } /* HYB_220_820_120_500FT_24AWG */
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| 200 | };
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| 201 |
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