developer | b11a539 | 2022-03-31 00:34:47 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: ISC */ |
| 2 | /* Copyright (C) 2020 MediaTek Inc. */ |
| 3 | |
| 4 | #ifndef __MT76_CONNAC_H |
| 5 | #define __MT76_CONNAC_H |
| 6 | |
| 7 | #include "mt76.h" |
| 8 | |
| 9 | #define MT76_CONNAC_SCAN_IE_LEN 600 |
| 10 | #define MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL 10 |
| 11 | #define MT76_CONNAC_MAX_TIME_SCHED_SCAN_INTERVAL U16_MAX |
| 12 | #define MT76_CONNAC_MAX_SCHED_SCAN_SSID 10 |
| 13 | #define MT76_CONNAC_MAX_SCAN_MATCH 16 |
| 14 | |
| 15 | #define MT76_CONNAC_COREDUMP_TIMEOUT (HZ / 20) |
| 16 | #define MT76_CONNAC_COREDUMP_SZ (1300 * 1024) |
| 17 | |
| 18 | enum { |
| 19 | CMD_CBW_20MHZ = IEEE80211_STA_RX_BW_20, |
| 20 | CMD_CBW_40MHZ = IEEE80211_STA_RX_BW_40, |
| 21 | CMD_CBW_80MHZ = IEEE80211_STA_RX_BW_80, |
| 22 | CMD_CBW_160MHZ = IEEE80211_STA_RX_BW_160, |
| 23 | CMD_CBW_10MHZ, |
| 24 | CMD_CBW_5MHZ, |
| 25 | CMD_CBW_8080MHZ, |
| 26 | CMD_CBW_320MHZ, |
| 27 | |
| 28 | CMD_HE_MCS_BW80 = 0, |
| 29 | CMD_HE_MCS_BW160, |
| 30 | CMD_HE_MCS_BW8080, |
| 31 | CMD_HE_MCS_BW_NUM |
| 32 | }; |
| 33 | |
| 34 | enum { |
| 35 | HW_BSSID_0 = 0x0, |
| 36 | HW_BSSID_1, |
| 37 | HW_BSSID_2, |
| 38 | HW_BSSID_3, |
| 39 | HW_BSSID_MAX = HW_BSSID_3, |
| 40 | EXT_BSSID_START = 0x10, |
| 41 | EXT_BSSID_1, |
| 42 | EXT_BSSID_15 = 0x1f, |
| 43 | EXT_BSSID_MAX = EXT_BSSID_15, |
| 44 | REPEATER_BSSID_START = 0x20, |
| 45 | REPEATER_BSSID_MAX = 0x3f, |
| 46 | }; |
| 47 | |
| 48 | struct mt76_connac_pm { |
| 49 | bool enable:1; |
| 50 | bool enable_user:1; |
| 51 | bool ds_enable:1; |
| 52 | bool ds_enable_user:1; |
| 53 | bool suspended:1; |
| 54 | |
| 55 | spinlock_t txq_lock; |
| 56 | struct { |
| 57 | struct mt76_wcid *wcid; |
| 58 | struct sk_buff *skb; |
| 59 | } tx_q[IEEE80211_NUM_ACS]; |
| 60 | |
| 61 | struct work_struct wake_work; |
| 62 | wait_queue_head_t wait; |
| 63 | |
| 64 | struct { |
| 65 | spinlock_t lock; |
| 66 | u32 count; |
| 67 | } wake; |
| 68 | struct mutex mutex; |
| 69 | |
| 70 | struct delayed_work ps_work; |
| 71 | unsigned long last_activity; |
| 72 | unsigned long idle_timeout; |
| 73 | |
| 74 | struct { |
| 75 | unsigned long last_wake_event; |
| 76 | unsigned long awake_time; |
| 77 | unsigned long last_doze_event; |
| 78 | unsigned long doze_time; |
| 79 | unsigned int lp_wake; |
| 80 | } stats; |
| 81 | }; |
| 82 | |
| 83 | struct mt76_connac_coredump { |
| 84 | struct sk_buff_head msg_list; |
| 85 | struct delayed_work work; |
| 86 | unsigned long last_activity; |
| 87 | }; |
| 88 | |
| 89 | struct mt76_connac_sta_key_conf { |
| 90 | s8 keyidx; |
| 91 | u8 key[16]; |
| 92 | }; |
| 93 | |
| 94 | extern const struct wiphy_wowlan_support mt76_connac_wowlan_support; |
| 95 | |
| 96 | static inline bool is_mt7922(struct mt76_dev *dev) |
| 97 | { |
| 98 | return mt76_chip(dev) == 0x7922; |
| 99 | } |
| 100 | |
| 101 | static inline bool is_mt7921(struct mt76_dev *dev) |
| 102 | { |
| 103 | return mt76_chip(dev) == 0x7961 || is_mt7922(dev); |
| 104 | } |
| 105 | |
| 106 | static inline bool is_mt7663(struct mt76_dev *dev) |
| 107 | { |
| 108 | return mt76_chip(dev) == 0x7663; |
| 109 | } |
| 110 | |
| 111 | static inline bool is_mt7915(struct mt76_dev *dev) |
| 112 | { |
| 113 | return mt76_chip(dev) == 0x7915; |
| 114 | } |
| 115 | |
| 116 | static inline bool is_mt7916(struct mt76_dev *dev) |
| 117 | { |
| 118 | return mt76_chip(dev) == 0x7906; |
| 119 | } |
| 120 | |
| 121 | static inline bool is_mt7902(struct mt76_dev *dev) |
| 122 | { |
| 123 | return mt76_chip(dev) == 0x7902; |
| 124 | } |
| 125 | |
| 126 | static inline bool is_mt7986(struct mt76_dev *dev) |
| 127 | { |
| 128 | return mt76_chip(dev) == 0x7986; |
| 129 | } |
| 130 | |
| 131 | static inline bool is_mt7622(struct mt76_dev *dev) |
| 132 | { |
| 133 | if (!IS_ENABLED(CONFIG_MT7622_WMAC)) |
| 134 | return false; |
| 135 | |
| 136 | return mt76_chip(dev) == 0x7622; |
| 137 | } |
| 138 | |
| 139 | static inline bool is_mt7615(struct mt76_dev *dev) |
| 140 | { |
| 141 | return mt76_chip(dev) == 0x7615 || mt76_chip(dev) == 0x7611; |
| 142 | } |
| 143 | |
| 144 | static inline bool is_mt7611(struct mt76_dev *dev) |
| 145 | { |
| 146 | return mt76_chip(dev) == 0x7611; |
| 147 | } |
| 148 | |
| 149 | static inline bool is_connac_v1(struct mt76_dev *dev) |
| 150 | { |
| 151 | return is_mt7615(dev) || is_mt7663(dev) || is_mt7622(dev); |
| 152 | } |
| 153 | |
| 154 | static inline u8 mt76_connac_chan_bw(struct cfg80211_chan_def *chandef) |
| 155 | { |
| 156 | static const u8 width_to_bw[] = { |
| 157 | [NL80211_CHAN_WIDTH_40] = CMD_CBW_40MHZ, |
| 158 | [NL80211_CHAN_WIDTH_80] = CMD_CBW_80MHZ, |
| 159 | [NL80211_CHAN_WIDTH_80P80] = CMD_CBW_8080MHZ, |
| 160 | [NL80211_CHAN_WIDTH_160] = CMD_CBW_160MHZ, |
| 161 | [NL80211_CHAN_WIDTH_5] = CMD_CBW_5MHZ, |
| 162 | [NL80211_CHAN_WIDTH_10] = CMD_CBW_10MHZ, |
| 163 | [NL80211_CHAN_WIDTH_20] = CMD_CBW_20MHZ, |
| 164 | [NL80211_CHAN_WIDTH_20_NOHT] = CMD_CBW_20MHZ, |
| 165 | }; |
| 166 | |
| 167 | if (chandef->width >= ARRAY_SIZE(width_to_bw)) |
| 168 | return 0; |
| 169 | |
| 170 | return width_to_bw[chandef->width]; |
| 171 | } |
| 172 | |
| 173 | static inline u8 mt76_connac_lmac_mapping(u8 ac) |
| 174 | { |
| 175 | /* LMAC uses the reverse order of mac80211 AC indexes */ |
| 176 | return 3 - ac; |
| 177 | } |
| 178 | |
| 179 | int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm); |
| 180 | void mt76_connac_power_save_sched(struct mt76_phy *phy, |
| 181 | struct mt76_connac_pm *pm); |
| 182 | void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm, |
| 183 | struct mt76_wcid *wcid); |
| 184 | |
| 185 | static inline bool |
| 186 | mt76_connac_pm_ref(struct mt76_phy *phy, struct mt76_connac_pm *pm) |
| 187 | { |
| 188 | bool ret = false; |
| 189 | |
| 190 | spin_lock_bh(&pm->wake.lock); |
| 191 | if (test_bit(MT76_STATE_PM, &phy->state)) |
| 192 | goto out; |
| 193 | |
| 194 | pm->wake.count++; |
| 195 | ret = true; |
| 196 | out: |
| 197 | spin_unlock_bh(&pm->wake.lock); |
| 198 | |
| 199 | return ret; |
| 200 | } |
| 201 | |
| 202 | static inline void |
| 203 | mt76_connac_pm_unref(struct mt76_phy *phy, struct mt76_connac_pm *pm) |
| 204 | { |
| 205 | spin_lock_bh(&pm->wake.lock); |
| 206 | |
| 207 | pm->last_activity = jiffies; |
| 208 | if (--pm->wake.count == 0 && |
| 209 | test_bit(MT76_STATE_MCU_RUNNING, &phy->state)) |
| 210 | mt76_connac_power_save_sched(phy, pm); |
| 211 | |
| 212 | spin_unlock_bh(&pm->wake.lock); |
| 213 | } |
| 214 | |
| 215 | static inline bool |
| 216 | mt76_connac_skip_fw_pmctrl(struct mt76_phy *phy, struct mt76_connac_pm *pm) |
| 217 | { |
| 218 | struct mt76_dev *dev = phy->dev; |
| 219 | bool ret; |
| 220 | |
| 221 | if (dev->token_count) |
| 222 | return true; |
| 223 | |
| 224 | spin_lock_bh(&pm->wake.lock); |
| 225 | ret = pm->wake.count || test_and_set_bit(MT76_STATE_PM, &phy->state); |
| 226 | spin_unlock_bh(&pm->wake.lock); |
| 227 | |
| 228 | return ret; |
| 229 | } |
| 230 | |
| 231 | static inline void |
| 232 | mt76_connac_mutex_acquire(struct mt76_dev *dev, struct mt76_connac_pm *pm) |
| 233 | __acquires(&dev->mutex) |
| 234 | { |
| 235 | mutex_lock(&dev->mutex); |
| 236 | mt76_connac_pm_wake(&dev->phy, pm); |
| 237 | } |
| 238 | |
| 239 | static inline void |
| 240 | mt76_connac_mutex_release(struct mt76_dev *dev, struct mt76_connac_pm *pm) |
| 241 | __releases(&dev->mutex) |
| 242 | { |
| 243 | mt76_connac_power_save_sched(&dev->phy, pm); |
| 244 | mutex_unlock(&dev->mutex); |
| 245 | } |
| 246 | |
| 247 | void mt76_connac_pm_queue_skb(struct ieee80211_hw *hw, |
| 248 | struct mt76_connac_pm *pm, |
| 249 | struct mt76_wcid *wcid, |
| 250 | struct sk_buff *skb); |
| 251 | void mt76_connac_pm_dequeue_skbs(struct mt76_phy *phy, |
| 252 | struct mt76_connac_pm *pm); |
| 253 | |
| 254 | #endif /* __MT76_CONNAC_H */ |