developer | a72bbd8 | 2024-02-04 18:27:28 +0800 | [diff] [blame^] | 1 | From 70f2286427614e2da9e0caf6b90813d38bfadc63 Mon Sep 17 00:00:00 2001 |
developer | 5875ff1 | 2024-01-30 17:29:50 +0800 | [diff] [blame] | 2 | From: Benjamin Lin <benjamin-jw.lin@mediatek.com> |
| 3 | Date: Mon, 29 Jan 2024 11:28:41 +0800 |
developer | a72bbd8 | 2024-02-04 18:27:28 +0800 | [diff] [blame^] | 4 | Subject: [PATCH 10/13] wifi: mt76: mt7915: add support for WMM PBC |
| 5 | configuration |
developer | 5875ff1 | 2024-01-30 17:29:50 +0800 | [diff] [blame] | 6 | |
| 7 | --- |
| 8 | mt76_connac_mcu.h | 2 ++ |
| 9 | mt7915/init.c | 2 ++ |
| 10 | mt7915/mac.c | 14 ++++++++ |
| 11 | mt7915/mcu.c | 90 +++++++++++++++++++++++++++++++++++++++++++++++ |
| 12 | mt7915/mcu.h | 15 ++++++++ |
| 13 | mt7915/mt7915.h | 4 +++ |
| 14 | 6 files changed, 127 insertions(+) |
| 15 | |
| 16 | diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h |
developer | a72bbd8 | 2024-02-04 18:27:28 +0800 | [diff] [blame^] | 17 | index 2a4aa79..8d516e4 100644 |
developer | 5875ff1 | 2024-01-30 17:29:50 +0800 | [diff] [blame] | 18 | --- a/mt76_connac_mcu.h |
| 19 | +++ b/mt76_connac_mcu.h |
developer | a72bbd8 | 2024-02-04 18:27:28 +0800 | [diff] [blame^] | 20 | @@ -1018,6 +1018,7 @@ enum { |
developer | 5875ff1 | 2024-01-30 17:29:50 +0800 | [diff] [blame] | 21 | MCU_EXT_EVENT_ASSERT_DUMP = 0x23, |
| 22 | MCU_EXT_EVENT_RDD_REPORT = 0x3a, |
| 23 | MCU_EXT_EVENT_CSA_NOTIFY = 0x4f, |
| 24 | + MCU_EXT_EVENT_BSS_ACQ_PKT_CNT = 0x52, |
| 25 | MCU_EXT_EVENT_WA_TX_STAT = 0x74, |
| 26 | MCU_EXT_EVENT_BCC_NOTIFY = 0x75, |
| 27 | MCU_EXT_EVENT_MURU_CTRL = 0x9f, |
developer | a72bbd8 | 2024-02-04 18:27:28 +0800 | [diff] [blame^] | 28 | @@ -1213,6 +1214,7 @@ enum { |
developer | 5875ff1 | 2024-01-30 17:29:50 +0800 | [diff] [blame] | 29 | MCU_EXT_CMD_TXDPD_CAL = 0x60, |
| 30 | MCU_EXT_CMD_CAL_CACHE = 0x67, |
| 31 | MCU_EXT_CMD_RED_ENABLE = 0x68, |
| 32 | + MCU_EXT_CMD_PKT_BUDGET_CTRL = 0x6c, |
| 33 | MCU_EXT_CMD_SET_RADAR_TH = 0x7c, |
| 34 | MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, |
| 35 | MCU_EXT_CMD_MWDS_SUPPORT = 0x80, |
| 36 | diff --git a/mt7915/init.c b/mt7915/init.c |
| 37 | index d5d9cbf..2fc1f3c 100644 |
| 38 | --- a/mt7915/init.c |
| 39 | +++ b/mt7915/init.c |
| 40 | @@ -1217,6 +1217,8 @@ int mt7915_register_device(struct mt7915_dev *dev) |
| 41 | INIT_WORK(&dev->dump_work, mt7915_mac_dump_work); |
| 42 | mutex_init(&dev->dump_mutex); |
| 43 | |
| 44 | + INIT_WORK(&dev->wmm_pbc_work, mt7915_mcu_wmm_pbc_work); |
| 45 | + |
| 46 | dev->dbdc_support = mt7915_band_config(dev); |
| 47 | |
| 48 | phy2 = mt7915_alloc_ext_phy(dev); |
| 49 | diff --git a/mt7915/mac.c b/mt7915/mac.c |
| 50 | index 3736853..762159b 100644 |
| 51 | --- a/mt7915/mac.c |
| 52 | +++ b/mt7915/mac.c |
| 53 | @@ -2027,6 +2027,8 @@ void mt7915_mac_work(struct work_struct *work) |
| 54 | |
| 55 | mt76_update_survey(mphy); |
| 56 | if (++mphy->mac_work_count == 5) { |
| 57 | + int i; |
| 58 | + |
| 59 | mphy->mac_work_count = 0; |
| 60 | |
| 61 | mt7915_mac_update_stats(phy); |
| 62 | @@ -2034,6 +2036,18 @@ void mt7915_mac_work(struct work_struct *work) |
| 63 | |
| 64 | if (phy->dev->muru_debug) |
| 65 | mt7915_mcu_muru_debug_get(phy); |
| 66 | + |
| 67 | + /* Update DEV-wise information only in |
| 68 | + * the MAC work of the first band running. |
| 69 | + */ |
| 70 | + for (i = MT_BAND0; i <= mphy->band_idx; ++i) { |
| 71 | + if (i == mphy->band_idx) { |
| 72 | + if (mt7915_mcu_wa_cmd(phy->dev, MCU_WA_PARAM_CMD(QUERY), MCU_WA_PARAM_BSS_ACQ_PKT_CNT, |
| 73 | + BSS_ACQ_PKT_CNT_BSS_BITMAP_ALL | BSS_ACQ_PKT_CNT_READ_CLR, 0)) |
| 74 | + dev_err(mphy->dev->dev, "Failed to query per-AC-queue packet counts.\n"); |
| 75 | + } else if (test_bit(MT76_STATE_RUNNING, &mphy->dev->phys[i]->state)) |
| 76 | + break; |
| 77 | + } |
| 78 | } |
| 79 | |
| 80 | if (++phy->stats_work_count == 10) { |
| 81 | diff --git a/mt7915/mcu.c b/mt7915/mcu.c |
| 82 | index 7a2a537..d101cbf 100644 |
| 83 | --- a/mt7915/mcu.c |
| 84 | +++ b/mt7915/mcu.c |
| 85 | @@ -354,6 +354,93 @@ mt7915_mcu_rx_bcc_notify(struct mt7915_dev *dev, struct sk_buff *skb) |
| 86 | mt7915_mcu_cca_finish, mphy->hw); |
| 87 | } |
| 88 | |
| 89 | +void mt7915_mcu_wmm_pbc_work(struct work_struct *work) |
| 90 | +{ |
| 91 | +#define WMM_PBC_QUEUE_NUM 5 |
| 92 | +#define WMM_PBC_BSS_ALL 0xff |
| 93 | +#define WMM_PBC_WLAN_IDX_ALL 0xffff |
| 94 | +#define WMM_PBC_BOUND_DEFAULT 0xffff |
| 95 | +#define WMM_PBC_UP_BOUND_BAND0_VO 950 |
| 96 | +#define WMM_PBC_UP_BOUND_BAND0_VI 950 |
| 97 | +#define WMM_PBC_UP_BOUND_BAND0_BE 750 |
| 98 | +#define WMM_PBC_UP_BOUND_BAND0_BK 450 |
| 99 | +#define WMM_PBC_UP_BOUND_BAND1_VO 1900 |
| 100 | +#define WMM_PBC_UP_BOUND_BAND1_VI 1900 |
| 101 | +#define WMM_PBC_UP_BOUND_BAND1_BE 1500 |
| 102 | +#define WMM_PBC_UP_BOUND_BAND1_BK 900 |
| 103 | +#define WMM_PBC_UP_BOUND_MGMT 32 |
| 104 | + struct mt7915_dev *dev = container_of(work, struct mt7915_dev, wmm_pbc_work); |
| 105 | + struct { |
| 106 | + u8 bss_idx; |
| 107 | + u8 queue_num; |
| 108 | + __le16 wlan_idx; |
| 109 | + u8 __rsv[4]; |
| 110 | + struct { |
| 111 | + __le16 low; |
| 112 | + __le16 up; |
| 113 | + } __packed bound[WMM_PBC_QUEUE_NUM * 2]; |
| 114 | + } __packed req = { |
| 115 | + .bss_idx = WMM_PBC_BSS_ALL, |
| 116 | + .queue_num = WMM_PBC_QUEUE_NUM * 2, |
| 117 | + .wlan_idx = cpu_to_le16(WMM_PBC_WLAN_IDX_ALL), |
| 118 | + }; |
| 119 | + int i; |
| 120 | + |
| 121 | +#define pbc_acq_up_bound_config(_band, _ac, _bound) \ |
| 122 | + req.bound[_band * WMM_PBC_QUEUE_NUM + mt76_connac_lmac_mapping(_ac)].up = dev->wmm_pbc_enable \ |
| 123 | + ? cpu_to_le16(_bound) \ |
| 124 | + : cpu_to_le16(WMM_PBC_BOUND_DEFAULT) |
| 125 | + pbc_acq_up_bound_config(MT_BAND0, IEEE80211_AC_VO, WMM_PBC_UP_BOUND_BAND0_VO); |
| 126 | + pbc_acq_up_bound_config(MT_BAND0, IEEE80211_AC_VI, WMM_PBC_UP_BOUND_BAND0_VI); |
| 127 | + pbc_acq_up_bound_config(MT_BAND0, IEEE80211_AC_BE, WMM_PBC_UP_BOUND_BAND0_BE); |
| 128 | + pbc_acq_up_bound_config(MT_BAND0, IEEE80211_AC_BK, WMM_PBC_UP_BOUND_BAND0_BK); |
| 129 | + req.bound[MT_BAND0 * WMM_PBC_QUEUE_NUM + 4].up = dev->wmm_pbc_enable |
| 130 | + ? cpu_to_le16(WMM_PBC_UP_BOUND_MGMT) |
| 131 | + : cpu_to_le16(WMM_PBC_BOUND_DEFAULT); |
| 132 | + pbc_acq_up_bound_config(MT_BAND1, IEEE80211_AC_VO, WMM_PBC_UP_BOUND_BAND1_VO); |
| 133 | + pbc_acq_up_bound_config(MT_BAND1, IEEE80211_AC_VI, WMM_PBC_UP_BOUND_BAND1_VI); |
| 134 | + pbc_acq_up_bound_config(MT_BAND1, IEEE80211_AC_BE, WMM_PBC_UP_BOUND_BAND1_BE); |
| 135 | + pbc_acq_up_bound_config(MT_BAND1, IEEE80211_AC_BK, WMM_PBC_UP_BOUND_BAND1_BK); |
| 136 | + req.bound[MT_BAND1 * WMM_PBC_QUEUE_NUM + 4].up = dev->wmm_pbc_enable |
| 137 | + ? cpu_to_le16(WMM_PBC_UP_BOUND_MGMT) |
| 138 | + : cpu_to_le16(WMM_PBC_BOUND_DEFAULT); |
| 139 | + |
| 140 | + for (i = 0; i < WMM_PBC_QUEUE_NUM * 2; ++i) |
| 141 | + req.bound[i].low = cpu_to_le16(WMM_PBC_BOUND_DEFAULT); |
| 142 | + |
| 143 | + if (mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(PKT_BUDGET_CTRL), |
| 144 | + &req, sizeof(req), true)) |
| 145 | + dev_err(dev->mt76.dev, "Failed to configure WMM PBC.\n"); |
| 146 | +} |
| 147 | + |
| 148 | +static void |
| 149 | +mt7915_mcu_rx_bss_acq_pkt_cnt(struct mt7915_dev *dev, struct sk_buff * skb) |
| 150 | +{ |
| 151 | + struct mt7915_mcu_bss_acq_pkt_cnt_event *event = (struct mt7915_mcu_bss_acq_pkt_cnt_event *)skb->data; |
| 152 | + u32 bitmap = le32_to_cpu(event->bss_bitmap); |
| 153 | + u64 sum[IEEE80211_NUM_ACS] = {0}; |
| 154 | + u8 ac_cnt = 0; |
| 155 | + int i, j; |
| 156 | + |
| 157 | + for (i = 0; (i < BSS_ACQ_PKT_CNT_BSS_NUM) && (bitmap & (1 << i)); ++i) { |
| 158 | + for (j = IEEE80211_AC_VO; j < IEEE80211_NUM_ACS; ++j) |
| 159 | + sum[j] += le32_to_cpu(event->bss[i].cnt[mt76_connac_lmac_mapping(j)]); |
| 160 | + } |
| 161 | + |
| 162 | + for (i = IEEE80211_AC_VO; i < IEEE80211_NUM_ACS; ++i) { |
| 163 | + if (sum[i] > WMM_PKT_THRESHOLD) |
| 164 | + ++ac_cnt; |
| 165 | + } |
| 166 | + |
| 167 | + if (ac_cnt > 1 && !dev->wmm_pbc_enable) { |
| 168 | + dev->wmm_pbc_enable = true; |
| 169 | + queue_work(dev->mt76.wq, &dev->wmm_pbc_work); |
| 170 | + } else if (ac_cnt <= 1 && dev->wmm_pbc_enable) { |
| 171 | + dev->wmm_pbc_enable = false; |
| 172 | + queue_work(dev->mt76.wq, &dev->wmm_pbc_work); |
| 173 | + } |
| 174 | +} |
| 175 | + |
| 176 | static void |
| 177 | mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) |
| 178 | { |
| 179 | @@ -376,6 +463,9 @@ mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) |
| 180 | case MCU_EXT_EVENT_BCC_NOTIFY: |
| 181 | mt7915_mcu_rx_bcc_notify(dev, skb); |
| 182 | break; |
| 183 | + case MCU_EXT_EVENT_BSS_ACQ_PKT_CNT: |
| 184 | + mt7915_mcu_rx_bss_acq_pkt_cnt(dev, skb); |
| 185 | + break; |
| 186 | default: |
| 187 | break; |
| 188 | } |
| 189 | diff --git a/mt7915/mcu.h b/mt7915/mcu.h |
| 190 | index 8f36546..fa0847d 100644 |
| 191 | --- a/mt7915/mcu.h |
| 192 | +++ b/mt7915/mcu.h |
| 193 | @@ -329,10 +329,25 @@ enum { |
| 194 | MCU_WA_PARAM_CMD_DEBUG, |
| 195 | }; |
| 196 | |
| 197 | +#define BSS_ACQ_PKT_CNT_BSS_NUM 24 |
| 198 | +#define BSS_ACQ_PKT_CNT_BSS_BITMAP_ALL 0x00ffffff |
| 199 | +#define BSS_ACQ_PKT_CNT_READ_CLR BIT(31) |
| 200 | +#define WMM_PKT_THRESHOLD 50 |
| 201 | + |
| 202 | +struct mt7915_mcu_bss_acq_pkt_cnt_event { |
| 203 | + struct mt76_connac2_mcu_rxd rxd; |
| 204 | + |
| 205 | + __le32 bss_bitmap; |
| 206 | + struct { |
| 207 | + __le32 cnt[IEEE80211_NUM_ACS]; |
| 208 | + } __packed bss[BSS_ACQ_PKT_CNT_BSS_NUM]; |
| 209 | +} __packed; |
| 210 | + |
| 211 | enum { |
| 212 | MCU_WA_PARAM_PDMA_RX = 0x04, |
| 213 | MCU_WA_PARAM_CPU_UTIL = 0x0b, |
| 214 | MCU_WA_PARAM_RED = 0x0e, |
| 215 | + MCU_WA_PARAM_BSS_ACQ_PKT_CNT = 0x12, |
| 216 | MCU_WA_PARAM_RED_SETTING = 0x40, |
| 217 | }; |
| 218 | |
| 219 | diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h |
| 220 | index 1b79733..874d531 100644 |
| 221 | --- a/mt7915/mt7915.h |
| 222 | +++ b/mt7915/mt7915.h |
| 223 | @@ -322,6 +322,9 @@ struct mt7915_dev { |
| 224 | struct reset_control *rstc; |
| 225 | void __iomem *dcm; |
| 226 | void __iomem *sku; |
| 227 | + |
| 228 | + bool wmm_pbc_enable; |
| 229 | + struct work_struct wmm_pbc_work; |
| 230 | }; |
| 231 | |
| 232 | enum { |
| 233 | @@ -512,6 +515,7 @@ int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl); |
| 234 | int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level); |
| 235 | void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb); |
| 236 | void mt7915_mcu_exit(struct mt7915_dev *dev); |
| 237 | +void mt7915_mcu_wmm_pbc_work(struct work_struct *work); |
| 238 | |
| 239 | static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev) |
| 240 | { |
| 241 | -- |
| 242 | 2.18.0 |
| 243 | |