blob: bce76417f95db5d1b7cc547033a3913d23132abd [file] [log] [blame]
developerb11a5392022-03-31 00:34:47 +08001// SPDX-License-Identifier: ISC
2/* Copyright (C) 2020 MediaTek Inc. */
3
4#include "mt7921.h"
5#include "eeprom.h"
6
7static int
8mt7921_reg_set(void *data, u64 val)
9{
10 struct mt7921_dev *dev = data;
11
12 mt7921_mutex_acquire(dev);
13 mt76_wr(dev, dev->mt76.debugfs_reg, val);
14 mt7921_mutex_release(dev);
15
16 return 0;
17}
18
19static int
20mt7921_reg_get(void *data, u64 *val)
21{
22 struct mt7921_dev *dev = data;
23
24 mt7921_mutex_acquire(dev);
25 *val = mt76_rr(dev, dev->mt76.debugfs_reg);
26 mt7921_mutex_release(dev);
27
28 return 0;
29}
30
31DEFINE_DEBUGFS_ATTRIBUTE(fops_regval, mt7921_reg_get, mt7921_reg_set,
32 "0x%08llx\n");
33static int
34mt7921_fw_debug_set(void *data, u64 val)
35{
36 struct mt7921_dev *dev = data;
37
38 mt7921_mutex_acquire(dev);
39
40 dev->fw_debug = (u8)val;
41 mt7921_mcu_fw_log_2_host(dev, dev->fw_debug);
42
43 mt7921_mutex_release(dev);
44
45 return 0;
46}
47
48static int
49mt7921_fw_debug_get(void *data, u64 *val)
50{
51 struct mt7921_dev *dev = data;
52
53 *val = dev->fw_debug;
54
55 return 0;
56}
57
58DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug, mt7921_fw_debug_get,
59 mt7921_fw_debug_set, "%lld\n");
60
61static void
62mt7921_ampdu_stat_read_phy(struct mt7921_phy *phy,
63 struct seq_file *file)
64{
65 struct mt7921_dev *dev = file->private;
66 int bound[15], range[4], i;
67
68 if (!phy)
69 return;
70
71 mt7921_mac_update_mib_stats(phy);
72
73 /* Tx ampdu stat */
74 for (i = 0; i < ARRAY_SIZE(range); i++)
75 range[i] = mt76_rr(dev, MT_MIB_ARNG(0, i));
76
77 for (i = 0; i < ARRAY_SIZE(bound); i++)
78 bound[i] = MT_MIB_ARNCR_RANGE(range[i / 4], i % 4) + 1;
79
80 seq_printf(file, "\nPhy0\n");
81
82 seq_printf(file, "Length: %8d | ", bound[0]);
83 for (i = 0; i < ARRAY_SIZE(bound) - 1; i++)
84 seq_printf(file, "%3d %3d | ", bound[i] + 1, bound[i + 1]);
85
86 seq_puts(file, "\nCount: ");
87 for (i = 0; i < ARRAY_SIZE(bound); i++)
88 seq_printf(file, "%8d | ", dev->mt76.aggr_stats[i]);
89 seq_puts(file, "\n");
90
91 seq_printf(file, "BA miss count: %d\n", phy->mib.ba_miss_cnt);
92}
93
94static int
95mt7921_tx_stats_show(struct seq_file *file, void *data)
96{
97 struct mt7921_dev *dev = file->private;
98 struct mt7921_phy *phy = &dev->phy;
99 struct mib_stats *mib = &phy->mib;
100 int i;
101
102 mt7921_mutex_acquire(dev);
103
104 mt7921_ampdu_stat_read_phy(phy, file);
105
106 seq_puts(file, "Tx MSDU stat:\n");
107 for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) {
108 seq_printf(file, "AMSDU pack count of %d MSDU in TXD: %8d ",
109 i + 1, mib->tx_amsdu[i]);
110 if (mib->tx_amsdu_cnt)
111 seq_printf(file, "(%3d%%)\n",
112 mib->tx_amsdu[i] * 100 / mib->tx_amsdu_cnt);
113 else
114 seq_puts(file, "\n");
115 }
116
117 mt7921_mutex_release(dev);
118
119 return 0;
120}
121
122DEFINE_SHOW_ATTRIBUTE(mt7921_tx_stats);
123
124static int
125mt7921_queues_acq(struct seq_file *s, void *data)
126{
127 struct mt7921_dev *dev = dev_get_drvdata(s->private);
128 int i;
129
130 mt7921_mutex_acquire(dev);
131
132 for (i = 0; i < 4; i++) {
133 u32 ctrl, val, qlen = 0;
134 int j;
135
136 val = mt76_rr(dev, MT_PLE_AC_QEMPTY(i));
137 ctrl = BIT(31) | BIT(11) | (i << 24);
138
139 for (j = 0; j < 32; j++) {
140 if (val & BIT(j))
141 continue;
142
143 mt76_wr(dev, MT_PLE_FL_Q0_CTRL, ctrl | j);
144 qlen += mt76_get_field(dev, MT_PLE_FL_Q3_CTRL,
145 GENMASK(11, 0));
146 }
147 seq_printf(s, "AC%d: queued=%d\n", i, qlen);
148 }
149
150 mt7921_mutex_release(dev);
151
152 return 0;
153}
154
155static int
156mt7921_queues_read(struct seq_file *s, void *data)
157{
158 struct mt7921_dev *dev = dev_get_drvdata(s->private);
159 struct {
160 struct mt76_queue *q;
161 char *queue;
162 } queue_map[] = {
163 { dev->mphy.q_tx[MT_TXQ_BE], "WFDMA0" },
164 { dev->mt76.q_mcu[MT_MCUQ_WM], "MCUWM" },
165 { dev->mt76.q_mcu[MT_MCUQ_FWDL], "MCUFWQ" },
166 };
167 int i;
168
169 for (i = 0; i < ARRAY_SIZE(queue_map); i++) {
170 struct mt76_queue *q = queue_map[i].q;
171
172 if (!q)
173 continue;
174
175 seq_printf(s,
176 "%s: queued=%d head=%d tail=%d\n",
177 queue_map[i].queue, q->queued, q->head,
178 q->tail);
179 }
180
181 return 0;
182}
183
184static void
185mt7921_seq_puts_array(struct seq_file *file, const char *str,
186 s8 *val, int len)
187{
188 int i;
189
190 seq_printf(file, "%-16s:", str);
191 for (i = 0; i < len; i++)
192 if (val[i] == 127)
193 seq_printf(file, " %6s", "N.A");
194 else
195 seq_printf(file, " %6d", val[i]);
196 seq_puts(file, "\n");
197}
198
199#define mt7921_print_txpwr_entry(prefix, rate) \
200({ \
201 mt7921_seq_puts_array(s, #prefix " (user)", \
202 txpwr.data[TXPWR_USER].rate, \
203 ARRAY_SIZE(txpwr.data[TXPWR_USER].rate)); \
204 mt7921_seq_puts_array(s, #prefix " (eeprom)", \
205 txpwr.data[TXPWR_EEPROM].rate, \
206 ARRAY_SIZE(txpwr.data[TXPWR_EEPROM].rate)); \
207 mt7921_seq_puts_array(s, #prefix " (tmac)", \
208 txpwr.data[TXPWR_MAC].rate, \
209 ARRAY_SIZE(txpwr.data[TXPWR_MAC].rate)); \
210})
211
212static int
213mt7921_txpwr(struct seq_file *s, void *data)
214{
215 struct mt7921_dev *dev = dev_get_drvdata(s->private);
216 struct mt7921_txpwr txpwr;
217 int ret;
218
219 mt7921_mutex_acquire(dev);
220 ret = mt7921_get_txpwr_info(dev, &txpwr);
221 mt7921_mutex_release(dev);
222
223 if (ret)
224 return ret;
225
226 seq_printf(s, "Tx power table (channel %d)\n", txpwr.ch);
227 seq_printf(s, "%-16s %6s %6s %6s %6s\n",
228 " ", "1m", "2m", "5m", "11m");
229 mt7921_print_txpwr_entry(CCK, cck);
230
231 seq_printf(s, "%-16s %6s %6s %6s %6s %6s %6s %6s %6s\n",
232 " ", "6m", "9m", "12m", "18m", "24m", "36m",
233 "48m", "54m");
234 mt7921_print_txpwr_entry(OFDM, ofdm);
235
236 seq_printf(s, "%-16s %6s %6s %6s %6s %6s %6s %6s %6s\n",
237 " ", "mcs0", "mcs1", "mcs2", "mcs3", "mcs4", "mcs5",
238 "mcs6", "mcs7");
239 mt7921_print_txpwr_entry(HT20, ht20);
240
241 seq_printf(s, "%-16s %6s %6s %6s %6s %6s %6s %6s %6s %6s\n",
242 " ", "mcs0", "mcs1", "mcs2", "mcs3", "mcs4", "mcs5",
243 "mcs6", "mcs7", "mcs32");
244 mt7921_print_txpwr_entry(HT40, ht40);
245
246 seq_printf(s, "%-16s %6s %6s %6s %6s %6s %6s %6s %6s %6s %6s %6s %6s\n",
247 " ", "mcs0", "mcs1", "mcs2", "mcs3", "mcs4", "mcs5",
248 "mcs6", "mcs7", "mcs8", "mcs9", "mcs10", "mcs11");
249 mt7921_print_txpwr_entry(VHT20, vht20);
250 mt7921_print_txpwr_entry(VHT40, vht40);
251 mt7921_print_txpwr_entry(VHT80, vht80);
252 mt7921_print_txpwr_entry(VHT160, vht160);
253 mt7921_print_txpwr_entry(HE26, he26);
254 mt7921_print_txpwr_entry(HE52, he52);
255 mt7921_print_txpwr_entry(HE106, he106);
256 mt7921_print_txpwr_entry(HE242, he242);
257 mt7921_print_txpwr_entry(HE484, he484);
258 mt7921_print_txpwr_entry(HE996, he996);
259 mt7921_print_txpwr_entry(HE996x2, he996x2);
260
261 return 0;
262}
263
264static int
265mt7921_pm_set(void *data, u64 val)
266{
267 struct mt7921_dev *dev = data;
268 struct mt76_connac_pm *pm = &dev->pm;
269
270 if (mt76_is_usb(&dev->mt76))
271 return -EOPNOTSUPP;
272
273 mutex_lock(&dev->mt76.mutex);
274
275 if (val == pm->enable_user)
276 goto out;
277
278 if (!pm->enable_user) {
279 pm->stats.last_wake_event = jiffies;
280 pm->stats.last_doze_event = jiffies;
281 }
282 /* make sure the chip is awake here and ps_work is scheduled
283 * just at end of the this routine.
284 */
285 pm->enable = false;
286 mt76_connac_pm_wake(&dev->mphy, pm);
287
288 pm->enable_user = val;
289 mt7921_set_runtime_pm(dev);
290 mt76_connac_power_save_sched(&dev->mphy, pm);
291out:
292 mutex_unlock(&dev->mt76.mutex);
293
294 return 0;
295}
296
297static int
298mt7921_pm_get(void *data, u64 *val)
299{
300 struct mt7921_dev *dev = data;
301
302 *val = dev->pm.enable_user;
303
304 return 0;
305}
306
307DEFINE_DEBUGFS_ATTRIBUTE(fops_pm, mt7921_pm_get, mt7921_pm_set, "%lld\n");
308
309static int
310mt7921_deep_sleep_set(void *data, u64 val)
311{
312 struct mt7921_dev *dev = data;
313 struct mt76_connac_pm *pm = &dev->pm;
314 bool monitor = !!(dev->mphy.hw->conf.flags & IEEE80211_CONF_MONITOR);
315 bool enable = !!val;
316
317 if (mt76_is_usb(&dev->mt76))
318 return -EOPNOTSUPP;
319
320 mt7921_mutex_acquire(dev);
321 if (pm->ds_enable_user == enable)
322 goto out;
323
324 pm->ds_enable_user = enable;
325 pm->ds_enable = enable && !monitor;
326 mt76_connac_mcu_set_deep_sleep(&dev->mt76, pm->ds_enable);
327out:
328 mt7921_mutex_release(dev);
329
330 return 0;
331}
332
333static int
334mt7921_deep_sleep_get(void *data, u64 *val)
335{
336 struct mt7921_dev *dev = data;
337
338 *val = dev->pm.ds_enable_user;
339
340 return 0;
341}
342
343DEFINE_DEBUGFS_ATTRIBUTE(fops_ds, mt7921_deep_sleep_get,
344 mt7921_deep_sleep_set, "%lld\n");
345
346static int
347mt7921_pm_stats(struct seq_file *s, void *data)
348{
349 struct mt7921_dev *dev = dev_get_drvdata(s->private);
350 struct mt76_connac_pm *pm = &dev->pm;
351
352 unsigned long awake_time = pm->stats.awake_time;
353 unsigned long doze_time = pm->stats.doze_time;
354
355 if (!test_bit(MT76_STATE_PM, &dev->mphy.state))
356 awake_time += jiffies - pm->stats.last_wake_event;
357 else
358 doze_time += jiffies - pm->stats.last_doze_event;
359
360 seq_printf(s, "awake time: %14u\ndoze time: %15u\n",
361 jiffies_to_msecs(awake_time),
362 jiffies_to_msecs(doze_time));
363
364 seq_printf(s, "low power wakes: %9d\n", pm->stats.lp_wake);
365
366 return 0;
367}
368
369static int
370mt7921_pm_idle_timeout_set(void *data, u64 val)
371{
372 struct mt7921_dev *dev = data;
373
374 dev->pm.idle_timeout = msecs_to_jiffies(val);
375
376 return 0;
377}
378
379static int
380mt7921_pm_idle_timeout_get(void *data, u64 *val)
381{
382 struct mt7921_dev *dev = data;
383
384 *val = jiffies_to_msecs(dev->pm.idle_timeout);
385
386 return 0;
387}
388
389DEFINE_DEBUGFS_ATTRIBUTE(fops_pm_idle_timeout, mt7921_pm_idle_timeout_get,
390 mt7921_pm_idle_timeout_set, "%lld\n");
391
392static int mt7921_chip_reset(void *data, u64 val)
393{
394 struct mt7921_dev *dev = data;
395 int ret = 0;
396
397 switch (val) {
398 case 1:
399 /* Reset wifisys directly. */
400 mt7921_reset(&dev->mt76);
401 break;
402 default:
403 /* Collect the core dump before reset wifisys. */
404 mt7921_mutex_acquire(dev);
405 ret = mt76_connac_mcu_chip_config(&dev->mt76);
406 mt7921_mutex_release(dev);
407 break;
408 }
409
410 return ret;
411}
412
413DEFINE_DEBUGFS_ATTRIBUTE(fops_reset, NULL, mt7921_chip_reset, "%lld\n");
414
415static int
416mt7921s_sched_quota_read(struct seq_file *s, void *data)
417{
418 struct mt7921_dev *dev = dev_get_drvdata(s->private);
419 struct mt76_sdio *sdio = &dev->mt76.sdio;
420
421 seq_printf(s, "pse_data_quota\t%d\n", sdio->sched.pse_data_quota);
422 seq_printf(s, "ple_data_quota\t%d\n", sdio->sched.ple_data_quota);
423 seq_printf(s, "pse_mcu_quota\t%d\n", sdio->sched.pse_mcu_quota);
424 seq_printf(s, "sched_deficit\t%d\n", sdio->sched.deficit);
425
426 return 0;
427}
428
429int mt7921_init_debugfs(struct mt7921_dev *dev)
430{
431 struct dentry *dir;
432
433 dir = mt76_register_debugfs_fops(&dev->mphy, &fops_regval);
434 if (!dir)
435 return -ENOMEM;
436
437 if (mt76_is_mmio(&dev->mt76))
438 debugfs_create_devm_seqfile(dev->mt76.dev, "xmit-queues",
439 dir, mt7921_queues_read);
440 else
441 debugfs_create_devm_seqfile(dev->mt76.dev, "xmit-queues",
442 dir, mt76_queues_read);
443
444 debugfs_create_devm_seqfile(dev->mt76.dev, "acq", dir,
445 mt7921_queues_acq);
446 debugfs_create_devm_seqfile(dev->mt76.dev, "txpower_sku", dir,
447 mt7921_txpwr);
448 debugfs_create_file("tx_stats", 0400, dir, dev, &mt7921_tx_stats_fops);
449 debugfs_create_file("fw_debug", 0600, dir, dev, &fops_fw_debug);
450 debugfs_create_file("runtime-pm", 0600, dir, dev, &fops_pm);
451 debugfs_create_file("idle-timeout", 0600, dir, dev,
452 &fops_pm_idle_timeout);
453 debugfs_create_file("chip_reset", 0600, dir, dev, &fops_reset);
454 debugfs_create_devm_seqfile(dev->mt76.dev, "runtime_pm_stats", dir,
455 mt7921_pm_stats);
456 debugfs_create_file("deep-sleep", 0600, dir, dev, &fops_ds);
457 if (mt76_is_sdio(&dev->mt76))
458 debugfs_create_devm_seqfile(dev->mt76.dev, "sched-quota", dir,
459 mt7921s_sched_quota_read);
460 return 0;
461}