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developer887da632022-10-28 09:35:38 +08001From fcd960471fe61d47225ac1da974e64a2700cd797 Mon Sep 17 00:00:00 2001
developerc1b2cd12022-07-28 18:35:24 +08002From: Sujuan Chen <sujuan.chen@mediatek.com>
3Date: Thu, 28 Jul 2022 11:16:15 +0800
developer887da632022-10-28 09:35:38 +08004Subject: [PATCH 3005/3010] mt76 add ser spport when wed on
developerc1b2cd12022-07-28 18:35:24 +08005
6Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
developer887da632022-10-28 09:35:38 +08007Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
developerc1b2cd12022-07-28 18:35:24 +08008---
developer2ed23d42022-08-09 16:20:46 +08009 dma.c | 29 ++++++++++++++++++++---------
10 dma.h | 2 +-
11 mt76.h | 1 +
12 mt7915/dma.c | 36 +++++++++++++++++++++++++++++++-----
13 mt7915/mac.c | 20 ++++++++++++++++++++
14 mt7915/mmio.c | 2 ++
15 mt7915/mt7915.h | 1 +
16 7 files changed, 76 insertions(+), 15 deletions(-)
developerc1b2cd12022-07-28 18:35:24 +080017
18diff --git a/dma.c b/dma.c
developer887da632022-10-28 09:35:38 +080019index a8739eb..d63b02f 100644
developerc1b2cd12022-07-28 18:35:24 +080020--- a/dma.c
21+++ b/dma.c
developer2ed23d42022-08-09 16:20:46 +080022@@ -169,7 +169,7 @@ mt76_free_pending_txwi(struct mt76_dev *dev)
23 local_bh_enable();
24 }
25
26-static void
27+void
28 mt76_free_pending_rxwi(struct mt76_dev *dev)
29 {
30 struct mt76_txwi_cache *r;
31@@ -183,6 +183,7 @@ mt76_free_pending_rxwi(struct mt76_dev *dev)
32 }
33 local_bh_enable();
34 }
35+EXPORT_SYMBOL_GPL(mt76_free_pending_rxwi);
36
37 static void
38 mt76_dma_sync_idx(struct mt76_dev *dev, struct mt76_queue *q)
39@@ -624,14 +625,18 @@ mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q)
developerc1b2cd12022-07-28 18:35:24 +080040 return frames;
41 }
42
43-static int
44-mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q)
45+int
46+mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset)
47 {
48 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
49 struct mtk_wed_device *wed = &dev->mmio.wed;
50 int ret, type, ring;
51- u8 flags = q->flags;
52+ u8 flags;
developer2ed23d42022-08-09 16:20:46 +080053
developerc1b2cd12022-07-28 18:35:24 +080054+ if (!q || !q->ndesc)
55+ return -EINVAL;
developer2ed23d42022-08-09 16:20:46 +080056+
developerc1b2cd12022-07-28 18:35:24 +080057+ flags = q->flags;
58 if (!mtk_wed_device_active(wed))
59 q->flags &= ~MT_QFLAG_WED;
60
developer2ed23d42022-08-09 16:20:46 +080061@@ -643,7 +648,7 @@ mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q)
developerc1b2cd12022-07-28 18:35:24 +080062
63 switch (type) {
64 case MT76_WED_Q_TX:
65- ret = mtk_wed_device_tx_ring_setup(wed, ring, q->regs);
66+ ret = mtk_wed_device_tx_ring_setup(wed, ring, q->regs, reset);
67 if (!ret)
68 q->wed_regs = wed->tx_ring[ring].reg_base;
69 break;
developer2ed23d42022-08-09 16:20:46 +080070@@ -659,7 +664,7 @@ mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q)
developerc1b2cd12022-07-28 18:35:24 +080071 q->wed_regs = wed->txfree_ring.reg_base;
72 break;
73 case MT76_WED_Q_RX:
74- ret = mtk_wed_device_rx_ring_setup(wed, ring, q->regs);
75+ ret = mtk_wed_device_rx_ring_setup(wed, ring, q->regs, reset);
76 if (!ret)
77 q->wed_regs = wed->rx_ring[ring].reg_base;
78 break;
developer2ed23d42022-08-09 16:20:46 +080079@@ -672,6 +677,7 @@ mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q)
developerc1b2cd12022-07-28 18:35:24 +080080 return 0;
81 #endif
82 }
83+EXPORT_SYMBOL_GPL(mt76_dma_wed_setup);
84
85 static int
86 mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q,
developer2ed23d42022-08-09 16:20:46 +080087@@ -704,7 +710,7 @@ mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q,
developerc1b2cd12022-07-28 18:35:24 +080088 if (!q->entry)
89 return -ENOMEM;
90
91- ret = mt76_dma_wed_setup(dev, q);
92+ ret = mt76_dma_wed_setup(dev, q, false);
93 if (ret)
94 return ret;
95
developer2ed23d42022-08-09 16:20:46 +080096@@ -755,8 +761,13 @@ mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid)
developerc1b2cd12022-07-28 18:35:24 +080097 q->desc[i].ctrl = cpu_to_le32(MT_DMA_CTL_DMA_DONE);
98
99 mt76_dma_rx_cleanup(dev, q);
100- mt76_dma_sync_idx(dev, q);
101- mt76_dma_rx_fill(dev, q);
102+
103+ mt76_dma_wed_setup(dev, q, true);
104+
105+ if (q->flags != MT_WED_Q_TXFREE) {
106+ mt76_dma_sync_idx(dev, q);
107+ mt76_dma_rx_fill(dev, q);
108+ }
109
110 if (!q->rx_head)
111 return;
112diff --git a/dma.h b/dma.h
developer887da632022-10-28 09:35:38 +0800113index 90370d1..083cbca 100644
developerc1b2cd12022-07-28 18:35:24 +0800114--- a/dma.h
115+++ b/dma.h
116@@ -58,5 +58,5 @@ enum mt76_mcu_evt_type {
117 int mt76_dma_rx_poll(struct napi_struct *napi, int budget);
118 void mt76_dma_attach(struct mt76_dev *dev);
119 void mt76_dma_cleanup(struct mt76_dev *dev);
120-
121+int mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset);
122 #endif
developer2ed23d42022-08-09 16:20:46 +0800123diff --git a/mt76.h b/mt76.h
developer887da632022-10-28 09:35:38 +0800124index 45439a7..13bdc08 100644
developer2ed23d42022-08-09 16:20:46 +0800125--- a/mt76.h
126+++ b/mt76.h
developer887da632022-10-28 09:35:38 +0800127@@ -1373,6 +1373,7 @@ mt76_tx_status_get_hw(struct mt76_dev *dev, struct sk_buff *skb)
developer2ed23d42022-08-09 16:20:46 +0800128 void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t);
129 void mt76_put_rxwi(struct mt76_dev *dev, struct mt76_txwi_cache *t);
130 struct mt76_txwi_cache *mt76_get_rxwi(struct mt76_dev *dev);
131+void mt76_free_pending_rxwi(struct mt76_dev *dev);
132 void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames,
133 struct napi_struct *napi);
134 void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,
developerc1b2cd12022-07-28 18:35:24 +0800135diff --git a/mt7915/dma.c b/mt7915/dma.c
developer887da632022-10-28 09:35:38 +0800136index 702d629..96cad2b 100644
developerc1b2cd12022-07-28 18:35:24 +0800137--- a/mt7915/dma.c
138+++ b/mt7915/dma.c
developerc226de82022-10-03 12:24:57 +0800139@@ -532,6 +532,7 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2)
developer2ed23d42022-08-09 16:20:46 +0800140 int mt7915_dma_reset(struct mt7915_dev *dev, bool force)
141 {
developer1d9fede2022-08-29 15:24:07 +0800142 struct mt76_phy *mphy_ext = dev->mt76.phys[MT_BAND1];
developer2ed23d42022-08-09 16:20:46 +0800143+ struct mtk_wed_device *wed = &dev->mt76.mmio.wed;
144 int i;
145
146 /* clean up hw queues */
developerc226de82022-10-03 12:24:57 +0800147@@ -552,28 +553,53 @@ int mt7915_dma_reset(struct mt7915_dev *dev, bool force)
developerc1b2cd12022-07-28 18:35:24 +0800148 mt7915_wfsys_reset(dev);
149
150 /* disable wfdma */
151+ if (mtk_wed_device_active(&dev->mt76.mmio.wed))
152+ mtk_wed_device_dma_reset(&dev->mt76.mmio.wed);
153 mt7915_dma_disable(dev, force);
154
developer2ed23d42022-08-09 16:20:46 +0800155+ /* set wifi reset done, wait FE reset */
156+ if (mtk_wed_device_active(wed) && atomic_read(&wed->fe_reset)) {
157+ atomic_set(&wed->fe_reset, 0);
158+ rtnl_lock();
159+ complete(&wed->wlan_reset_done);
160+ rtnl_unlock();
161+ wait_for_completion(&wed->fe_reset_done);
162+ }
163+
developerc1b2cd12022-07-28 18:35:24 +0800164 /* reset hw queues */
165 for (i = 0; i < __MT_TXQ_MAX; i++) {
166 mt76_queue_reset(dev, dev->mphy.q_tx[i]);
167- if (mphy_ext)
168+ if (mphy_ext) {
169 mt76_queue_reset(dev, mphy_ext->q_tx[i]);
developer2ed23d42022-08-09 16:20:46 +0800170+ if (mtk_wed_device_active(wed))
developerc1b2cd12022-07-28 18:35:24 +0800171+ mt76_dma_wed_setup(&dev->mt76,
172+ mphy_ext->q_tx[i],
173+ true);
174+ }
developer2ed23d42022-08-09 16:20:46 +0800175+ if (mtk_wed_device_active(wed))
developerc1b2cd12022-07-28 18:35:24 +0800176+ mt76_dma_wed_setup(&dev->mt76, dev->mphy.q_tx[i],
177+ true);
178 }
179
180 for (i = 0; i < __MT_MCUQ_MAX; i++)
181 mt76_queue_reset(dev, dev->mt76.q_mcu[i]);
182
183- mt76_for_each_q_rx(&dev->mt76, i)
184- mt76_queue_reset(dev, &dev->mt76.q_rx[i]);
185+ mt76_for_each_q_rx(&dev->mt76, i) {
186+ if (dev->mt76.q_rx[i].flags != MT_WED_Q_TXFREE)
187+ mt76_queue_reset(dev, &dev->mt76.q_rx[i]);
188+ }
189
190 mt76_tx_status_check(&dev->mt76, true);
191
192- mt7915_dma_enable(dev);
193-
194 mt76_for_each_q_rx(&dev->mt76, i)
195 mt76_queue_rx_reset(dev, i);
196
developer2ed23d42022-08-09 16:20:46 +0800197+ if(mtk_wed_device_active(wed) && is_mt7915(&dev->mt76))
developerc1b2cd12022-07-28 18:35:24 +0800198+ mt76_rmw(dev, MT_WFDMA0_EXT0_CFG, MT_WFDMA0_EXT0_RXWB_KEEP,
199+ MT_WFDMA0_EXT0_RXWB_KEEP);
200+
201+ mt7915_dma_enable(dev);
202+
203 return 0;
204 }
205
206diff --git a/mt7915/mac.c b/mt7915/mac.c
developer887da632022-10-28 09:35:38 +0800207index 1ef7cb4..e78f30f 100644
developerc1b2cd12022-07-28 18:35:24 +0800208--- a/mt7915/mac.c
209+++ b/mt7915/mac.c
developer81ca9d62022-10-14 11:23:22 +0800210@@ -918,6 +918,8 @@ void mt7915_wed_release_rx_buf(struct mtk_wed_device *wed)
developer2ed23d42022-08-09 16:20:46 +0800211 mt76_put_rxwi(&dev->mt76, rxwi);
212 }
213
214+ mt76_free_pending_rxwi(&dev->mt76);
215+
216 if (wed->rx_page.va)
217 return;
218
developer81ca9d62022-10-14 11:23:22 +0800219@@ -928,6 +930,18 @@ void mt7915_wed_release_rx_buf(struct mtk_wed_device *wed)
developer2ed23d42022-08-09 16:20:46 +0800220 return;
221 }
222
223+void mt7915_wed_trigger_ser(struct mtk_wed_device *wed)
224+{
225+ struct mt7915_dev *dev;
226+ u8 band_idx;
227+ dev = container_of(wed, struct mt7915_dev, mt76.mmio.wed);
228+ band_idx = dev->phy.band_idx;
229+
230+ mt7915_mcu_set_ser(dev, SER_RECOVER, 1, band_idx);
231+
232+ return;
233+}
234+
235 static void
236 mt7915_tx_check_aggr(struct ieee80211_sta *sta, __le32 *txwi)
237 {
developer81ca9d62022-10-14 11:23:22 +0800238@@ -1681,6 +1695,12 @@ void mt7915_mac_reset_work(struct work_struct *work)
developerc1b2cd12022-07-28 18:35:24 +0800239 if (!(READ_ONCE(dev->reset_state) & MT_MCU_CMD_STOP_DMA))
240 return;
241
242+ if (mtk_wed_device_active(&dev->mt76.mmio.wed)) {
243+ mtk_wed_device_stop(&dev->mt76.mmio.wed, true);
244+ if (!is_mt7986(&dev->mt76))
245+ mt76_wr(dev, MT_INT_WED_MASK_CSR, 0);
246+ }
247+
248 ieee80211_stop_queues(mt76_hw(dev));
249 if (ext_phy)
250 ieee80211_stop_queues(ext_phy->hw);
developer2ed23d42022-08-09 16:20:46 +0800251diff --git a/mt7915/mmio.c b/mt7915/mmio.c
developer887da632022-10-28 09:35:38 +0800252index 45520c7..6a1877d 100644
developer2ed23d42022-08-09 16:20:46 +0800253--- a/mt7915/mmio.c
254+++ b/mt7915/mmio.c
developer81ca9d62022-10-14 11:23:22 +0800255@@ -616,6 +616,8 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr,
developer2ed23d42022-08-09 16:20:46 +0800256 wed->wlan.init_rx_buf = mt7915_wed_init_rx_buf;
257 wed->wlan.release_rx_buf = mt7915_wed_release_rx_buf;
258
259+ wed->wlan.ser_trigger = mt7915_wed_trigger_ser;
260+
261 dev->mt76.rx_token_size = wed->wlan.rx_pkt;
developerc226de82022-10-03 12:24:57 +0800262 if (mtk_wed_device_attach(wed))
developer2ed23d42022-08-09 16:20:46 +0800263 return 0;
264diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
developer887da632022-10-28 09:35:38 +0800265index 346571a..412f4f4 100644
developer2ed23d42022-08-09 16:20:46 +0800266--- a/mt7915/mt7915.h
267+++ b/mt7915/mt7915.h
developer887da632022-10-28 09:35:38 +0800268@@ -548,6 +548,7 @@ u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id);
developer2ed23d42022-08-09 16:20:46 +0800269 u32 mt7915_wed_init_rx_buf(struct mtk_wed_device *wed,
270 int pkt_num);
271 void mt7915_wed_release_rx_buf(struct mtk_wed_device *wed);
272+void mt7915_wed_trigger_ser(struct mtk_wed_device *wed);
273 int mt7915_register_device(struct mt7915_dev *dev);
274 void mt7915_unregister_device(struct mt7915_dev *dev);
developer81ca9d62022-10-14 11:23:22 +0800275 void mt7915_eeprom_rebonding(struct mt7915_dev *dev);
developerc1b2cd12022-07-28 18:35:24 +0800276--
developer887da632022-10-28 09:35:38 +08002772.18.0
developerc1b2cd12022-07-28 18:35:24 +0800278