| developer | 0f312e8 | 2022-11-01 12:31:52 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: ISC |
| 2 | /* Copyright (C) 2021 MediaTek Inc. */ |
| 3 | |
| 4 | #include "mt7921.h" |
| 5 | #include "mcu.h" |
| 6 | |
| 7 | int mt7921e_driver_own(struct mt7921_dev *dev) |
| 8 | { |
| 9 | u32 reg = mt7921_reg_map_l1(dev, MT_TOP_LPCR_HOST_BAND0); |
| 10 | |
| 11 | mt76_wr(dev, reg, MT_TOP_LPCR_HOST_DRV_OWN); |
| 12 | if (!mt76_poll_msec(dev, reg, MT_TOP_LPCR_HOST_FW_OWN, |
| 13 | 0, 500)) { |
| 14 | dev_err(dev->mt76.dev, "Timeout for driver own\n"); |
| 15 | return -EIO; |
| 16 | } |
| 17 | |
| 18 | return 0; |
| 19 | } |
| 20 | |
| 21 | static int |
| 22 | mt7921_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, |
| 23 | int cmd, int *seq) |
| 24 | { |
| 25 | struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); |
| 26 | enum mt76_mcuq_id txq = MT_MCUQ_WM; |
| 27 | int ret; |
| 28 | |
| 29 | ret = mt76_connac2_mcu_fill_message(mdev, skb, cmd, seq); |
| 30 | if (ret) |
| 31 | return ret; |
| 32 | |
| 33 | mdev->mcu.timeout = 3 * HZ; |
| 34 | |
| 35 | if (cmd == MCU_CMD(FW_SCATTER)) |
| 36 | txq = MT_MCUQ_FWDL; |
| 37 | |
| 38 | return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[txq], skb, 0); |
| 39 | } |
| 40 | |
| 41 | int mt7921e_mcu_init(struct mt7921_dev *dev) |
| 42 | { |
| 43 | static const struct mt76_mcu_ops mt7921_mcu_ops = { |
| 44 | .headroom = sizeof(struct mt76_connac2_mcu_txd), |
| 45 | .mcu_skb_send_msg = mt7921_mcu_send_message, |
| 46 | .mcu_parse_response = mt7921_mcu_parse_response, |
| 47 | .mcu_restart = mt76_connac_mcu_restart, |
| 48 | }; |
| 49 | int err; |
| 50 | |
| 51 | dev->mt76.mcu_ops = &mt7921_mcu_ops; |
| 52 | |
| 53 | err = mt7921e_driver_own(dev); |
| 54 | if (err) |
| 55 | return err; |
| 56 | |
| 57 | mt76_rmw_field(dev, MT_PCIE_MAC_PM, MT_PCIE_MAC_PM_L0S_DIS, 1); |
| 58 | |
| 59 | err = mt7921_run_firmware(dev); |
| 60 | |
| 61 | mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); |
| 62 | |
| 63 | return err; |
| 64 | } |
| 65 | |
| 66 | int __mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) |
| 67 | { |
| 68 | int i, err = 0; |
| 69 | |
| 70 | for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) { |
| 71 | mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_CLR_OWN); |
| 72 | if (mt76_poll_msec(dev, MT_CONN_ON_LPCTL, |
| 73 | PCIE_LPCR_HOST_OWN_SYNC, 0, 50)) |
| 74 | break; |
| 75 | } |
| 76 | |
| 77 | if (i == MT7921_DRV_OWN_RETRY_COUNT) { |
| 78 | dev_err(dev->mt76.dev, "driver own failed\n"); |
| 79 | err = -EIO; |
| 80 | } |
| 81 | |
| 82 | return err; |
| 83 | } |
| 84 | |
| 85 | int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) |
| 86 | { |
| 87 | struct mt76_phy *mphy = &dev->mt76.phy; |
| 88 | struct mt76_connac_pm *pm = &dev->pm; |
| 89 | int err; |
| 90 | |
| 91 | err = __mt7921e_mcu_drv_pmctrl(dev); |
| 92 | if (err < 0) |
| 93 | goto out; |
| 94 | |
| 95 | mt7921_wpdma_reinit_cond(dev); |
| 96 | clear_bit(MT76_STATE_PM, &mphy->state); |
| 97 | |
| 98 | pm->stats.last_wake_event = jiffies; |
| 99 | pm->stats.doze_time += pm->stats.last_wake_event - |
| 100 | pm->stats.last_doze_event; |
| 101 | out: |
| 102 | return err; |
| 103 | } |
| 104 | |
| 105 | int mt7921e_mcu_fw_pmctrl(struct mt7921_dev *dev) |
| 106 | { |
| 107 | struct mt76_phy *mphy = &dev->mt76.phy; |
| 108 | struct mt76_connac_pm *pm = &dev->pm; |
| 109 | int i; |
| 110 | |
| 111 | for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) { |
| 112 | mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_SET_OWN); |
| 113 | if (mt76_poll_msec(dev, MT_CONN_ON_LPCTL, |
| 114 | PCIE_LPCR_HOST_OWN_SYNC, 4, 50)) |
| 115 | break; |
| 116 | } |
| 117 | |
| 118 | if (i == MT7921_DRV_OWN_RETRY_COUNT) { |
| 119 | dev_err(dev->mt76.dev, "firmware own failed\n"); |
| 120 | clear_bit(MT76_STATE_PM, &mphy->state); |
| 121 | return -EIO; |
| 122 | } |
| 123 | |
| 124 | pm->stats.last_doze_event = jiffies; |
| 125 | pm->stats.awake_time += pm->stats.last_doze_event - |
| 126 | pm->stats.last_wake_event; |
| 127 | |
| 128 | return 0; |
| 129 | } |