blob: 416e5acba08bbbb25d42f7899cc86d112f289cfd [file] [log] [blame]
developer0f312e82022-11-01 12:31:52 +08001// SPDX-License-Identifier: ISC
2/* Copyright (C) 2020 MediaTek Inc. */
3
4#include <linux/etherdevice.h>
5#include <linux/hwmon.h>
6#include <linux/hwmon-sysfs.h>
7#include <linux/thermal.h>
8#include "mt7915.h"
9#include "mac.h"
10#include "mcu.h"
11#include "eeprom.h"
12
13static const struct ieee80211_iface_limit if_limits[] = {
14 {
15 .max = 1,
16 .types = BIT(NL80211_IFTYPE_ADHOC)
17 }, {
18 .max = 16,
19 .types = BIT(NL80211_IFTYPE_AP)
20#ifdef CONFIG_MAC80211_MESH
21 | BIT(NL80211_IFTYPE_MESH_POINT)
22#endif
23 }, {
24 .max = MT7915_MAX_INTERFACES,
25 .types = BIT(NL80211_IFTYPE_STATION)
26 }
27};
28
29static const struct ieee80211_iface_combination if_comb[] = {
30 {
31 .limits = if_limits,
32 .n_limits = ARRAY_SIZE(if_limits),
33 .max_interfaces = MT7915_MAX_INTERFACES,
34 .num_different_channels = 1,
35 .beacon_int_infra_match = true,
36 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
37 BIT(NL80211_CHAN_WIDTH_20) |
38 BIT(NL80211_CHAN_WIDTH_40) |
39 BIT(NL80211_CHAN_WIDTH_80) |
40 BIT(NL80211_CHAN_WIDTH_160) |
41 BIT(NL80211_CHAN_WIDTH_80P80),
42 }
43};
44
45static ssize_t mt7915_thermal_temp_show(struct device *dev,
46 struct device_attribute *attr,
47 char *buf)
48{
49 struct mt7915_phy *phy = dev_get_drvdata(dev);
50 int i = to_sensor_dev_attr(attr)->index;
51 int temperature;
52
53 switch (i) {
54 case 0:
55 temperature = mt7915_mcu_get_temperature(phy);
56 if (temperature < 0)
57 return temperature;
58 /* display in millidegree celcius */
59 return sprintf(buf, "%u\n", temperature * 1000);
60 case 1:
61 case 2:
62 return sprintf(buf, "%u\n",
63 phy->throttle_temp[i - 1] * 1000);
64 case 3:
65 return sprintf(buf, "%hhu\n", phy->throttle_state);
66 default:
67 return -EINVAL;
68 }
69}
70
71static ssize_t mt7915_thermal_temp_store(struct device *dev,
72 struct device_attribute *attr,
73 const char *buf, size_t count)
74{
75 struct mt7915_phy *phy = dev_get_drvdata(dev);
76 int ret, i = to_sensor_dev_attr(attr)->index;
77 long val;
78
79 ret = kstrtol(buf, 10, &val);
80 if (ret < 0)
81 return ret;
82
83 mutex_lock(&phy->dev->mt76.mutex);
84 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 60, 130);
85 phy->throttle_temp[i - 1] = val;
86 mutex_unlock(&phy->dev->mt76.mutex);
87
88 return count;
89}
90
91static SENSOR_DEVICE_ATTR_RO(temp1_input, mt7915_thermal_temp, 0);
92static SENSOR_DEVICE_ATTR_RW(temp1_crit, mt7915_thermal_temp, 1);
93static SENSOR_DEVICE_ATTR_RW(temp1_max, mt7915_thermal_temp, 2);
94static SENSOR_DEVICE_ATTR_RO(throttle1, mt7915_thermal_temp, 3);
95
96static struct attribute *mt7915_hwmon_attrs[] = {
97 &sensor_dev_attr_temp1_input.dev_attr.attr,
98 &sensor_dev_attr_temp1_crit.dev_attr.attr,
99 &sensor_dev_attr_temp1_max.dev_attr.attr,
100 &sensor_dev_attr_throttle1.dev_attr.attr,
101 NULL,
102};
103ATTRIBUTE_GROUPS(mt7915_hwmon);
104
105static int
106mt7915_thermal_get_max_throttle_state(struct thermal_cooling_device *cdev,
107 unsigned long *state)
108{
109 *state = MT7915_CDEV_THROTTLE_MAX;
110
111 return 0;
112}
113
114static int
115mt7915_thermal_get_cur_throttle_state(struct thermal_cooling_device *cdev,
116 unsigned long *state)
117{
118 struct mt7915_phy *phy = cdev->devdata;
119
120 *state = phy->cdev_state;
121
122 return 0;
123}
124
125static int
126mt7915_thermal_set_cur_throttle_state(struct thermal_cooling_device *cdev,
127 unsigned long state)
128{
129 struct mt7915_phy *phy = cdev->devdata;
130 u8 throttling = MT7915_THERMAL_THROTTLE_MAX - state;
131 int ret;
132
133 if (state > MT7915_CDEV_THROTTLE_MAX)
134 return -EINVAL;
135
136 if (phy->throttle_temp[0] > phy->throttle_temp[1])
137 return 0;
138
139 if (state == phy->cdev_state)
140 return 0;
141
142 /*
143 * cooling_device convention: 0 = no cooling, more = more cooling
144 * mcu convention: 1 = max cooling, more = less cooling
145 */
146 ret = mt7915_mcu_set_thermal_throttling(phy, throttling);
147 if (ret)
148 return ret;
149
150 phy->cdev_state = state;
151
152 return 0;
153}
154
155static const struct thermal_cooling_device_ops mt7915_thermal_ops = {
156 .get_max_state = mt7915_thermal_get_max_throttle_state,
157 .get_cur_state = mt7915_thermal_get_cur_throttle_state,
158 .set_cur_state = mt7915_thermal_set_cur_throttle_state,
159};
160
161static void mt7915_unregister_thermal(struct mt7915_phy *phy)
162{
163 struct wiphy *wiphy = phy->mt76->hw->wiphy;
164
165 if (!phy->cdev)
166 return;
167
168 sysfs_remove_link(&wiphy->dev.kobj, "cooling_device");
169 thermal_cooling_device_unregister(phy->cdev);
170}
171
172static int mt7915_thermal_init(struct mt7915_phy *phy)
173{
174 struct wiphy *wiphy = phy->mt76->hw->wiphy;
175 struct thermal_cooling_device *cdev;
176 struct device *hwmon;
177 const char *name;
178
179 name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7915_%s",
180 wiphy_name(wiphy));
181
182 cdev = thermal_cooling_device_register(name, phy, &mt7915_thermal_ops);
183 if (!IS_ERR(cdev)) {
184 if (sysfs_create_link(&wiphy->dev.kobj, &cdev->device.kobj,
185 "cooling_device") < 0)
186 thermal_cooling_device_unregister(cdev);
187 else
188 phy->cdev = cdev;
189 }
190
191 if (!IS_REACHABLE(CONFIG_HWMON))
192 return 0;
193
194 hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, phy,
195 mt7915_hwmon_groups);
196 if (IS_ERR(hwmon))
197 return PTR_ERR(hwmon);
198
199 /* initialize critical/maximum high temperature */
200 phy->throttle_temp[0] = 110;
201 phy->throttle_temp[1] = 120;
202
203 return mt7915_mcu_set_thermal_throttling(phy,
204 MT7915_THERMAL_THROTTLE_MAX);
205}
206
207static void mt7915_led_set_config(struct led_classdev *led_cdev,
208 u8 delay_on, u8 delay_off)
209{
210 struct mt7915_dev *dev;
211 struct mt76_dev *mt76;
212 u32 val;
213
214 mt76 = container_of(led_cdev, struct mt76_dev, led_cdev);
215 dev = container_of(mt76, struct mt7915_dev, mt76);
216
217 /* select TX blink mode, 2: only data frames */
218 mt76_rmw_field(dev, MT_TMAC_TCR0(0), MT_TMAC_TCR0_TX_BLINK, 2);
219
220 /* enable LED */
221 mt76_wr(dev, MT_LED_EN(0), 1);
222
223 /* set LED Tx blink on/off time */
224 val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) |
225 FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off);
226 mt76_wr(dev, MT_LED_TX_BLINK(0), val);
227
228 /* control LED */
229 val = MT_LED_CTRL_BLINK_MODE | MT_LED_CTRL_KICK;
230 if (dev->mt76.led_al)
231 val |= MT_LED_CTRL_POLARITY;
232
233 mt76_wr(dev, MT_LED_CTRL(0), val);
234 mt76_clear(dev, MT_LED_CTRL(0), MT_LED_CTRL_KICK);
235}
236
237static int mt7915_led_set_blink(struct led_classdev *led_cdev,
238 unsigned long *delay_on,
239 unsigned long *delay_off)
240{
241 u16 delta_on = 0, delta_off = 0;
242
243#define HW_TICK 10
244#define TO_HW_TICK(_t) (((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK)
245
246 if (*delay_on)
247 delta_on = TO_HW_TICK(*delay_on);
248 if (*delay_off)
249 delta_off = TO_HW_TICK(*delay_off);
250
251 mt7915_led_set_config(led_cdev, delta_on, delta_off);
252
253 return 0;
254}
255
256static void mt7915_led_set_brightness(struct led_classdev *led_cdev,
257 enum led_brightness brightness)
258{
259 if (!brightness)
260 mt7915_led_set_config(led_cdev, 0, 0xff);
261 else
262 mt7915_led_set_config(led_cdev, 0xff, 0);
263}
264
265static void
266mt7915_init_txpower(struct mt7915_dev *dev,
267 struct ieee80211_supported_band *sband)
268{
269 int i, n_chains = hweight8(dev->mphy.antenna_mask);
270 int nss_delta = mt76_tx_power_nss_delta(n_chains);
271 int pwr_delta = mt7915_eeprom_get_power_delta(dev, sband->band);
272 struct mt76_power_limits limits;
273
274 for (i = 0; i < sband->n_channels; i++) {
275 struct ieee80211_channel *chan = &sband->channels[i];
276 u32 target_power = 0;
277 int j;
278
279 for (j = 0; j < n_chains; j++) {
280 u32 val;
281
282 val = mt7915_eeprom_get_target_power(dev, chan, j);
283 target_power = max(target_power, val);
284 }
285
286 target_power += pwr_delta;
287 target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
288 &limits,
289 target_power);
290 target_power += nss_delta;
291 target_power = DIV_ROUND_UP(target_power, 2);
292 chan->max_power = min_t(int, chan->max_reg_power,
293 target_power);
294 chan->orig_mpwr = target_power;
295 }
296}
297
298static void
299mt7915_regd_notifier(struct wiphy *wiphy,
300 struct regulatory_request *request)
301{
302 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
303 struct mt7915_dev *dev = mt7915_hw_dev(hw);
304 struct mt76_phy *mphy = hw->priv;
305 struct mt7915_phy *phy = mphy->priv;
306
307 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
308 dev->mt76.region = request->dfs_region;
309
310 if (dev->mt76.region == NL80211_DFS_UNSET)
311 mt7915_mcu_rdd_background_enable(phy, NULL);
312
313 mt7915_init_txpower(dev, &mphy->sband_2g.sband);
314 mt7915_init_txpower(dev, &mphy->sband_5g.sband);
315 mt7915_init_txpower(dev, &mphy->sband_6g.sband);
316
317 mphy->dfs_state = MT_DFS_STATE_UNKNOWN;
318 mt7915_dfs_init_radar_detector(phy);
319}
320
321static void
322mt7915_init_wiphy(struct ieee80211_hw *hw)
323{
324 struct mt7915_phy *phy = mt7915_hw_phy(hw);
325 struct mt76_dev *mdev = &phy->dev->mt76;
326 struct wiphy *wiphy = hw->wiphy;
327 struct mt7915_dev *dev = phy->dev;
328
329 hw->queues = 4;
330 hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF;
331 hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF;
332 hw->netdev_features = NETIF_F_RXCSUM;
333
334 hw->radiotap_timestamp.units_pos =
335 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
336
337 phy->slottime = 9;
338
339 hw->sta_data_size = sizeof(struct mt7915_sta);
340 hw->vif_data_size = sizeof(struct mt7915_vif);
341
342 wiphy->iface_combinations = if_comb;
343 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
344 wiphy->reg_notifier = mt7915_regd_notifier;
345 wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
346 wiphy->mbssid_max_interfaces = 16;
347
348 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR);
349 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
350 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY);
351 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT);
352 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT);
353 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE);
354 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP);
355 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_DISCOVERY);
356
357 if (!mdev->dev->of_node ||
358 !of_property_read_bool(mdev->dev->of_node,
359 "mediatek,disable-radar-background"))
360 wiphy_ext_feature_set(wiphy,
361 NL80211_EXT_FEATURE_RADAR_BACKGROUND);
362
363 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
364 ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD);
365 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
366 ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID);
367 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
368 ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
369
370 hw->max_tx_fragments = 4;
371
372 if (!phy->dev->dbdc_support)
373 wiphy->txq_memory_limit = 32 << 20; /* 32 MiB */
374
375 if (phy->mt76->cap.has_2ghz) {
376 phy->mt76->sband_2g.sband.ht_cap.cap |=
377 IEEE80211_HT_CAP_LDPC_CODING |
378 IEEE80211_HT_CAP_MAX_AMSDU;
379 phy->mt76->sband_2g.sband.ht_cap.ampdu_density =
380 IEEE80211_HT_MPDU_DENSITY_4;
381 }
382
383 if (phy->mt76->cap.has_5ghz) {
384 phy->mt76->sband_5g.sband.ht_cap.cap |=
385 IEEE80211_HT_CAP_LDPC_CODING |
386 IEEE80211_HT_CAP_MAX_AMSDU;
387 phy->mt76->sband_5g.sband.ht_cap.ampdu_density =
388 IEEE80211_HT_MPDU_DENSITY_4;
389
390 if (is_mt7915(&dev->mt76)) {
391 phy->mt76->sband_5g.sband.vht_cap.cap |=
392 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 |
393 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
394
395 if (!dev->dbdc_support)
396 phy->mt76->sband_5g.sband.vht_cap.cap |=
397 IEEE80211_VHT_CAP_SHORT_GI_160 |
398 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
399 } else {
400 phy->mt76->sband_5g.sband.vht_cap.cap |=
401 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
402 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
403
404 /* mt7916 dbdc with 2g 2x2 bw40 and 5g 2x2 bw160c */
405 phy->mt76->sband_5g.sband.vht_cap.cap |=
406 IEEE80211_VHT_CAP_SHORT_GI_160 |
407 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ;
408 }
409 }
410
411 mt76_set_stream_caps(phy->mt76, true);
412 mt7915_set_stream_vht_txbf_caps(phy);
413 mt7915_set_stream_he_caps(phy);
414
415 wiphy->available_antennas_rx = phy->mt76->antenna_mask;
416 wiphy->available_antennas_tx = phy->mt76->antenna_mask;
417}
418
419static void
420mt7915_mac_init_band(struct mt7915_dev *dev, u8 band)
421{
422 u32 mask, set;
423
424 mt76_rmw_field(dev, MT_TMAC_CTCR0(band),
425 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
426 mt76_set(dev, MT_TMAC_CTCR0(band),
427 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
428 MT_TMAC_CTCR0_INS_DDLMT_EN);
429
430 mask = MT_MDP_RCFR0_MCU_RX_MGMT |
431 MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR |
432 MT_MDP_RCFR0_MCU_RX_CTL_BAR;
433 set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) |
434 FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR, MT_MDP_TO_HIF) |
435 FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_BAR, MT_MDP_TO_HIF);
436 mt76_rmw(dev, MT_MDP_BNRCFR0(band), mask, set);
437
438 mask = MT_MDP_RCFR1_MCU_RX_BYPASS |
439 MT_MDP_RCFR1_RX_DROPPED_UCAST |
440 MT_MDP_RCFR1_RX_DROPPED_MCAST;
441 set = FIELD_PREP(MT_MDP_RCFR1_MCU_RX_BYPASS, MT_MDP_TO_HIF) |
442 FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_UCAST, MT_MDP_TO_HIF) |
443 FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_MCAST, MT_MDP_TO_HIF);
444 mt76_rmw(dev, MT_MDP_BNRCFR1(band), mask, set);
445
446 mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 0x680);
447
448 /* mt7915: disable rx rate report by default due to hw issues */
449 mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN);
450}
451
452static void mt7915_mac_init(struct mt7915_dev *dev)
453{
454 int i;
455 u32 rx_len = is_mt7915(&dev->mt76) ? 0x400 : 0x680;
456
457 /* config pse qid6 wfdma port selection */
458 if (!is_mt7915(&dev->mt76) && dev->hif2)
459 mt76_rmw(dev, MT_WF_PP_TOP_RXQ_WFDMA_CF_5, 0,
460 MT_WF_PP_TOP_RXQ_QID6_WFDMA_HIF_SEL_MASK);
461
462 mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, rx_len);
463
464 if (!is_mt7915(&dev->mt76))
465 mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT);
466
467 /* enable hardware de-agg */
468 mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN);
469
470 for (i = 0; i < mt7915_wtbl_size(dev); i++)
471 mt7915_mac_wtbl_update(dev, i,
472 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
473 for (i = 0; i < 2; i++)
474 mt7915_mac_init_band(dev, i);
475
476 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
477 i = dev->mt76.led_pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2;
478 mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4);
479 }
480}
481
482static int mt7915_txbf_init(struct mt7915_dev *dev)
483{
484 int ret;
485
486 if (dev->dbdc_support) {
487 ret = mt7915_mcu_set_txbf(dev, MT_BF_MODULE_UPDATE);
488 if (ret)
489 return ret;
490 }
491
492 /* trigger sounding packets */
493 ret = mt7915_mcu_set_txbf(dev, MT_BF_SOUNDING_ON);
494 if (ret)
495 return ret;
496
497 /* enable eBF */
498 return mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE);
499}
500
501static struct mt7915_phy *
502mt7915_alloc_ext_phy(struct mt7915_dev *dev)
503{
504 struct mt7915_phy *phy;
505 struct mt76_phy *mphy;
506
507 if (!dev->dbdc_support)
508 return NULL;
509
510 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7915_ops, MT_BAND1);
511 if (!mphy)
512 return ERR_PTR(-ENOMEM);
513
514 phy = mphy->priv;
515 phy->dev = dev;
516 phy->mt76 = mphy;
517
518 /* Bind main phy to band0 and ext_phy to band1 for dbdc case */
519 phy->band_idx = 1;
520
521 return phy;
522}
523
524static int
525mt7915_register_ext_phy(struct mt7915_dev *dev, struct mt7915_phy *phy)
526{
527 struct mt76_phy *mphy = phy->mt76;
528 int ret;
529
530 INIT_DELAYED_WORK(&mphy->mac_work, mt7915_mac_work);
531
532 mt7915_eeprom_parse_hw_cap(dev, phy);
533
534 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR2,
535 ETH_ALEN);
536 /* Make the secondary PHY MAC address local without overlapping with
537 * the usual MAC address allocation scheme on multiple virtual interfaces
538 */
539 if (!is_valid_ether_addr(mphy->macaddr)) {
540 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
541 ETH_ALEN);
542 mphy->macaddr[0] |= 2;
543 mphy->macaddr[0] ^= BIT(7);
544 }
545 mt76_eeprom_override(mphy);
546
547 /* init wiphy according to mphy and phy */
548 mt7915_init_wiphy(mphy->hw);
549
550 ret = mt76_register_phy(mphy, true, mt76_rates,
551 ARRAY_SIZE(mt76_rates));
552 if (ret)
553 return ret;
554
555 ret = mt7915_thermal_init(phy);
556 if (ret)
557 goto unreg;
558
559 mt7915_init_debugfs(phy);
560
561 return 0;
562
563unreg:
564 mt76_unregister_phy(mphy);
565 return ret;
566}
567
568static void mt7915_init_work(struct work_struct *work)
569{
570 struct mt7915_dev *dev = container_of(work, struct mt7915_dev,
571 init_work);
572
573 mt7915_mcu_set_eeprom(dev);
574 mt7915_mac_init(dev);
575 mt7915_init_txpower(dev, &dev->mphy.sband_2g.sband);
576 mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband);
577 mt7915_init_txpower(dev, &dev->mphy.sband_6g.sband);
578 mt7915_txbf_init(dev);
579}
580
581void mt7915_wfsys_reset(struct mt7915_dev *dev)
582{
583#define MT_MCU_DUMMY_RANDOM GENMASK(15, 0)
584#define MT_MCU_DUMMY_DEFAULT GENMASK(31, 16)
585
586 if (is_mt7915(&dev->mt76)) {
587 u32 val = MT_TOP_PWR_KEY | MT_TOP_PWR_SW_PWR_ON | MT_TOP_PWR_PWR_ON;
588
589 mt76_wr(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_RANDOM);
590
591 /* change to software control */
592 val |= MT_TOP_PWR_SW_RST;
593 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
594
595 /* reset wfsys */
596 val &= ~MT_TOP_PWR_SW_RST;
597 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
598
599 /* release wfsys then mcu re-executes romcode */
600 val |= MT_TOP_PWR_SW_RST;
601 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
602
603 /* switch to hw control */
604 val &= ~MT_TOP_PWR_SW_RST;
605 val |= MT_TOP_PWR_HW_CTRL;
606 mt76_wr(dev, MT_TOP_PWR_CTRL, val);
607
608 /* check whether mcu resets to default */
609 if (!mt76_poll_msec(dev, MT_MCU_WFDMA0_DUMMY_CR,
610 MT_MCU_DUMMY_DEFAULT, MT_MCU_DUMMY_DEFAULT,
611 1000)) {
612 dev_err(dev->mt76.dev, "wifi subsystem reset failure\n");
613 return;
614 }
615
616 /* wfsys reset won't clear host registers */
617 mt76_clear(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE);
618
619 msleep(100);
620 } else if (is_mt7986(&dev->mt76)) {
621 mt7986_wmac_disable(dev);
622 msleep(20);
623
624 mt7986_wmac_enable(dev);
625 msleep(20);
626 } else {
627 mt76_set(dev, MT_WF_SUBSYS_RST, 0x1);
628 msleep(20);
629
630 mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1);
631 msleep(20);
632 }
633}
634
635static bool mt7915_band_config(struct mt7915_dev *dev)
636{
637 bool ret = true;
638
639 dev->phy.band_idx = 0;
640
641 if (is_mt7986(&dev->mt76)) {
642 u32 sku = mt7915_check_adie(dev, true);
643
644 /*
645 * for mt7986, dbdc support is determined by the number
646 * of adie chips and the main phy is bound to band1 when
647 * dbdc is disabled.
648 */
649 if (sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE) {
650 dev->phy.band_idx = 1;
651 ret = false;
652 }
653 } else {
654 ret = is_mt7915(&dev->mt76) ?
655 !!(mt76_rr(dev, MT_HW_BOUND) & BIT(5)) : true;
656 }
657
658 return ret;
659}
660
661static int
662mt7915_init_hardware(struct mt7915_dev *dev, struct mt7915_phy *phy2)
663{
664 int ret, idx;
665
666 mt76_wr(dev, MT_INT_MASK_CSR, 0);
667 mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
668
669 INIT_WORK(&dev->init_work, mt7915_init_work);
670
671 ret = mt7915_dma_init(dev, phy2);
672 if (ret)
673 return ret;
674
675 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
676
677 ret = mt7915_mcu_init(dev);
678 if (ret)
679 return ret;
680
681 ret = mt7915_eeprom_init(dev);
682 if (ret < 0)
683 return ret;
684
685 if (dev->flash_mode) {
686 ret = mt7915_mcu_apply_group_cal(dev);
687 if (ret)
688 return ret;
689 }
690
691 /* Beacon and mgmt frames should occupy wcid 0 */
692 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA);
693 if (idx)
694 return -ENOSPC;
695
696 dev->mt76.global_wcid.idx = idx;
697 dev->mt76.global_wcid.hw_key_idx = -1;
698 dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET;
699 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
700
701 return 0;
702}
703
704void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy)
705{
706 int sts;
707 u32 *cap;
708
709 if (!phy->mt76->cap.has_5ghz)
710 return;
711
712 sts = hweight8(phy->mt76->chainmask);
713 cap = &phy->mt76->sband_5g.sband.vht_cap.cap;
714
715 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
716 IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
717 (3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
718
719 *cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK |
720 IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
721 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE);
722
723 if (sts < 2)
724 return;
725
726 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
727 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE |
728 FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
729 sts - 1);
730}
731
732static void
733mt7915_set_stream_he_txbf_caps(struct mt7915_phy *phy,
734 struct ieee80211_sta_he_cap *he_cap, int vif)
735{
736 struct mt7915_dev *dev = phy->dev;
737 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
738 int sts = hweight8(phy->mt76->chainmask);
739 u8 c, sts_160 = sts;
740
741 /* Can do 1/2 of STS in 160Mhz mode for mt7915 */
742 if (is_mt7915(&dev->mt76) && !dev->dbdc_support)
743 sts_160 /= 2;
744
745#ifdef CONFIG_MAC80211_MESH
746 if (vif == NL80211_IFTYPE_MESH_POINT)
747 return;
748#endif
749
750 elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
751 elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
752
753 c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK |
754 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK;
755 elem->phy_cap_info[5] &= ~c;
756
757 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
758 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
759 elem->phy_cap_info[6] &= ~c;
760
761 elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
762
763 c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US;
764 if (!is_mt7915(&dev->mt76))
765 c |= IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |
766 IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO;
767 elem->phy_cap_info[2] |= c;
768
769 c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
770 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 |
771 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
772 elem->phy_cap_info[4] |= c;
773
774 /* do not support NG16 due to spec D4.0 changes subcarrier idx */
775 c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
776 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU;
777
778 if (vif == NL80211_IFTYPE_STATION)
779 c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO;
780
781 elem->phy_cap_info[6] |= c;
782
783 if (sts < 2)
784 return;
785
786 /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */
787 elem->phy_cap_info[7] |= min_t(int, sts - 1, 2) << 3;
788
789 if (vif != NL80211_IFTYPE_AP)
790 return;
791
792 elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
793 elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
794
795 /* num_snd_dim
796 * for mt7915, max supported sts is 2 for bw > 80MHz
797 */
798 c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
799 sts - 1) |
800 FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
801 sts_160 - 1);
802 elem->phy_cap_info[5] |= c;
803
804 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
805 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
806 elem->phy_cap_info[6] |= c;
807
808 if (!is_mt7915(&dev->mt76)) {
809 c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ |
810 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ;
811 elem->phy_cap_info[7] |= c;
812 }
813}
814
815static void
816mt7915_gen_ppe_thresh(u8 *he_ppet, int nss)
817{
818 u8 i, ppet_bits, ppet_size, ru_bit_mask = 0x7; /* HE80 */
819 static const u8 ppet16_ppet8_ru3_ru0[] = {0x1c, 0xc7, 0x71};
820
821 he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) |
822 FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK,
823 ru_bit_mask);
824
825 ppet_bits = IEEE80211_PPE_THRES_INFO_PPET_SIZE *
826 nss * hweight8(ru_bit_mask) * 2;
827 ppet_size = DIV_ROUND_UP(ppet_bits, 8);
828
829 for (i = 0; i < ppet_size - 1; i++)
830 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3];
831
832 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3] &
833 (0xff >> (8 - (ppet_bits - 1) % 8));
834}
835
836static int
837mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band,
838 struct ieee80211_sband_iftype_data *data)
839{
840 struct mt7915_dev *dev = phy->dev;
841 int i, idx = 0, nss = hweight8(phy->mt76->antenna_mask);
842 u16 mcs_map = 0;
843 u16 mcs_map_160 = 0;
844 u8 nss_160;
845
846 /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */
847 if (is_mt7915(&dev->mt76) && !dev->dbdc_support)
848 nss_160 = nss / 2;
849 else
850 nss_160 = nss;
851
852 for (i = 0; i < 8; i++) {
853 if (i < nss)
854 mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
855 else
856 mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
857
858 if (i < nss_160)
859 mcs_map_160 |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
860 else
861 mcs_map_160 |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
862 }
863
864 for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
865 struct ieee80211_sta_he_cap *he_cap = &data[idx].he_cap;
866 struct ieee80211_he_cap_elem *he_cap_elem =
867 &he_cap->he_cap_elem;
868 struct ieee80211_he_mcs_nss_supp *he_mcs =
869 &he_cap->he_mcs_nss_supp;
870
871 switch (i) {
872 case NL80211_IFTYPE_STATION:
873 case NL80211_IFTYPE_AP:
874#ifdef CONFIG_MAC80211_MESH
875 case NL80211_IFTYPE_MESH_POINT:
876#endif
877 break;
878 default:
879 continue;
880 }
881
882 data[idx].types_mask = BIT(i);
883 he_cap->has_he = true;
884
885 he_cap_elem->mac_cap_info[0] =
886 IEEE80211_HE_MAC_CAP0_HTC_HE;
887 he_cap_elem->mac_cap_info[3] =
888 IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
889 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
890 he_cap_elem->mac_cap_info[4] =
891 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
892
893 if (band == NL80211_BAND_2GHZ)
894 he_cap_elem->phy_cap_info[0] =
895 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
896 else
897 he_cap_elem->phy_cap_info[0] =
898 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
899 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |
900 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G;
901
902 he_cap_elem->phy_cap_info[1] =
903 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD;
904 he_cap_elem->phy_cap_info[2] =
905 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
906 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ;
907
908 switch (i) {
909 case NL80211_IFTYPE_AP:
910 he_cap_elem->mac_cap_info[0] |=
911 IEEE80211_HE_MAC_CAP0_TWT_RES;
912 he_cap_elem->mac_cap_info[2] |=
913 IEEE80211_HE_MAC_CAP2_BSR;
914 he_cap_elem->mac_cap_info[4] |=
915 IEEE80211_HE_MAC_CAP4_BQR;
916 he_cap_elem->mac_cap_info[5] |=
917 IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX;
918 he_cap_elem->phy_cap_info[3] |=
919 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
920 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
921 he_cap_elem->phy_cap_info[6] |=
922 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
923 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
924 he_cap_elem->phy_cap_info[9] |=
925 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
926 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU;
927 break;
928 case NL80211_IFTYPE_STATION:
929 he_cap_elem->mac_cap_info[1] |=
930 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
931
932 if (band == NL80211_BAND_2GHZ)
933 he_cap_elem->phy_cap_info[0] |=
934 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G;
935 else
936 he_cap_elem->phy_cap_info[0] |=
937 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G;
938
939 he_cap_elem->phy_cap_info[1] |=
940 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
941 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
942 he_cap_elem->phy_cap_info[3] |=
943 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
944 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
945 he_cap_elem->phy_cap_info[6] |=
946 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB |
947 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
948 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
949 he_cap_elem->phy_cap_info[7] |=
950 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
951 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI;
952 he_cap_elem->phy_cap_info[8] |=
953 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
954 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
955 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
956 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484;
957 he_cap_elem->phy_cap_info[9] |=
958 IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
959 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK |
960 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
961 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
962 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
963 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB;
964 break;
965 }
966
967 he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map);
968 he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map);
969 he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map_160);
970 he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map_160);
971 he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map_160);
972 he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map_160);
973
974 mt7915_set_stream_he_txbf_caps(phy, he_cap, i);
975
976 memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
977 if (he_cap_elem->phy_cap_info[6] &
978 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) {
979 mt7915_gen_ppe_thresh(he_cap->ppe_thres, nss);
980 } else {
981 he_cap_elem->phy_cap_info[9] |=
982 IEEE80211_HE_PHY_CAP9_NOMIMAL_PKT_PADDING_16US;
983 }
984
985 if (band == NL80211_BAND_6GHZ) {
986 u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS |
987 IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS;
988
989 cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_2,
990 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
991 u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
992 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
993 u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
994 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
995
996 data[idx].he_6ghz_capa.capa = cpu_to_le16(cap);
997 }
998
999 idx++;
1000 }
1001
1002 return idx;
1003}
1004
1005void mt7915_set_stream_he_caps(struct mt7915_phy *phy)
1006{
1007 struct ieee80211_sband_iftype_data *data;
1008 struct ieee80211_supported_band *band;
1009 int n;
1010
1011 if (phy->mt76->cap.has_2ghz) {
1012 data = phy->iftype[NL80211_BAND_2GHZ];
1013 n = mt7915_init_he_caps(phy, NL80211_BAND_2GHZ, data);
1014
1015 band = &phy->mt76->sband_2g.sband;
1016 band->iftype_data = data;
1017 band->n_iftype_data = n;
1018 }
1019
1020 if (phy->mt76->cap.has_5ghz) {
1021 data = phy->iftype[NL80211_BAND_5GHZ];
1022 n = mt7915_init_he_caps(phy, NL80211_BAND_5GHZ, data);
1023
1024 band = &phy->mt76->sband_5g.sband;
1025 band->iftype_data = data;
1026 band->n_iftype_data = n;
1027 }
1028
1029 if (phy->mt76->cap.has_6ghz) {
1030 data = phy->iftype[NL80211_BAND_6GHZ];
1031 n = mt7915_init_he_caps(phy, NL80211_BAND_6GHZ, data);
1032
1033 band = &phy->mt76->sband_6g.sband;
1034 band->iftype_data = data;
1035 band->n_iftype_data = n;
1036 }
1037}
1038
1039static void mt7915_unregister_ext_phy(struct mt7915_dev *dev)
1040{
1041 struct mt7915_phy *phy = mt7915_ext_phy(dev);
1042 struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1];
1043
1044 if (!phy)
1045 return;
1046
1047 mt7915_unregister_thermal(phy);
1048 mt76_unregister_phy(mphy);
1049 ieee80211_free_hw(mphy->hw);
1050}
1051
1052static void mt7915_stop_hardware(struct mt7915_dev *dev)
1053{
1054 mt7915_mcu_exit(dev);
1055 mt7915_tx_token_put(dev);
1056 mt7915_dma_cleanup(dev);
1057 tasklet_disable(&dev->irq_tasklet);
1058
1059 if (is_mt7986(&dev->mt76))
1060 mt7986_wmac_disable(dev);
1061}
1062
1063
1064int mt7915_register_device(struct mt7915_dev *dev)
1065{
1066 struct ieee80211_hw *hw = mt76_hw(dev);
1067 struct mt7915_phy *phy2;
1068 int ret;
1069
1070 dev->phy.dev = dev;
1071 dev->phy.mt76 = &dev->mt76.phy;
1072 dev->mt76.phy.priv = &dev->phy;
1073 INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work);
1074 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work);
1075 INIT_LIST_HEAD(&dev->sta_rc_list);
1076 INIT_LIST_HEAD(&dev->sta_poll_list);
1077 INIT_LIST_HEAD(&dev->twt_list);
1078 spin_lock_init(&dev->sta_poll_lock);
1079
1080 init_waitqueue_head(&dev->reset_wait);
1081 INIT_WORK(&dev->reset_work, mt7915_mac_reset_work);
1082
1083 dev->dbdc_support = mt7915_band_config(dev);
1084
1085 phy2 = mt7915_alloc_ext_phy(dev);
1086 if (IS_ERR(phy2))
1087 return PTR_ERR(phy2);
1088
1089 ret = mt7915_init_hardware(dev, phy2);
1090 if (ret)
1091 goto free_phy2;
1092
1093 mt7915_init_wiphy(hw);
1094
1095#ifdef CONFIG_NL80211_TESTMODE
1096 dev->mt76.test_ops = &mt7915_testmode_ops;
1097#endif
1098
1099 /* init led callbacks */
1100 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
1101 dev->mt76.led_cdev.brightness_set = mt7915_led_set_brightness;
1102 dev->mt76.led_cdev.blink_set = mt7915_led_set_blink;
1103 }
1104
1105 ret = mt76_register_device(&dev->mt76, true, mt76_rates,
1106 ARRAY_SIZE(mt76_rates));
1107 if (ret)
1108 goto stop_hw;
1109
1110 ret = mt7915_thermal_init(&dev->phy);
1111 if (ret)
1112 goto unreg_dev;
1113
1114 ieee80211_queue_work(mt76_hw(dev), &dev->init_work);
1115
1116 if (phy2) {
1117 ret = mt7915_register_ext_phy(dev, phy2);
1118 if (ret)
1119 goto unreg_thermal;
1120 }
1121
1122 mt7915_init_debugfs(&dev->phy);
1123
1124 return 0;
1125
1126unreg_thermal:
1127 mt7915_unregister_thermal(&dev->phy);
1128unreg_dev:
1129 mt76_unregister_device(&dev->mt76);
1130stop_hw:
1131 mt7915_stop_hardware(dev);
1132free_phy2:
1133 if (phy2)
1134 ieee80211_free_hw(phy2->mt76->hw);
1135 return ret;
1136}
1137
1138void mt7915_unregister_device(struct mt7915_dev *dev)
1139{
1140 mt7915_unregister_ext_phy(dev);
1141 mt7915_unregister_thermal(&dev->phy);
1142 mt76_unregister_device(&dev->mt76);
1143 mt7915_stop_hardware(dev);
1144
1145 mt76_free_device(&dev->mt76);
1146}