developer | b11a539 | 2022-03-31 00:34:47 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: ISC |
| 2 | /* Copyright (C) 2020 MediaTek Inc. */ |
| 3 | |
| 4 | #include <linux/firmware.h> |
| 5 | #include <linux/fs.h> |
| 6 | #include "bersa.h" |
| 7 | #include "mcu.h" |
| 8 | #include "mac.h" |
| 9 | #include "eeprom.h" |
| 10 | |
| 11 | struct bersa_patch_hdr { |
| 12 | char build_date[16]; |
| 13 | char platform[4]; |
| 14 | __be32 hw_sw_ver; |
| 15 | __be32 patch_ver; |
| 16 | __be16 checksum; |
| 17 | u16 reserved; |
| 18 | struct { |
| 19 | __be32 patch_ver; |
| 20 | __be32 subsys; |
| 21 | __be32 feature; |
| 22 | __be32 n_region; |
| 23 | __be32 crc; |
| 24 | u32 reserved[11]; |
| 25 | } desc; |
| 26 | } __packed; |
| 27 | |
| 28 | struct bersa_patch_sec { |
| 29 | __be32 type; |
| 30 | __be32 offs; |
| 31 | __be32 size; |
| 32 | union { |
| 33 | __be32 spec[13]; |
| 34 | struct { |
| 35 | __be32 addr; |
| 36 | __be32 len; |
| 37 | __be32 sec_key_idx; |
| 38 | __be32 align_len; |
| 39 | u32 reserved[9]; |
| 40 | } info; |
| 41 | }; |
| 42 | } __packed; |
| 43 | |
| 44 | struct bersa_fw_trailer { |
| 45 | u8 chip_id; |
| 46 | u8 eco_code; |
| 47 | u8 n_region; |
| 48 | u8 format_ver; |
| 49 | u8 format_flag; |
| 50 | u8 reserved[2]; |
| 51 | char fw_ver[10]; |
| 52 | char build_date[15]; |
| 53 | u32 crc; |
| 54 | } __packed; |
| 55 | |
| 56 | struct bersa_fw_region { |
| 57 | __le32 decomp_crc; |
| 58 | __le32 decomp_len; |
| 59 | __le32 decomp_blk_sz; |
| 60 | u8 reserved[4]; |
| 61 | __le32 addr; |
| 62 | __le32 len; |
| 63 | u8 feature_set; |
| 64 | u8 reserved1[15]; |
| 65 | } __packed; |
| 66 | |
| 67 | #define MCU_PATCH_ADDRESS 0x200000 |
| 68 | |
| 69 | #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) |
| 70 | #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) |
| 71 | |
| 72 | static u8 |
| 73 | bersa_mcu_get_sta_nss(u16 mcs_map) |
| 74 | { |
| 75 | u8 nss; |
| 76 | |
| 77 | for (nss = 8; nss > 0; nss--) { |
| 78 | u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3; |
| 79 | |
| 80 | if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED) |
| 81 | break; |
| 82 | } |
| 83 | |
| 84 | return nss - 1; |
| 85 | } |
| 86 | |
| 87 | static void |
| 88 | bersa_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs, |
| 89 | u16 mcs_map) |
| 90 | { |
| 91 | struct bersa_sta *msta = (struct bersa_sta *)sta->drv_priv; |
| 92 | enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band; |
| 93 | const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs; |
| 94 | int nss, max_nss = sta->rx_nss > 3 ? 4 : sta->rx_nss; |
| 95 | |
| 96 | for (nss = 0; nss < max_nss; nss++) { |
| 97 | int mcs; |
| 98 | |
| 99 | switch ((mcs_map >> (2 * nss)) & 0x3) { |
| 100 | case IEEE80211_HE_MCS_SUPPORT_0_11: |
| 101 | mcs = GENMASK(11, 0); |
| 102 | break; |
| 103 | case IEEE80211_HE_MCS_SUPPORT_0_9: |
| 104 | mcs = GENMASK(9, 0); |
| 105 | break; |
| 106 | case IEEE80211_HE_MCS_SUPPORT_0_7: |
| 107 | mcs = GENMASK(7, 0); |
| 108 | break; |
| 109 | default: |
| 110 | mcs = 0; |
| 111 | } |
| 112 | |
| 113 | mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1; |
| 114 | |
| 115 | switch (mcs) { |
| 116 | case 0 ... 7: |
| 117 | mcs = IEEE80211_HE_MCS_SUPPORT_0_7; |
| 118 | break; |
| 119 | case 8 ... 9: |
| 120 | mcs = IEEE80211_HE_MCS_SUPPORT_0_9; |
| 121 | break; |
| 122 | case 10 ... 11: |
| 123 | mcs = IEEE80211_HE_MCS_SUPPORT_0_11; |
| 124 | break; |
| 125 | default: |
| 126 | mcs = IEEE80211_HE_MCS_NOT_SUPPORTED; |
| 127 | break; |
| 128 | } |
| 129 | mcs_map &= ~(0x3 << (nss * 2)); |
| 130 | mcs_map |= mcs << (nss * 2); |
| 131 | } |
| 132 | |
| 133 | *he_mcs = cpu_to_le16(mcs_map); |
| 134 | } |
| 135 | |
| 136 | static void |
| 137 | bersa_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs, |
| 138 | const u16 *mask) |
| 139 | { |
| 140 | u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map); |
| 141 | int nss, max_nss = sta->rx_nss > 3 ? 4 : sta->rx_nss; |
| 142 | u16 mcs; |
| 143 | |
| 144 | for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) { |
| 145 | switch (mcs_map & 0x3) { |
| 146 | case IEEE80211_VHT_MCS_SUPPORT_0_9: |
| 147 | mcs = GENMASK(9, 0); |
| 148 | break; |
| 149 | case IEEE80211_VHT_MCS_SUPPORT_0_8: |
| 150 | mcs = GENMASK(8, 0); |
| 151 | break; |
| 152 | case IEEE80211_VHT_MCS_SUPPORT_0_7: |
| 153 | mcs = GENMASK(7, 0); |
| 154 | break; |
| 155 | default: |
| 156 | mcs = 0; |
| 157 | } |
| 158 | |
| 159 | vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]); |
| 160 | } |
| 161 | } |
| 162 | |
| 163 | static void |
| 164 | bersa_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs, |
| 165 | const u8 *mask) |
| 166 | { |
| 167 | int nss, max_nss = sta->rx_nss > 3 ? 4 : sta->rx_nss; |
| 168 | |
| 169 | for (nss = 0; nss < max_nss; nss++) |
| 170 | ht_mcs[nss] = sta->ht_cap.mcs.rx_mask[nss] & mask[nss]; |
| 171 | } |
| 172 | |
| 173 | static int |
| 174 | bersa_mcu_parse_response(struct mt76_dev *mdev, int cmd, |
| 175 | struct sk_buff *skb, int seq) |
| 176 | { |
| 177 | struct bersa_mcu_rxd *rxd; |
| 178 | struct bersa_mcu_uni_event *event; |
| 179 | int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); |
| 180 | int ret = 0; |
| 181 | |
| 182 | if (!skb) { |
| 183 | dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", |
| 184 | cmd, seq); |
| 185 | return -ETIMEDOUT; |
| 186 | } |
| 187 | |
| 188 | rxd = (struct bersa_mcu_rxd *)skb->data; |
| 189 | if (seq != rxd->seq) |
| 190 | return -EAGAIN; |
| 191 | |
| 192 | if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) { |
| 193 | skb_pull(skb, sizeof(*rxd) - 4); |
| 194 | ret = *skb->data; |
| 195 | } else if (cmd == MCU_EXT_CMD(THERMAL_CTRL)) { |
| 196 | skb_pull(skb, sizeof(*rxd) + 4); |
| 197 | ret = le32_to_cpu(*(__le32 *)skb->data); |
| 198 | } else if ((rxd->option & MCU_UNI_CMD_EVENT) && |
| 199 | rxd->eid == MCU_UNI_EVENT_RESULT) { |
| 200 | skb_pull(skb, sizeof(*rxd)); |
| 201 | event = (struct bersa_mcu_uni_event *)skb->data; |
| 202 | ret = le32_to_cpu(event->status); |
| 203 | /* skip invalid event */ |
| 204 | if (mcu_cmd != event->cid) |
| 205 | ret = -EAGAIN; |
| 206 | } else { |
| 207 | skb_pull(skb, sizeof(struct bersa_mcu_rxd)); |
| 208 | } |
| 209 | |
| 210 | return ret; |
| 211 | } |
| 212 | |
| 213 | static int |
| 214 | bersa_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, |
| 215 | int cmd, int *wait_seq) |
| 216 | { |
| 217 | struct bersa_dev *dev = container_of(mdev, struct bersa_dev, mt76); |
| 218 | int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); |
| 219 | struct bersa_uni_txd *uni_txd; |
| 220 | struct bersa_mcu_txd *mcu_txd; |
| 221 | enum mt76_mcuq_id qid; |
| 222 | __le32 *txd; |
| 223 | u32 val; |
| 224 | u8 seq; |
| 225 | |
| 226 | /* TODO: make dynamic based on msg type */ |
| 227 | mdev->mcu.timeout = 20 * HZ; |
| 228 | |
| 229 | seq = ++dev->mt76.mcu.msg_seq & 0xf; |
| 230 | if (!seq) |
| 231 | seq = ++dev->mt76.mcu.msg_seq & 0xf; |
| 232 | |
| 233 | if (cmd == MCU_CMD(FW_SCATTER)) { |
| 234 | qid = MT_MCUQ_FWDL; |
| 235 | goto exit; |
| 236 | } |
| 237 | |
| 238 | txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd); |
| 239 | txd = (__le32 *)skb_push(skb, txd_len); |
| 240 | if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) |
| 241 | qid = MT_MCUQ_WA; |
| 242 | else |
| 243 | qid = MT_MCUQ_WM; |
| 244 | |
| 245 | val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | |
| 246 | FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | |
| 247 | FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); |
| 248 | txd[0] = cpu_to_le32(val); |
| 249 | |
| 250 | val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); |
| 251 | txd[1] = cpu_to_le32(val); |
| 252 | |
| 253 | if (cmd & __MCU_CMD_FIELD_UNI) { |
| 254 | uni_txd = (struct bersa_uni_txd *)txd; |
| 255 | uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); |
| 256 | uni_txd->cid = cpu_to_le16(mcu_cmd); |
| 257 | uni_txd->s2d_index = MCU_S2D_H2CN; |
| 258 | uni_txd->pkt_type = MCU_PKT_ID; |
| 259 | uni_txd->seq = seq; |
| 260 | |
| 261 | if (cmd & __MCU_CMD_FIELD_QUERY) |
| 262 | uni_txd->option = MCU_CMD_UNI_QUERY_ACK; |
| 263 | else |
| 264 | uni_txd->option = MCU_CMD_UNI_EXT_ACK; |
| 265 | |
| 266 | if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM)) |
| 267 | uni_txd->s2d_index = MCU_S2D_H2CN; |
| 268 | else if (cmd & __MCU_CMD_FIELD_WA) |
| 269 | uni_txd->s2d_index = MCU_S2D_H2C; |
| 270 | else if (cmd & __MCU_CMD_FIELD_WM) |
| 271 | uni_txd->s2d_index = MCU_S2D_H2N; |
| 272 | |
| 273 | goto exit; |
| 274 | } |
| 275 | |
| 276 | mcu_txd = (struct bersa_mcu_txd *)txd; |
| 277 | mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); |
| 278 | mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, |
| 279 | MT_TX_MCU_PORT_RX_Q0)); |
| 280 | mcu_txd->pkt_type = MCU_PKT_ID; |
| 281 | mcu_txd->seq = seq; |
| 282 | |
| 283 | mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); |
| 284 | mcu_txd->set_query = MCU_Q_NA; |
| 285 | mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd); |
| 286 | if (mcu_txd->ext_cid) { |
| 287 | mcu_txd->ext_cid_ack = 1; |
| 288 | |
| 289 | /* do not use Q_SET for efuse */ |
| 290 | if (cmd & __MCU_CMD_FIELD_QUERY) |
| 291 | mcu_txd->set_query = MCU_Q_QUERY; |
| 292 | else |
| 293 | mcu_txd->set_query = MCU_Q_SET; |
| 294 | } |
| 295 | |
| 296 | if (cmd & __MCU_CMD_FIELD_WA) |
| 297 | mcu_txd->s2d_index = MCU_S2D_H2C; |
| 298 | else |
| 299 | mcu_txd->s2d_index = MCU_S2D_H2N; |
| 300 | |
| 301 | exit: |
| 302 | if (wait_seq) |
| 303 | *wait_seq = seq; |
| 304 | |
| 305 | return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0); |
| 306 | } |
| 307 | |
| 308 | int bersa_mcu_wa_cmd(struct bersa_dev *dev, int cmd, u32 a1, u32 a2, u32 a3) |
| 309 | { |
| 310 | struct { |
| 311 | __le32 args[3]; |
| 312 | } req = { |
| 313 | .args = { |
| 314 | cpu_to_le32(a1), |
| 315 | cpu_to_le32(a2), |
| 316 | cpu_to_le32(a3), |
| 317 | }, |
| 318 | }; |
| 319 | |
| 320 | return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false); |
| 321 | } |
| 322 | |
| 323 | static void |
| 324 | bersa_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) |
| 325 | { |
| 326 | if (vif->csa_active) |
| 327 | ieee80211_csa_finish(vif); |
| 328 | } |
| 329 | |
| 330 | static void |
| 331 | bersa_mcu_rx_thermal_notify(struct bersa_dev *dev, struct sk_buff *skb) |
| 332 | { |
| 333 | struct mt76_phy *mphy = &dev->mt76.phy; |
| 334 | struct bersa_mcu_thermal_notify *t; |
| 335 | struct bersa_phy *phy; |
| 336 | |
| 337 | t = (struct bersa_mcu_thermal_notify *)skb->data; |
| 338 | if (t->ctrl.ctrl_id != THERMAL_PROTECT_ENABLE) |
| 339 | return; |
| 340 | |
| 341 | mphy = mt76_dev_phy_by_band(&dev->mt76, t->ctrl.ctrl_id); |
| 342 | |
| 343 | phy = (struct bersa_phy *)mphy->priv; |
| 344 | phy->throttle_state = t->ctrl.duty.duty_cycle; |
| 345 | } |
| 346 | |
| 347 | static void |
| 348 | bersa_mcu_rx_radar_detected(struct bersa_dev *dev, struct sk_buff *skb) |
| 349 | { |
| 350 | struct mt76_phy *mphy = &dev->mt76.phy; |
| 351 | struct bersa_mcu_rdd_report *r; |
| 352 | |
| 353 | r = (struct bersa_mcu_rdd_report *)skb->data; |
| 354 | |
| 355 | mphy = mt76_dev_phy_by_band(&dev->mt76, r->band_idx); |
| 356 | |
| 357 | if (r->band_idx == MT_RX_SEL2) |
| 358 | cfg80211_background_radar_event(mphy->hw->wiphy, |
| 359 | &dev->rdd2_chandef, |
| 360 | GFP_ATOMIC); |
| 361 | else |
| 362 | ieee80211_radar_detected(mphy->hw); |
| 363 | dev->hw_pattern++; |
| 364 | } |
| 365 | |
| 366 | static void |
| 367 | bersa_mcu_rx_log_message(struct bersa_dev *dev, struct sk_buff *skb) |
| 368 | { |
| 369 | #define UNI_EVENT_FW_LOG_FORMAT 0 |
| 370 | struct bersa_mcu_rxd *rxd = (struct bersa_mcu_rxd *)skb->data; |
| 371 | const char *data = (char *)&rxd[1] + 4, *type; |
| 372 | struct tlv *tlv = (struct tlv *)data; |
| 373 | int len; |
| 374 | |
| 375 | if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT) |
| 376 | return; |
| 377 | |
| 378 | data += sizeof(*tlv) + 4; |
| 379 | len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4; |
| 380 | |
| 381 | switch (rxd->s2d_index) { |
| 382 | case 0: |
| 383 | if (bersa_debugfs_rx_log(dev, data, len)) |
| 384 | return; |
| 385 | |
| 386 | type = "WM"; |
| 387 | break; |
| 388 | case 2: |
| 389 | type = "WA"; |
| 390 | break; |
| 391 | default: |
| 392 | type = "unknown"; |
| 393 | break; |
| 394 | } |
| 395 | |
| 396 | wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data); |
| 397 | } |
| 398 | |
| 399 | static void |
| 400 | bersa_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) |
| 401 | { |
| 402 | if (!vif->color_change_active) |
| 403 | return; |
| 404 | |
| 405 | ieee80211_color_change_finish(vif); |
| 406 | } |
| 407 | |
| 408 | static void |
| 409 | bersa_mcu_ie_countdown(struct bersa_dev *dev, struct sk_buff *skb) |
| 410 | { |
| 411 | #define UNI_EVENT_IE_COUNTDOWN_CSA 0 |
| 412 | #define UNI_EVENT_IE_COUNTDOWN_BCC 1 |
| 413 | struct header { |
| 414 | u8 band; |
| 415 | u8 rsv[3]; |
| 416 | }; |
| 417 | struct mt76_phy *mphy = &dev->mt76.phy; |
| 418 | struct bersa_mcu_rxd *rxd = (struct bersa_mcu_rxd *)skb->data; |
| 419 | const char *data = (char *)&rxd[1], *tail; |
| 420 | struct header *hdr = (struct header *) data; |
| 421 | struct tlv *tlv = (struct tlv *)(data + 4); |
| 422 | int len; |
| 423 | |
| 424 | if ((hdr->band && !dev->phy.band_idx) && dev->mt76.phy2) |
| 425 | mphy = dev->mt76.phy2; |
| 426 | |
| 427 | tail = skb->data + le16_to_cpu(rxd->len); |
| 428 | while (data + sizeof(struct tlv) < tail && le16_to_cpu(tlv->len)) { |
| 429 | switch (le16_to_cpu(tlv->tag)) { |
| 430 | case UNI_EVENT_IE_COUNTDOWN_CSA: |
| 431 | ieee80211_iterate_active_interfaces_atomic(mphy->hw, |
| 432 | IEEE80211_IFACE_ITER_RESUME_ALL, |
| 433 | bersa_mcu_csa_finish, mphy->hw); |
| 434 | break; |
| 435 | case UNI_EVENT_IE_COUNTDOWN_BCC: |
| 436 | ieee80211_iterate_active_interfaces_atomic(mphy->hw, |
| 437 | IEEE80211_IFACE_ITER_RESUME_ALL, |
| 438 | bersa_mcu_cca_finish, mphy->hw); |
| 439 | break; |
| 440 | } |
| 441 | |
| 442 | data += le16_to_cpu(tlv->len); |
| 443 | tlv = (struct tlv *)data; |
| 444 | } |
| 445 | } |
| 446 | |
| 447 | #if 0 |
| 448 | static void |
| 449 | bersa_mcu_rx_ext_event(struct bersa_dev *dev, struct sk_buff *skb) |
| 450 | { |
| 451 | struct bersa_mcu_rxd *rxd = (struct bersa_mcu_rxd *)skb->data; |
| 452 | |
| 453 | switch (rxd->ext_eid) { |
| 454 | case MCU_EXT_EVENT_THERMAL_PROTECT: |
| 455 | bersa_mcu_rx_thermal_notify(dev, skb); |
| 456 | break; |
| 457 | case MCU_EXT_EVENT_RDD_REPORT: |
| 458 | bersa_mcu_rx_radar_detected(dev, skb); |
| 459 | break; |
| 460 | case MCU_EXT_EVENT_CSA_NOTIFY: |
| 461 | bersa_mcu_rx_csa_notify(dev, skb); |
| 462 | break; |
| 463 | case MCU_EXT_EVENT_BCC_NOTIFY: |
| 464 | ieee80211_iterate_active_interfaces_atomic(dev->mt76.hw, |
| 465 | IEEE80211_IFACE_ITER_RESUME_ALL, |
| 466 | bersa_mcu_cca_finish, dev); |
| 467 | break; |
| 468 | default: |
| 469 | break; |
| 470 | } |
| 471 | } |
| 472 | |
| 473 | static void |
| 474 | bersa_mcu_rx_unsolicited_event(struct bersa_dev *dev, struct sk_buff *skb) |
| 475 | { |
| 476 | struct bersa_mcu_rxd *rxd = (struct bersa_mcu_rxd *)skb->data; |
| 477 | |
| 478 | switch (rxd->eid) { |
| 479 | case MCU_EVENT_EXT: |
| 480 | bersa_mcu_rx_ext_event(dev, skb); |
| 481 | break; |
| 482 | default: |
| 483 | break; |
| 484 | } |
| 485 | dev_kfree_skb(skb); |
| 486 | } |
| 487 | #endif |
| 488 | |
| 489 | static void |
| 490 | bersa_mcu_uni_rx_unsolicited_event(struct bersa_dev *dev, struct sk_buff *skb) |
| 491 | { |
| 492 | struct bersa_mcu_rxd *rxd = (struct bersa_mcu_rxd *)skb->data; |
| 493 | |
| 494 | switch (rxd->eid) { |
| 495 | case MCU_UNI_EVENT_FW_LOG_2_HOST: |
| 496 | bersa_mcu_rx_log_message(dev, skb); |
| 497 | break; |
| 498 | case MCU_UNI_EVENT_IE_COUNTDOWN: |
| 499 | bersa_mcu_ie_countdown(dev, skb); |
| 500 | break; |
| 501 | default: |
| 502 | break; |
| 503 | } |
| 504 | dev_kfree_skb(skb); |
| 505 | } |
| 506 | |
| 507 | void bersa_mcu_rx_event(struct bersa_dev *dev, struct sk_buff *skb) |
| 508 | { |
| 509 | struct bersa_mcu_rxd *rxd = (struct bersa_mcu_rxd *)skb->data; |
| 510 | |
| 511 | if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) { |
| 512 | bersa_mcu_uni_rx_unsolicited_event(dev, skb); |
| 513 | return; |
| 514 | } |
| 515 | |
| 516 | /* TODO: to be changed to uni cmd */ |
| 517 | /* if (!(rxd->option & MCU_UNI_CMD_UNI_EVENT) && */ |
| 518 | /* (rxd->ext_eid == MCU_EXT_EVENT_THERMAL_PROTECT || */ |
| 519 | /* rxd->ext_eid == MCU_EXT_EVENT_ASSERT_DUMP || */ |
| 520 | /* rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC || */ |
| 521 | /* rxd->ext_eid == MCU_EXT_EVENT_BCC_NOTIFY || */ |
| 522 | /* !rxd->seq)) { */ |
| 523 | /* bersa_mcu_rx_unsolicited_event(dev, skb); */ |
| 524 | /* return; */ |
| 525 | /* } */ |
| 526 | |
| 527 | mt76_mcu_rx_event(&dev->mt76, skb); |
| 528 | } |
| 529 | |
| 530 | static struct tlv * |
| 531 | bersa_mcu_add_uni_tlv(struct sk_buff *skb, int tag, int len) |
| 532 | { |
| 533 | struct tlv *ptlv, tlv = { |
| 534 | .tag = cpu_to_le16(tag), |
| 535 | .len = cpu_to_le16(len), |
| 536 | }; |
| 537 | |
| 538 | ptlv = skb_put(skb, len); |
| 539 | memcpy(ptlv, &tlv, sizeof(tlv)); |
| 540 | |
| 541 | return ptlv; |
| 542 | } |
| 543 | |
| 544 | /** bss info **/ |
| 545 | struct bersa_he_obss_narrow_bw_ru_data { |
| 546 | bool tolerated; |
| 547 | }; |
| 548 | |
| 549 | static inline u8 bersa_get_band(enum nl80211_band band) |
| 550 | { |
| 551 | static const u8 convert_to_fw[] = { |
| 552 | [NL80211_BAND_2GHZ] = CMD_BAND_24G, |
| 553 | [NL80211_BAND_5GHZ] = CMD_BAND_5G, |
| 554 | [NL80211_BAND_6GHZ] = CMD_BAND_6G, |
| 555 | }; |
| 556 | |
| 557 | if (band >= ARRAY_SIZE(convert_to_fw)) |
| 558 | return 0; |
| 559 | |
| 560 | return convert_to_fw[band]; |
| 561 | } |
| 562 | |
| 563 | static void |
| 564 | bersa_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, |
| 565 | struct bersa_phy *phy) |
| 566 | { |
| 567 | struct cfg80211_chan_def *chandef = &phy->mt76->chandef; |
| 568 | struct bss_rlm_tlv *ch; |
| 569 | struct tlv *tlv; |
| 570 | int freq1 = chandef->center_freq1; |
| 571 | |
| 572 | tlv = bersa_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch)); |
| 573 | |
| 574 | ch = (struct bss_rlm_tlv *)tlv; |
| 575 | ch->control_channel = chandef->chan->hw_value; |
| 576 | ch->center_chan = ieee80211_frequency_to_channel(freq1); |
| 577 | ch->bw = mt76_connac_chan_bw(chandef); |
| 578 | ch->tx_streams = hweight8(phy->mt76->antenna_mask); |
| 579 | ch->rx_streams = hweight8(phy->mt76->antenna_mask); |
| 580 | ch->band = bersa_get_band(chandef->chan->band); |
| 581 | |
| 582 | if (chandef->width == NL80211_CHAN_WIDTH_80P80) { |
| 583 | int freq2 = chandef->center_freq2; |
| 584 | |
| 585 | ch->center_chan2 = ieee80211_frequency_to_channel(freq2); |
| 586 | } |
| 587 | } |
| 588 | |
| 589 | static void |
| 590 | bersa_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, |
| 591 | struct bersa_phy *phy) |
| 592 | { |
| 593 | struct bss_ra_tlv *ra; |
| 594 | struct tlv *tlv; |
| 595 | |
| 596 | tlv = bersa_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra)); |
| 597 | |
| 598 | ra = (struct bss_ra_tlv *)tlv; |
| 599 | ra->short_preamble = true; |
| 600 | } |
| 601 | |
| 602 | static void |
| 603 | bersa_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, |
| 604 | struct bersa_phy *phy) |
| 605 | { |
| 606 | #define DEFAULT_HE_PE_DURATION 4 |
| 607 | #define DEFAULT_HE_DURATION_RTS_THRES 1023 |
| 608 | const struct ieee80211_sta_he_cap *cap; |
| 609 | struct bss_info_uni_he *he; |
| 610 | struct tlv *tlv; |
| 611 | |
| 612 | cap = mt76_connac_get_he_phy_cap(phy->mt76, vif); |
| 613 | |
| 614 | tlv = bersa_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he)); |
| 615 | |
| 616 | he = (struct bss_info_uni_he *)tlv; |
| 617 | he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext; |
| 618 | if (!he->he_pe_duration) |
| 619 | he->he_pe_duration = DEFAULT_HE_PE_DURATION; |
| 620 | |
| 621 | he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th); |
| 622 | if (!he->he_rts_thres) |
| 623 | he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); |
| 624 | |
| 625 | he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; |
| 626 | he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; |
| 627 | he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; |
| 628 | } |
| 629 | |
| 630 | static void |
| 631 | bersa_mcu_bss_bmc_tlv(struct sk_buff *skb, struct bersa_phy *phy) |
| 632 | { |
| 633 | struct bss_rate_tlv *bmc; |
| 634 | struct cfg80211_chan_def *chandef = &phy->mt76->chandef; |
| 635 | enum nl80211_band band = chandef->chan->band; |
| 636 | struct tlv *tlv; |
| 637 | |
| 638 | tlv = bersa_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc)); |
| 639 | |
| 640 | bmc = (struct bss_rate_tlv *)tlv; |
| 641 | if (band == NL80211_BAND_2GHZ) { |
| 642 | bmc->short_preamble = true; |
| 643 | } else { |
| 644 | bmc->bc_trans = cpu_to_le16(0x8080); |
| 645 | bmc->mc_trans = cpu_to_le16(0x8080); |
| 646 | bmc->bc_fixed_rate = 1; |
| 647 | bmc->mc_fixed_rate = 1; |
| 648 | bmc->short_preamble = 1; |
| 649 | } |
| 650 | } |
| 651 | |
| 652 | static void |
| 653 | bersa_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en) |
| 654 | { |
| 655 | struct bss_txcmd_tlv *txcmd; |
| 656 | struct tlv *tlv; |
| 657 | |
| 658 | tlv = bersa_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd)); |
| 659 | |
| 660 | txcmd = (struct bss_txcmd_tlv *)tlv; |
| 661 | txcmd->txcmd_mode = en; |
| 662 | } |
| 663 | |
| 664 | static void |
| 665 | bersa_mcu_bss_mld_tlv(struct sk_buff *skb) |
| 666 | { |
| 667 | struct bss_mld_tlv *mld; |
| 668 | struct tlv *tlv; |
| 669 | |
| 670 | tlv = bersa_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld)); |
| 671 | |
| 672 | mld = (struct bss_mld_tlv *)tlv; |
| 673 | mld->group_mld_id = 0xff; |
| 674 | mld->remap_idx = 0xff; |
| 675 | } |
| 676 | |
| 677 | static void |
| 678 | bersa_mcu_bss_sec_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) |
| 679 | { |
| 680 | struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; |
| 681 | struct bss_sec_tlv *sec; |
| 682 | struct tlv *tlv; |
| 683 | |
| 684 | tlv = bersa_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec)); |
| 685 | |
| 686 | sec = (struct bss_sec_tlv *)tlv; |
| 687 | sec->cipher = mvif->cipher; |
| 688 | } |
| 689 | |
| 690 | static int |
| 691 | bersa_mcu_muar_config(struct bersa_phy *phy, struct ieee80211_vif *vif, |
| 692 | bool bssid, bool enable) |
| 693 | { |
| 694 | struct bersa_dev *dev = phy->dev; |
| 695 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 696 | u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START; |
| 697 | u32 mask = phy->omac_mask >> 32 & ~BIT(idx); |
| 698 | const u8 *addr = vif->addr; |
| 699 | struct { |
| 700 | u8 mode; |
| 701 | u8 force_clear; |
| 702 | u8 clear_bitmap[8]; |
| 703 | u8 entry_count; |
| 704 | u8 write; |
| 705 | u8 band; |
| 706 | |
| 707 | u8 index; |
| 708 | u8 bssid; |
| 709 | u8 addr[ETH_ALEN]; |
| 710 | } __packed req = { |
| 711 | .mode = !!mask || enable, |
| 712 | .entry_count = 1, |
| 713 | .write = 1, |
| 714 | .band = phy->band_idx, |
| 715 | .index = idx * 2 + bssid, |
| 716 | }; |
| 717 | |
| 718 | if (bssid) |
| 719 | addr = vif->bss_conf.bssid; |
| 720 | |
| 721 | if (enable) |
| 722 | ether_addr_copy(req.addr, addr); |
| 723 | |
| 724 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MUAR_UPDATE), &req, |
| 725 | sizeof(req), true); |
| 726 | } |
| 727 | |
| 728 | static int |
| 729 | bersa_mcu_bss_basic_tlv(struct sk_buff *skb, |
| 730 | struct ieee80211_vif *vif, |
| 731 | struct ieee80211_sta *sta, |
| 732 | struct mt76_phy *phy, u16 wlan_idx, |
| 733 | bool enable) |
| 734 | { |
| 735 | struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; |
| 736 | struct cfg80211_chan_def *chandef = &phy->chandef; |
| 737 | struct mt76_connac_bss_basic_tlv *bss; |
| 738 | struct tlv *tlv; |
| 739 | u32 type; |
| 740 | int idx; |
| 741 | |
| 742 | switch (vif->type) { |
| 743 | case NL80211_IFTYPE_MESH_POINT: |
| 744 | case NL80211_IFTYPE_AP: |
| 745 | case NL80211_IFTYPE_MONITOR: |
| 746 | type = CONNECTION_INFRA_AP; |
| 747 | break; |
| 748 | case NL80211_IFTYPE_STATION: |
| 749 | if (enable) { |
| 750 | rcu_read_lock(); |
| 751 | if (!sta) |
| 752 | sta = ieee80211_find_sta(vif, |
| 753 | vif->bss_conf.bssid); |
| 754 | /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ |
| 755 | if (sta) { |
| 756 | struct mt76_wcid *wcid; |
| 757 | |
| 758 | wcid = (struct mt76_wcid *)sta->drv_priv; |
| 759 | wlan_idx = wcid->idx; |
| 760 | } |
| 761 | rcu_read_unlock(); |
| 762 | } |
| 763 | type = CONNECTION_INFRA_STA; |
| 764 | break; |
| 765 | case NL80211_IFTYPE_ADHOC: |
| 766 | type = CONNECTION_IBSS_ADHOC; |
| 767 | break; |
| 768 | default: |
| 769 | WARN_ON(1); |
| 770 | break; |
| 771 | } |
| 772 | |
| 773 | tlv = bersa_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss)); |
| 774 | |
| 775 | bss = (struct mt76_connac_bss_basic_tlv *)tlv; |
| 776 | bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); |
| 777 | bss->dtim_period = vif->bss_conf.dtim_period; |
| 778 | bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx); |
| 779 | bss->sta_idx = cpu_to_le16(wlan_idx); |
| 780 | bss->conn_type = cpu_to_le32(type); |
| 781 | bss->omac_idx = mvif->omac_idx; |
| 782 | bss->band_idx = mvif->band_idx; |
| 783 | bss->wmm_idx = mvif->wmm_idx; |
| 784 | bss->conn_state = !enable; |
| 785 | bss->active = enable; |
| 786 | |
| 787 | idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; |
| 788 | bss->hw_bss_idx = idx; |
| 789 | |
| 790 | if (vif->type != NL80211_IFTYPE_MONITOR) { |
| 791 | memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN); |
| 792 | bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); |
| 793 | bss->dtim_period = vif->bss_conf.dtim_period; |
| 794 | bss->phymode = mt76_connac_get_phy_mode(phy, vif, |
| 795 | chandef->chan->band, NULL); |
| 796 | } else { |
| 797 | memcpy(bss->bssid, phy->macaddr, ETH_ALEN); |
| 798 | } |
| 799 | |
| 800 | if (chandef->chan->band == NL80211_BAND_6GHZ) |
| 801 | bss->phymode_ext |= BIT(0); |
| 802 | |
| 803 | return 0; |
| 804 | } |
| 805 | |
| 806 | static struct sk_buff * |
| 807 | __bersa_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif *mvif, int len) |
| 808 | { |
| 809 | struct bss_req_hdr hdr = { |
| 810 | .bss_idx = mvif->idx, |
| 811 | }; |
| 812 | struct sk_buff *skb; |
| 813 | |
| 814 | skb = mt76_mcu_msg_alloc(dev, NULL, len); |
| 815 | if (!skb) |
| 816 | return ERR_PTR(-ENOMEM); |
| 817 | |
| 818 | skb_put_data(skb, &hdr, sizeof(hdr)); |
| 819 | |
| 820 | return skb; |
| 821 | } |
| 822 | |
| 823 | int bersa_mcu_add_bss_info(struct bersa_phy *phy, |
| 824 | struct ieee80211_vif *vif, int enable) |
| 825 | { |
| 826 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 827 | struct bersa_dev *dev = phy->dev; |
| 828 | struct sk_buff *skb; |
| 829 | |
| 830 | if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) { |
| 831 | bersa_mcu_muar_config(phy, vif, false, enable); |
| 832 | bersa_mcu_muar_config(phy, vif, true, enable); |
| 833 | } |
| 834 | |
| 835 | skb = __bersa_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, |
| 836 | BERSA_BSS_UPDATE_MAX_SIZE); |
| 837 | if (IS_ERR(skb)) |
| 838 | return PTR_ERR(skb); |
| 839 | |
| 840 | /* bss_basic must be first */ |
| 841 | bersa_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76, |
| 842 | mvif->sta.wcid.idx, enable); |
| 843 | bersa_mcu_bss_sec_tlv(skb, vif); |
| 844 | |
| 845 | if (vif->type == NL80211_IFTYPE_MONITOR) |
| 846 | goto out; |
| 847 | |
| 848 | if (enable) { |
| 849 | bersa_mcu_bss_rfch_tlv(skb, vif, phy); |
| 850 | bersa_mcu_bss_bmc_tlv(skb, phy); |
| 851 | bersa_mcu_bss_ra_tlv(skb, vif, phy); |
| 852 | bersa_mcu_bss_txcmd_tlv(skb, true); |
| 853 | |
| 854 | if (vif->bss_conf.he_support) |
| 855 | bersa_mcu_bss_he_tlv(skb, vif, phy); |
| 856 | |
| 857 | /* all besra ic need this tlv, no matter it supports EHT or not */ |
| 858 | bersa_mcu_bss_mld_tlv(skb); |
| 859 | } |
| 860 | out: |
| 861 | return mt76_mcu_skb_send_msg(&dev->mt76, skb, |
| 862 | MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); |
| 863 | } |
| 864 | |
| 865 | int bersa_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, |
| 866 | struct ieee80211_ampdu_params *params, |
| 867 | bool enable, bool tx) |
| 868 | { |
| 869 | struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv; |
| 870 | struct uni_sta_rec_ba *ba; |
| 871 | struct sk_buff *skb; |
| 872 | struct tlv *tlv; |
| 873 | |
| 874 | skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); |
| 875 | if (IS_ERR(skb)) |
| 876 | return PTR_ERR(skb); |
| 877 | |
| 878 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); |
| 879 | |
| 880 | ba = (struct uni_sta_rec_ba *)tlv; |
| 881 | ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; |
| 882 | ba->winsize = cpu_to_le16(params->buf_size); |
| 883 | ba->ssn = cpu_to_le16(params->ssn); |
| 884 | ba->ba_en = enable << params->tid; |
| 885 | ba->amsdu = params->amsdu; |
| 886 | ba->tid = params->tid; |
| 887 | |
| 888 | return mt76_mcu_skb_send_msg(dev, skb, |
| 889 | MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); |
| 890 | } |
| 891 | |
| 892 | /** starec & wtbl **/ |
| 893 | int bersa_mcu_add_tx_ba(struct bersa_dev *dev, |
| 894 | struct ieee80211_ampdu_params *params, |
| 895 | bool enable) |
| 896 | { |
| 897 | struct bersa_sta *msta = (struct bersa_sta *)params->sta->drv_priv; |
| 898 | struct bersa_vif *mvif = msta->vif; |
| 899 | |
| 900 | if (enable && !params->amsdu) |
| 901 | msta->wcid.amsdu = false; |
| 902 | |
| 903 | return bersa_mcu_sta_ba(&dev->mt76, &mvif->mt76, params, |
| 904 | enable, true); |
| 905 | } |
| 906 | |
| 907 | int bersa_mcu_add_rx_ba(struct bersa_dev *dev, |
| 908 | struct ieee80211_ampdu_params *params, |
| 909 | bool enable) |
| 910 | { |
| 911 | struct bersa_sta *msta = (struct bersa_sta *)params->sta->drv_priv; |
| 912 | struct bersa_vif *mvif = msta->vif; |
| 913 | |
| 914 | return bersa_mcu_sta_ba(&dev->mt76, &mvif->mt76, params, |
| 915 | enable, false); |
| 916 | } |
| 917 | |
| 918 | static void |
| 919 | bersa_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, |
| 920 | struct ieee80211_vif *vif) |
| 921 | { |
| 922 | struct ieee80211_he_cap_elem *elem = &sta->he_cap.he_cap_elem; |
| 923 | struct ieee80211_he_mcs_nss_supp mcs_map; |
| 924 | struct sta_rec_he_v2 *he; |
| 925 | struct tlv *tlv; |
| 926 | int i = 0; |
| 927 | |
| 928 | if (!sta->he_cap.has_he) |
| 929 | return; |
| 930 | |
| 931 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he)); |
| 932 | |
| 933 | he = (struct sta_rec_he_v2 *)tlv; |
| 934 | for (i = 0; i < 11; i++){ |
| 935 | if (i < 6) |
| 936 | he->he_mac_cap[i] = cpu_to_le16(elem->mac_cap_info[i]); |
| 937 | he->he_phy_cap[i] = cpu_to_le16(elem->phy_cap_info[i]); |
| 938 | } |
| 939 | |
| 940 | mcs_map = sta->he_cap.he_mcs_nss_supp; |
| 941 | switch (sta->bandwidth) { |
| 942 | case IEEE80211_STA_RX_BW_160: |
| 943 | if (elem->phy_cap_info[0] & |
| 944 | IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) |
| 945 | bersa_mcu_set_sta_he_mcs(sta, |
| 946 | &he->max_nss_mcs[CMD_HE_MCS_BW8080], |
| 947 | le16_to_cpu(mcs_map.rx_mcs_80p80)); |
| 948 | |
| 949 | bersa_mcu_set_sta_he_mcs(sta, |
| 950 | &he->max_nss_mcs[CMD_HE_MCS_BW160], |
| 951 | le16_to_cpu(mcs_map.rx_mcs_160)); |
| 952 | fallthrough; |
| 953 | default: |
| 954 | bersa_mcu_set_sta_he_mcs(sta, |
| 955 | &he->max_nss_mcs[CMD_HE_MCS_BW80], |
| 956 | le16_to_cpu(mcs_map.rx_mcs_80)); |
| 957 | break; |
| 958 | } |
| 959 | |
| 960 | he->pkt_ext = 2; |
| 961 | } |
| 962 | |
| 963 | static void |
| 964 | bersa_mcu_sta_he_6g_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, |
| 965 | struct ieee80211_vif *vif) |
| 966 | { |
| 967 | struct sta_rec_he_6g_capa *he_6g; |
| 968 | struct tlv *tlv; |
| 969 | |
| 970 | if (!sta->he_6ghz_capa.capa) |
| 971 | return; |
| 972 | |
| 973 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g)); |
| 974 | |
| 975 | he_6g = (struct sta_rec_he_6g_capa *)tlv; |
| 976 | he_6g->capa = cpu_to_le16(sta->he_6ghz_capa.capa); |
| 977 | |
| 978 | } |
| 979 | |
| 980 | static void |
| 981 | bersa_mcu_sta_muru_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, |
| 982 | struct ieee80211_vif *vif) |
| 983 | { |
| 984 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 985 | struct ieee80211_he_cap_elem *elem = &sta->he_cap.he_cap_elem; |
| 986 | struct sta_rec_muru *muru; |
| 987 | struct tlv *tlv; |
| 988 | |
| 989 | if (vif->type != NL80211_IFTYPE_STATION && |
| 990 | vif->type != NL80211_IFTYPE_AP) |
| 991 | return; |
| 992 | |
| 993 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru)); |
| 994 | |
| 995 | muru = (struct sta_rec_muru *)tlv; |
| 996 | |
| 997 | muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer || |
| 998 | mvif->cap.vht_mu_ebfer || |
| 999 | mvif->cap.vht_mu_ebfee; |
| 1000 | muru->cfg.mimo_ul_en = true; |
| 1001 | muru->cfg.ofdma_dl_en = true; |
| 1002 | |
| 1003 | muru->mimo_dl.vht_mu_bfee = |
| 1004 | !!(sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); |
| 1005 | |
| 1006 | if (sta->vht_cap.vht_supported) |
| 1007 | muru->mimo_dl.vht_mu_bfee = |
| 1008 | !!(sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); |
| 1009 | |
| 1010 | if (!sta->he_cap.has_he) |
| 1011 | return; |
| 1012 | |
| 1013 | muru->mimo_dl.partial_bw_dl_mimo = |
| 1014 | HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]); |
| 1015 | |
| 1016 | muru->cfg.mimo_ul_en = true; |
| 1017 | muru->mimo_ul.full_ul_mimo = |
| 1018 | HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]); |
| 1019 | muru->mimo_ul.partial_ul_mimo = |
| 1020 | HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]); |
| 1021 | |
| 1022 | muru->cfg.ofdma_dl_en = true; |
| 1023 | muru->ofdma_dl.punc_pream_rx = |
| 1024 | HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); |
| 1025 | muru->ofdma_dl.he_20m_in_40m_2g = |
| 1026 | HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]); |
| 1027 | muru->ofdma_dl.he_20m_in_160m = |
| 1028 | HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); |
| 1029 | muru->ofdma_dl.he_80m_in_160m = |
| 1030 | HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); |
| 1031 | |
| 1032 | muru->ofdma_ul.t_frame_dur = |
| 1033 | HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); |
| 1034 | muru->ofdma_ul.mu_cascading = |
| 1035 | HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]); |
| 1036 | muru->ofdma_ul.uo_ra = |
| 1037 | HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]); |
| 1038 | } |
| 1039 | |
| 1040 | static void |
| 1041 | bersa_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) |
| 1042 | { |
| 1043 | struct sta_rec_ht *ht; |
| 1044 | struct tlv *tlv; |
| 1045 | |
| 1046 | if (!sta->ht_cap.ht_supported) |
| 1047 | return; |
| 1048 | |
| 1049 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); |
| 1050 | |
| 1051 | ht = (struct sta_rec_ht *)tlv; |
| 1052 | ht->ht_cap = cpu_to_le16(sta->ht_cap.cap); |
| 1053 | } |
| 1054 | |
| 1055 | static void |
| 1056 | bersa_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) |
| 1057 | { |
| 1058 | struct sta_rec_vht *vht; |
| 1059 | struct tlv *tlv; |
| 1060 | |
| 1061 | if (!sta->vht_cap.vht_supported) |
| 1062 | return; |
| 1063 | |
| 1064 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); |
| 1065 | |
| 1066 | vht = (struct sta_rec_vht *)tlv; |
| 1067 | vht->vht_cap = cpu_to_le32(sta->vht_cap.cap); |
| 1068 | vht->vht_rx_mcs_map = sta->vht_cap.vht_mcs.rx_mcs_map; |
| 1069 | vht->vht_tx_mcs_map = sta->vht_cap.vht_mcs.tx_mcs_map; |
| 1070 | } |
| 1071 | |
| 1072 | static void |
| 1073 | bersa_mcu_sta_amsdu_tlv(struct bersa_dev *dev, struct sk_buff *skb, |
| 1074 | struct ieee80211_vif *vif, struct ieee80211_sta *sta) |
| 1075 | { |
| 1076 | struct bersa_sta *msta = (struct bersa_sta *)sta->drv_priv; |
| 1077 | struct sta_rec_amsdu *amsdu; |
| 1078 | struct tlv *tlv; |
| 1079 | |
| 1080 | if (vif->type != NL80211_IFTYPE_STATION && |
| 1081 | vif->type != NL80211_IFTYPE_AP) |
| 1082 | return; |
| 1083 | |
| 1084 | if (!sta->max_amsdu_len) |
| 1085 | return; |
| 1086 | |
| 1087 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); |
| 1088 | amsdu = (struct sta_rec_amsdu *)tlv; |
| 1089 | amsdu->max_amsdu_num = 8; |
| 1090 | amsdu->amsdu_en = true; |
| 1091 | msta->wcid.amsdu = true; |
| 1092 | |
| 1093 | switch (sta->max_amsdu_len) { |
| 1094 | case IEEE80211_MAX_MPDU_LEN_VHT_11454: |
| 1095 | amsdu->max_mpdu_size = |
| 1096 | IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; |
| 1097 | return; |
| 1098 | case IEEE80211_MAX_MPDU_LEN_HT_7935: |
| 1099 | case IEEE80211_MAX_MPDU_LEN_VHT_7991: |
| 1100 | amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; |
| 1101 | return; |
| 1102 | default: |
| 1103 | amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; |
| 1104 | return; |
| 1105 | } |
| 1106 | } |
| 1107 | |
| 1108 | #if 0 |
| 1109 | static int |
| 1110 | bersa_mcu_sta_wtbl_tlv(struct bersa_dev *dev, struct sk_buff *skb, |
| 1111 | struct ieee80211_vif *vif, struct ieee80211_sta *sta) |
| 1112 | { |
| 1113 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1114 | struct bersa_sta *msta; |
| 1115 | struct wtbl_req_hdr *wtbl_hdr; |
| 1116 | struct mt76_wcid *wcid; |
| 1117 | struct tlv *tlv; |
| 1118 | |
| 1119 | msta = sta ? (struct bersa_sta *)sta->drv_priv : &mvif->sta; |
| 1120 | wcid = sta ? &msta->wcid : NULL; |
| 1121 | |
| 1122 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv)); |
| 1123 | wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid, |
| 1124 | WTBL_RESET_AND_SET, tlv, |
| 1125 | &skb); |
| 1126 | if (IS_ERR(wtbl_hdr)) |
| 1127 | return PTR_ERR(wtbl_hdr); |
| 1128 | |
| 1129 | mt76_connac_mcu_wtbl_generic_tlv(&dev->mt76, skb, vif, sta, tlv, |
| 1130 | wtbl_hdr); |
| 1131 | mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, tlv, wtbl_hdr); |
| 1132 | if (sta) |
| 1133 | mt76_connac_mcu_wtbl_ht_tlv(&dev->mt76, skb, sta, tlv, |
| 1134 | wtbl_hdr, mvif->cap.ldpc); |
| 1135 | |
| 1136 | return 0; |
| 1137 | } |
| 1138 | #endif |
| 1139 | |
| 1140 | static inline bool |
| 1141 | bersa_is_ebf_supported(struct bersa_phy *phy, struct ieee80211_vif *vif, |
| 1142 | struct ieee80211_sta *sta, bool bfee) |
| 1143 | { |
| 1144 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1145 | int tx_ant = hweight8(phy->mt76->chainmask) - 1; |
| 1146 | |
| 1147 | if (vif->type != NL80211_IFTYPE_STATION && |
| 1148 | vif->type != NL80211_IFTYPE_AP) |
| 1149 | return false; |
| 1150 | |
| 1151 | if (!bfee && tx_ant < 2) |
| 1152 | return false; |
| 1153 | |
| 1154 | if (sta->he_cap.has_he) { |
| 1155 | struct ieee80211_he_cap_elem *pe = &sta->he_cap.he_cap_elem; |
| 1156 | |
| 1157 | if (bfee) |
| 1158 | return mvif->cap.he_su_ebfee && |
| 1159 | HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); |
| 1160 | else |
| 1161 | return mvif->cap.he_su_ebfer && |
| 1162 | HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]); |
| 1163 | } |
| 1164 | |
| 1165 | if (sta->vht_cap.vht_supported) { |
| 1166 | u32 cap = sta->vht_cap.cap; |
| 1167 | |
| 1168 | if (bfee) |
| 1169 | return mvif->cap.vht_su_ebfee && |
| 1170 | (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); |
| 1171 | else |
| 1172 | return mvif->cap.vht_su_ebfer && |
| 1173 | (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE); |
| 1174 | } |
| 1175 | |
| 1176 | return false; |
| 1177 | } |
| 1178 | |
| 1179 | static void |
| 1180 | bersa_mcu_sta_sounding_rate(struct sta_rec_bf *bf) |
| 1181 | { |
| 1182 | bf->sounding_phy = MT_PHY_TYPE_OFDM; |
| 1183 | bf->ndp_rate = 0; /* mcs0 */ |
| 1184 | bf->ndpa_rate = BERSA_CFEND_RATE_DEFAULT; /* ofdm 24m */ |
| 1185 | bf->rept_poll_rate = BERSA_CFEND_RATE_DEFAULT; /* ofdm 24m */ |
| 1186 | } |
| 1187 | |
| 1188 | static void |
| 1189 | bersa_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct bersa_phy *phy, |
| 1190 | struct sta_rec_bf *bf) |
| 1191 | { |
| 1192 | struct ieee80211_mcs_info *mcs = &sta->ht_cap.mcs; |
| 1193 | u8 n = 0; |
| 1194 | |
| 1195 | bf->tx_mode = MT_PHY_TYPE_HT; |
| 1196 | |
| 1197 | if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) && |
| 1198 | (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED)) |
| 1199 | n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK, |
| 1200 | mcs->tx_params); |
| 1201 | else if (mcs->rx_mask[3]) |
| 1202 | n = 3; |
| 1203 | else if (mcs->rx_mask[2]) |
| 1204 | n = 2; |
| 1205 | else if (mcs->rx_mask[1]) |
| 1206 | n = 1; |
| 1207 | |
| 1208 | bf->nrow = hweight8(phy->mt76->chainmask) - 1; |
| 1209 | bf->ncol = min_t(u8, bf->nrow, n); |
| 1210 | bf->ibf_ncol = n; |
| 1211 | } |
| 1212 | |
| 1213 | static void |
| 1214 | bersa_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct bersa_phy *phy, |
| 1215 | struct sta_rec_bf *bf, bool explicit) |
| 1216 | { |
| 1217 | struct ieee80211_sta_vht_cap *pc = &sta->vht_cap; |
| 1218 | struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap; |
| 1219 | u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map); |
| 1220 | u8 nss_mcs = bersa_mcu_get_sta_nss(mcs_map); |
| 1221 | u8 tx_ant = hweight8(phy->mt76->chainmask) - 1; |
| 1222 | |
| 1223 | bf->tx_mode = MT_PHY_TYPE_VHT; |
| 1224 | |
| 1225 | if (explicit) { |
| 1226 | u8 sts, snd_dim; |
| 1227 | |
| 1228 | bersa_mcu_sta_sounding_rate(bf); |
| 1229 | |
| 1230 | sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, |
| 1231 | pc->cap); |
| 1232 | snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, |
| 1233 | vc->cap); |
| 1234 | bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant); |
| 1235 | bf->ncol = min_t(u8, nss_mcs, bf->nrow); |
| 1236 | bf->ibf_ncol = bf->ncol; |
| 1237 | |
| 1238 | if (sta->bandwidth == IEEE80211_STA_RX_BW_160) |
| 1239 | bf->nrow = 1; |
| 1240 | } else { |
| 1241 | bf->nrow = tx_ant; |
| 1242 | bf->ncol = min_t(u8, nss_mcs, bf->nrow); |
| 1243 | bf->ibf_ncol = nss_mcs; |
| 1244 | |
| 1245 | if (sta->bandwidth == IEEE80211_STA_RX_BW_160) |
| 1246 | bf->ibf_nrow = 1; |
| 1247 | } |
| 1248 | } |
| 1249 | |
| 1250 | static void |
| 1251 | bersa_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif, |
| 1252 | struct bersa_phy *phy, struct sta_rec_bf *bf) |
| 1253 | { |
| 1254 | struct ieee80211_sta_he_cap *pc = &sta->he_cap; |
| 1255 | struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; |
| 1256 | const struct ieee80211_sta_he_cap *vc = |
| 1257 | mt76_connac_get_he_phy_cap(phy->mt76, vif); |
| 1258 | const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem; |
| 1259 | u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80); |
| 1260 | u8 nss_mcs = bersa_mcu_get_sta_nss(mcs_map); |
| 1261 | u8 snd_dim, sts; |
| 1262 | |
| 1263 | bf->tx_mode = MT_PHY_TYPE_HE_SU; |
| 1264 | |
| 1265 | bersa_mcu_sta_sounding_rate(bf); |
| 1266 | |
| 1267 | bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB, |
| 1268 | pe->phy_cap_info[6]); |
| 1269 | bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB, |
| 1270 | pe->phy_cap_info[6]); |
| 1271 | snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, |
| 1272 | ve->phy_cap_info[5]); |
| 1273 | sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK, |
| 1274 | pe->phy_cap_info[4]); |
| 1275 | bf->nrow = min_t(u8, snd_dim, sts); |
| 1276 | bf->ncol = min_t(u8, nss_mcs, bf->nrow); |
| 1277 | bf->ibf_ncol = bf->ncol; |
| 1278 | |
| 1279 | if (sta->bandwidth != IEEE80211_STA_RX_BW_160) |
| 1280 | return; |
| 1281 | |
| 1282 | /* go over for 160MHz and 80p80 */ |
| 1283 | if (pe->phy_cap_info[0] & |
| 1284 | IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) { |
| 1285 | mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160); |
| 1286 | nss_mcs = bersa_mcu_get_sta_nss(mcs_map); |
| 1287 | |
| 1288 | bf->ncol_bw160 = nss_mcs; |
| 1289 | } |
| 1290 | |
| 1291 | if (pe->phy_cap_info[0] & |
| 1292 | IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) { |
| 1293 | mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80); |
| 1294 | nss_mcs = bersa_mcu_get_sta_nss(mcs_map); |
| 1295 | |
| 1296 | if (bf->ncol_bw160) |
| 1297 | bf->ncol_bw160 = min_t(u8, bf->ncol_bw160, nss_mcs); |
| 1298 | else |
| 1299 | bf->ncol_bw160 = nss_mcs; |
| 1300 | } |
| 1301 | |
| 1302 | snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, |
| 1303 | ve->phy_cap_info[5]); |
| 1304 | sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK, |
| 1305 | pe->phy_cap_info[4]); |
| 1306 | |
| 1307 | bf->nrow_bw160 = min_t(int, snd_dim, sts); |
| 1308 | } |
| 1309 | |
| 1310 | static void |
| 1311 | bersa_mcu_sta_bfer_tlv(struct bersa_dev *dev, struct sk_buff *skb, |
| 1312 | struct ieee80211_vif *vif, struct ieee80211_sta *sta) |
| 1313 | { |
| 1314 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1315 | struct bersa_phy *phy = mvif->phy; |
| 1316 | int tx_ant = hweight8(phy->mt76->chainmask) - 1; |
| 1317 | struct sta_rec_bf *bf; |
| 1318 | struct tlv *tlv; |
| 1319 | const u8 matrix[4][4] = { |
| 1320 | {0, 0, 0, 0}, |
| 1321 | {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */ |
| 1322 | {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */ |
| 1323 | {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */ |
| 1324 | }; |
| 1325 | bool ebf; |
| 1326 | |
| 1327 | if (!(sta->ht_cap.ht_supported || sta->he_cap.has_he)) |
| 1328 | return; |
| 1329 | |
| 1330 | ebf = bersa_is_ebf_supported(phy, vif, sta, false); |
| 1331 | if (!ebf && !dev->ibf) |
| 1332 | return; |
| 1333 | |
| 1334 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); |
| 1335 | bf = (struct sta_rec_bf *)tlv; |
| 1336 | |
| 1337 | /* he: eBF only, in accordance with spec |
| 1338 | * vht: support eBF and iBF |
| 1339 | * ht: iBF only, since mac80211 lacks of eBF support |
| 1340 | */ |
| 1341 | if (sta->he_cap.has_he && ebf) |
| 1342 | bersa_mcu_sta_bfer_he(sta, vif, phy, bf); |
| 1343 | else if (sta->vht_cap.vht_supported) |
| 1344 | bersa_mcu_sta_bfer_vht(sta, phy, bf, ebf); |
| 1345 | else if (sta->ht_cap.ht_supported) |
| 1346 | bersa_mcu_sta_bfer_ht(sta, phy, bf); |
| 1347 | else |
| 1348 | return; |
| 1349 | |
| 1350 | bf->bf_cap = ebf ? ebf : dev->ibf << 1; |
| 1351 | bf->bw = sta->bandwidth; |
| 1352 | bf->ibf_dbw = sta->bandwidth; |
| 1353 | bf->ibf_nrow = tx_ant; |
| 1354 | |
| 1355 | if (!ebf && sta->bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol) |
| 1356 | bf->ibf_timeout = 0x48; |
| 1357 | else |
| 1358 | bf->ibf_timeout = 0x18; |
| 1359 | |
| 1360 | if (ebf && bf->nrow != tx_ant) |
| 1361 | bf->mem_20m = matrix[tx_ant][bf->ncol]; |
| 1362 | else |
| 1363 | bf->mem_20m = matrix[bf->nrow][bf->ncol]; |
| 1364 | |
| 1365 | switch (sta->bandwidth) { |
| 1366 | case IEEE80211_STA_RX_BW_160: |
| 1367 | case IEEE80211_STA_RX_BW_80: |
| 1368 | bf->mem_total = bf->mem_20m * 2; |
| 1369 | break; |
| 1370 | case IEEE80211_STA_RX_BW_40: |
| 1371 | bf->mem_total = bf->mem_20m; |
| 1372 | break; |
| 1373 | case IEEE80211_STA_RX_BW_20: |
| 1374 | default: |
| 1375 | break; |
| 1376 | } |
| 1377 | } |
| 1378 | |
| 1379 | static void |
| 1380 | bersa_mcu_sta_bfee_tlv(struct bersa_dev *dev, struct sk_buff *skb, |
| 1381 | struct ieee80211_vif *vif, struct ieee80211_sta *sta) |
| 1382 | { |
| 1383 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1384 | struct bersa_phy *phy = mvif->phy; |
| 1385 | int tx_ant = hweight8(phy->mt76->chainmask) - 1; |
| 1386 | struct sta_rec_bfee *bfee; |
| 1387 | struct tlv *tlv; |
| 1388 | u8 nrow = 0; |
| 1389 | |
| 1390 | if (!(sta->vht_cap.vht_supported || sta->he_cap.has_he)) |
| 1391 | return; |
| 1392 | |
| 1393 | if (!bersa_is_ebf_supported(phy, vif, sta, true)) |
| 1394 | return; |
| 1395 | |
| 1396 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); |
| 1397 | bfee = (struct sta_rec_bfee *)tlv; |
| 1398 | |
| 1399 | if (sta->he_cap.has_he) { |
| 1400 | struct ieee80211_he_cap_elem *pe = &sta->he_cap.he_cap_elem; |
| 1401 | |
| 1402 | nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, |
| 1403 | pe->phy_cap_info[5]); |
| 1404 | } else if (sta->vht_cap.vht_supported) { |
| 1405 | struct ieee80211_sta_vht_cap *pc = &sta->vht_cap; |
| 1406 | |
| 1407 | nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, |
| 1408 | pc->cap); |
| 1409 | } |
| 1410 | |
| 1411 | /* reply with identity matrix to avoid 2x2 BF negative gain */ |
| 1412 | bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2); |
| 1413 | } |
| 1414 | |
| 1415 | static void |
| 1416 | bersa_mcu_sta_phy_tlv(struct bersa_dev *dev, struct sk_buff *skb, |
| 1417 | struct ieee80211_vif *vif, struct ieee80211_sta *sta) |
| 1418 | { |
| 1419 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1420 | struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef; |
| 1421 | enum nl80211_band band = chandef->chan->band; |
| 1422 | struct mt76_phy *mphy = &dev->mphy; |
| 1423 | struct sta_rec_phy *phy; |
| 1424 | struct tlv *tlv; |
| 1425 | u8 af, mm; |
| 1426 | |
| 1427 | if (!sta->ht_cap.ht_supported && !sta->he_6ghz_capa.capa) |
| 1428 | return; |
| 1429 | |
| 1430 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy)); |
| 1431 | |
| 1432 | phy = (struct sta_rec_phy *)tlv; |
| 1433 | phy->phy_type = mt76_connac_get_phy_mode_v2(mphy, vif, band, sta); |
| 1434 | phy->basic_rate = cpu_to_le16((u16)vif->bss_conf.basic_rates); |
| 1435 | if (sta->ht_cap.ht_supported) { |
| 1436 | af = sta->ht_cap.ampdu_factor; |
| 1437 | mm = sta->ht_cap.ampdu_density; |
| 1438 | } else { |
| 1439 | af = le16_get_bits(sta->he_6ghz_capa.capa, |
| 1440 | IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); |
| 1441 | mm = le16_get_bits(sta->he_6ghz_capa.capa, |
| 1442 | IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START); |
| 1443 | } |
| 1444 | |
| 1445 | phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR, af) | |
| 1446 | FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY, mm); |
| 1447 | } |
| 1448 | |
| 1449 | static enum mcu_mmps_mode |
| 1450 | bersa_mcu_get_mmps_mode(enum ieee80211_smps_mode smps) |
| 1451 | { |
| 1452 | switch (smps) { |
| 1453 | case IEEE80211_SMPS_OFF: |
| 1454 | return MCU_MMPS_DISABLE; |
| 1455 | case IEEE80211_SMPS_STATIC: |
| 1456 | return MCU_MMPS_STATIC; |
| 1457 | case IEEE80211_SMPS_DYNAMIC: |
| 1458 | return MCU_MMPS_DYNAMIC; |
| 1459 | default: |
| 1460 | return MCU_MMPS_DISABLE; |
| 1461 | } |
| 1462 | } |
| 1463 | |
| 1464 | int bersa_mcu_set_fixed_rate_ctrl(struct bersa_dev *dev, |
| 1465 | struct ieee80211_vif *vif, |
| 1466 | struct ieee80211_sta *sta, |
| 1467 | void *data, u32 field) |
| 1468 | { |
| 1469 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1470 | struct bersa_sta *msta = (struct bersa_sta *)sta->drv_priv; |
| 1471 | struct sta_phy *phy = data; |
| 1472 | struct sta_rec_ra_fixed *ra; |
| 1473 | struct sk_buff *skb; |
| 1474 | struct tlv *tlv; |
| 1475 | |
| 1476 | skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, |
| 1477 | &msta->wcid); |
| 1478 | if (IS_ERR(skb)) |
| 1479 | return PTR_ERR(skb); |
| 1480 | |
| 1481 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); |
| 1482 | ra = (struct sta_rec_ra_fixed *)tlv; |
| 1483 | |
| 1484 | switch (field) { |
| 1485 | case RATE_PARAM_AUTO: |
| 1486 | break; |
| 1487 | case RATE_PARAM_FIXED: |
| 1488 | case RATE_PARAM_FIXED_MCS: |
| 1489 | case RATE_PARAM_FIXED_GI: |
| 1490 | case RATE_PARAM_FIXED_HE_LTF: |
| 1491 | if (phy) |
| 1492 | ra->phy = *phy; |
| 1493 | break; |
| 1494 | case RATE_PARAM_MMPS_UPDATE: |
| 1495 | ra->mmps_mode = bersa_mcu_get_mmps_mode(sta->smps_mode); |
| 1496 | break; |
| 1497 | default: |
| 1498 | break; |
| 1499 | } |
| 1500 | ra->field = cpu_to_le32(field); |
| 1501 | |
| 1502 | return mt76_mcu_skb_send_msg(&dev->mt76, skb, |
| 1503 | MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); |
| 1504 | } |
| 1505 | |
| 1506 | int bersa_mcu_add_smps(struct bersa_dev *dev, struct ieee80211_vif *vif, |
| 1507 | struct ieee80211_sta *sta) |
| 1508 | { |
| 1509 | #if 0 |
| 1510 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1511 | struct bersa_sta *msta = (struct bersa_sta *)sta->drv_priv; |
| 1512 | struct wtbl_req_hdr *wtbl_hdr; |
| 1513 | struct tlv *sta_wtbl; |
| 1514 | struct sk_buff *skb; |
| 1515 | int ret; |
| 1516 | |
| 1517 | skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, |
| 1518 | &msta->wcid); |
| 1519 | if (IS_ERR(skb)) |
| 1520 | return PTR_ERR(skb); |
| 1521 | |
| 1522 | sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, |
| 1523 | sizeof(struct tlv)); |
| 1524 | wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid, |
| 1525 | WTBL_SET, sta_wtbl, &skb); |
| 1526 | if (IS_ERR(wtbl_hdr)) |
| 1527 | return PTR_ERR(wtbl_hdr); |
| 1528 | |
| 1529 | mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_hdr); |
| 1530 | |
| 1531 | ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, |
| 1532 | MCU_EXT_CMD(STA_REC_UPDATE), true); |
| 1533 | if (ret) |
| 1534 | return ret; |
| 1535 | #endif |
| 1536 | printk("Remove smps tag in wtbl. Todo: check it is corrected or not"); |
| 1537 | |
| 1538 | return bersa_mcu_set_fixed_rate_ctrl(dev, vif, sta, NULL, |
| 1539 | RATE_PARAM_MMPS_UPDATE); |
| 1540 | } |
| 1541 | |
| 1542 | static int |
| 1543 | bersa_mcu_add_rate_ctrl_fixed(struct bersa_dev *dev, |
| 1544 | struct ieee80211_vif *vif, |
| 1545 | struct ieee80211_sta *sta) |
| 1546 | { |
| 1547 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1548 | struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef; |
| 1549 | struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask; |
| 1550 | enum nl80211_band band = chandef->chan->band; |
| 1551 | struct sta_phy phy = {}; |
| 1552 | int ret, nrates = 0; |
| 1553 | |
| 1554 | #define __sta_phy_bitrate_mask_check(_mcs, _gi, _he) \ |
| 1555 | do { \ |
| 1556 | u8 i, gi = mask->control[band]._gi; \ |
| 1557 | gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \ |
| 1558 | for (i = 0; i <= sta->bandwidth; i++) { \ |
| 1559 | phy.sgi |= gi << (i << (_he)); \ |
| 1560 | phy.he_ltf |= mask->control[band].he_ltf << (i << (_he));\ |
| 1561 | } \ |
| 1562 | for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \ |
| 1563 | if (!mask->control[band]._mcs[i]) \ |
| 1564 | continue; \ |
| 1565 | nrates += hweight16(mask->control[band]._mcs[i]); \ |
| 1566 | phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \ |
| 1567 | } \ |
| 1568 | } while (0) |
| 1569 | |
| 1570 | if (sta->he_cap.has_he) { |
| 1571 | __sta_phy_bitrate_mask_check(he_mcs, he_gi, 1); |
| 1572 | } else if (sta->vht_cap.vht_supported) { |
| 1573 | __sta_phy_bitrate_mask_check(vht_mcs, gi, 0); |
| 1574 | } else if (sta->ht_cap.ht_supported) { |
| 1575 | __sta_phy_bitrate_mask_check(ht_mcs, gi, 0); |
| 1576 | } else { |
| 1577 | nrates = hweight32(mask->control[band].legacy); |
| 1578 | phy.mcs = ffs(mask->control[band].legacy) - 1; |
| 1579 | } |
| 1580 | #undef __sta_phy_bitrate_mask_check |
| 1581 | |
| 1582 | /* fall back to auto rate control */ |
| 1583 | if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI && |
| 1584 | mask->control[band].he_gi == GENMASK(7, 0) && |
| 1585 | mask->control[band].he_ltf == GENMASK(7, 0) && |
| 1586 | nrates != 1) |
| 1587 | return 0; |
| 1588 | |
| 1589 | /* fixed single rate */ |
| 1590 | if (nrates == 1) { |
| 1591 | ret = bersa_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy, |
| 1592 | RATE_PARAM_FIXED_MCS); |
| 1593 | if (ret) |
| 1594 | return ret; |
| 1595 | } |
| 1596 | |
| 1597 | /* fixed GI */ |
| 1598 | if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI || |
| 1599 | mask->control[band].he_gi != GENMASK(7, 0)) { |
| 1600 | struct bersa_sta *msta = (struct bersa_sta *)sta->drv_priv; |
| 1601 | u32 addr; |
| 1602 | |
| 1603 | /* firmware updates only TXCMD but doesn't take WTBL into |
| 1604 | * account, so driver should update here to reflect the |
| 1605 | * actual txrate hardware sends out. |
| 1606 | */ |
| 1607 | addr = bersa_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7); |
| 1608 | if (sta->he_cap.has_he) |
| 1609 | mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi); |
| 1610 | else |
| 1611 | mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi); |
| 1612 | |
| 1613 | ret = bersa_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy, |
| 1614 | RATE_PARAM_FIXED_GI); |
| 1615 | if (ret) |
| 1616 | return ret; |
| 1617 | } |
| 1618 | |
| 1619 | /* fixed HE_LTF */ |
| 1620 | if (mask->control[band].he_ltf != GENMASK(7, 0)) { |
| 1621 | ret = bersa_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy, |
| 1622 | RATE_PARAM_FIXED_HE_LTF); |
| 1623 | if (ret) |
| 1624 | return ret; |
| 1625 | } |
| 1626 | |
| 1627 | return 0; |
| 1628 | } |
| 1629 | |
| 1630 | static void |
| 1631 | bersa_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct bersa_dev *dev, |
| 1632 | struct ieee80211_vif *vif, struct ieee80211_sta *sta) |
| 1633 | { |
| 1634 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1635 | struct mt76_phy *mphy = mvif->phy->mt76; |
| 1636 | struct cfg80211_chan_def *chandef = &mphy->chandef; |
| 1637 | struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask; |
| 1638 | enum nl80211_band band = chandef->chan->band; |
| 1639 | struct sta_rec_ra *ra; |
| 1640 | struct tlv *tlv; |
| 1641 | u32 supp_rate = sta->supp_rates[band]; |
| 1642 | u32 cap = sta->wme ? STA_CAP_WMM : 0; |
| 1643 | |
| 1644 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); |
| 1645 | ra = (struct sta_rec_ra *)tlv; |
| 1646 | |
| 1647 | ra->valid = true; |
| 1648 | ra->auto_rate = true; |
| 1649 | ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, sta); |
| 1650 | ra->channel = chandef->chan->hw_value; |
| 1651 | ra->bw = sta->bandwidth; |
| 1652 | ra->phy.bw = sta->bandwidth; |
| 1653 | ra->mmps_mode = bersa_mcu_get_mmps_mode(sta->smps_mode); |
| 1654 | |
| 1655 | if (supp_rate) { |
| 1656 | supp_rate &= mask->control[band].legacy; |
| 1657 | ra->rate_len = hweight32(supp_rate); |
| 1658 | |
| 1659 | if (band == NL80211_BAND_2GHZ) { |
| 1660 | ra->supp_mode = MODE_CCK; |
| 1661 | ra->supp_cck_rate = supp_rate & GENMASK(3, 0); |
| 1662 | |
| 1663 | if (ra->rate_len > 4) { |
| 1664 | ra->supp_mode |= MODE_OFDM; |
| 1665 | ra->supp_ofdm_rate = supp_rate >> 4; |
| 1666 | } |
| 1667 | } else { |
| 1668 | ra->supp_mode = MODE_OFDM; |
| 1669 | ra->supp_ofdm_rate = supp_rate; |
| 1670 | } |
| 1671 | } |
| 1672 | |
| 1673 | if (sta->ht_cap.ht_supported) { |
| 1674 | ra->supp_mode |= MODE_HT; |
| 1675 | ra->af = sta->ht_cap.ampdu_factor; |
| 1676 | ra->ht_gf = !!(sta->ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD); |
| 1677 | |
| 1678 | cap |= STA_CAP_HT; |
| 1679 | if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) |
| 1680 | cap |= STA_CAP_SGI_20; |
| 1681 | if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) |
| 1682 | cap |= STA_CAP_SGI_40; |
| 1683 | if (sta->ht_cap.cap & IEEE80211_HT_CAP_TX_STBC) |
| 1684 | cap |= STA_CAP_TX_STBC; |
| 1685 | if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) |
| 1686 | cap |= STA_CAP_RX_STBC; |
| 1687 | if (mvif->cap.ldpc && |
| 1688 | (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)) |
| 1689 | cap |= STA_CAP_LDPC; |
| 1690 | |
| 1691 | bersa_mcu_set_sta_ht_mcs(sta, ra->ht_mcs, |
| 1692 | mask->control[band].ht_mcs); |
| 1693 | ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs; |
| 1694 | } |
| 1695 | |
| 1696 | if (sta->vht_cap.vht_supported) { |
| 1697 | u8 af; |
| 1698 | |
| 1699 | ra->supp_mode |= MODE_VHT; |
| 1700 | af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, |
| 1701 | sta->vht_cap.cap); |
| 1702 | ra->af = max_t(u8, ra->af, af); |
| 1703 | |
| 1704 | cap |= STA_CAP_VHT; |
| 1705 | if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) |
| 1706 | cap |= STA_CAP_VHT_SGI_80; |
| 1707 | if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) |
| 1708 | cap |= STA_CAP_VHT_SGI_160; |
| 1709 | if (sta->vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC) |
| 1710 | cap |= STA_CAP_VHT_TX_STBC; |
| 1711 | if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1) |
| 1712 | cap |= STA_CAP_VHT_RX_STBC; |
| 1713 | if (mvif->cap.ldpc && |
| 1714 | (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)) |
| 1715 | cap |= STA_CAP_VHT_LDPC; |
| 1716 | |
| 1717 | bersa_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs, |
| 1718 | mask->control[band].vht_mcs); |
| 1719 | } |
| 1720 | |
| 1721 | if (sta->he_cap.has_he) { |
| 1722 | ra->supp_mode |= MODE_HE; |
| 1723 | cap |= STA_CAP_HE; |
| 1724 | |
| 1725 | if (sta->he_6ghz_capa.capa) |
| 1726 | ra->af = le16_get_bits(sta->he_6ghz_capa.capa, |
| 1727 | IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); |
| 1728 | } |
| 1729 | |
| 1730 | ra->sta_cap = cpu_to_le32(cap); |
| 1731 | } |
| 1732 | |
| 1733 | int bersa_mcu_add_rate_ctrl(struct bersa_dev *dev, struct ieee80211_vif *vif, |
| 1734 | struct ieee80211_sta *sta, bool changed) |
| 1735 | { |
| 1736 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1737 | struct bersa_sta *msta = (struct bersa_sta *)sta->drv_priv; |
| 1738 | struct sk_buff *skb; |
| 1739 | int ret; |
| 1740 | |
| 1741 | skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, |
| 1742 | &msta->wcid); |
| 1743 | if (IS_ERR(skb)) |
| 1744 | return PTR_ERR(skb); |
| 1745 | |
| 1746 | /* firmware rc algorithm refers to sta_rec_he for HE control. |
| 1747 | * once dev->rc_work changes the settings driver should also |
| 1748 | * update sta_rec_he here. |
| 1749 | */ |
| 1750 | if (sta->he_cap.has_he && changed) |
| 1751 | bersa_mcu_sta_he_tlv(skb, sta, vif); |
| 1752 | |
| 1753 | /* sta_rec_ra accommodates BW, NSS and only MCS range format |
| 1754 | * i.e 0-{7,8,9} for VHT. |
| 1755 | */ |
| 1756 | bersa_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta); |
| 1757 | |
| 1758 | ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, |
| 1759 | MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); |
| 1760 | if (ret) |
| 1761 | return ret; |
| 1762 | |
| 1763 | /* sta_rec_ra_fixed accommodates single rate, (HE)GI and HE_LTE, |
| 1764 | * and updates as peer fixed rate parameters, which overrides |
| 1765 | * sta_rec_ra and firmware rate control algorithm. |
| 1766 | */ |
| 1767 | return bersa_mcu_add_rate_ctrl_fixed(dev, vif, sta); |
| 1768 | } |
| 1769 | |
| 1770 | static int |
| 1771 | bersa_mcu_add_group(struct bersa_dev *dev, struct ieee80211_vif *vif, |
| 1772 | struct ieee80211_sta *sta) |
| 1773 | { |
| 1774 | #define MT_STA_BSS_GROUP 1 |
| 1775 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1776 | struct bersa_sta *msta; |
| 1777 | struct { |
| 1778 | /* fixed field */ |
| 1779 | u8 __rsv1[4]; |
| 1780 | /* TLV */ |
| 1781 | __le16 tag; |
| 1782 | __le16 len; |
| 1783 | __le16 wlan_idx; |
| 1784 | u8 __rsv2[2]; |
| 1785 | __le32 action; |
| 1786 | __le32 val; |
| 1787 | u8 __rsv3[8]; |
| 1788 | } __packed req = { |
| 1789 | .tag = cpu_to_le16(UNI_VOW_DRR_CTRL), |
| 1790 | .len = cpu_to_le16(sizeof(req) - 4), |
| 1791 | .action = cpu_to_le32(MT_STA_BSS_GROUP), |
| 1792 | .val = cpu_to_le32(mvif->mt76.idx % 16), |
| 1793 | }; |
| 1794 | |
| 1795 | msta = sta ? (struct bersa_sta *)sta->drv_priv : &mvif->sta; |
| 1796 | req.wlan_idx = cpu_to_le16(msta->wcid.idx); |
| 1797 | |
| 1798 | return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req, |
| 1799 | sizeof(req), true); |
| 1800 | } |
| 1801 | |
| 1802 | int bersa_mcu_add_sta(struct bersa_dev *dev, struct ieee80211_vif *vif, |
| 1803 | struct ieee80211_sta *sta, bool enable) |
| 1804 | { |
| 1805 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1806 | struct bersa_sta *msta; |
| 1807 | struct sk_buff *skb; |
| 1808 | int ret; |
| 1809 | |
| 1810 | msta = sta ? (struct bersa_sta *)sta->drv_priv : &mvif->sta; |
| 1811 | |
| 1812 | skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, |
| 1813 | &msta->wcid); |
| 1814 | if (IS_ERR(skb)) |
| 1815 | return PTR_ERR(skb); |
| 1816 | |
| 1817 | /* starec basic */ |
| 1818 | mt76_connac_mcu_sta_basic_tlv(skb, vif, sta, enable, true); |
| 1819 | if (!enable) |
| 1820 | goto out; |
| 1821 | |
| 1822 | /* tag order is in accordance with firmware dependency. */ |
| 1823 | if (sta) { |
| 1824 | /* starec phy */ |
| 1825 | if (mt76_chip(&dev->mt76) != 0x7902) |
| 1826 | bersa_mcu_sta_phy_tlv(dev, skb, vif, sta); |
| 1827 | /* starec bfer */ |
| 1828 | bersa_mcu_sta_bfer_tlv(dev, skb, vif, sta); |
| 1829 | /* starec ht */ |
| 1830 | bersa_mcu_sta_ht_tlv(skb, sta); |
| 1831 | /* starec vht */ |
| 1832 | bersa_mcu_sta_vht_tlv(skb, sta); |
| 1833 | /* starec uapsd */ |
| 1834 | mt76_connac_mcu_sta_uapsd(skb, vif, sta); |
| 1835 | /* starec amsdu */ |
| 1836 | bersa_mcu_sta_amsdu_tlv(dev, skb, vif, sta); |
| 1837 | /* starec he */ |
| 1838 | bersa_mcu_sta_he_tlv(skb, sta, vif); |
| 1839 | /* starec he 6g*/ |
| 1840 | bersa_mcu_sta_he_6g_tlv(skb, sta, vif); |
| 1841 | /* starec muru */ |
| 1842 | bersa_mcu_sta_muru_tlv(skb, sta, vif); |
| 1843 | /* starec bfee */ |
| 1844 | bersa_mcu_sta_bfee_tlv(dev, skb, vif, sta); |
| 1845 | } |
| 1846 | |
| 1847 | ret = bersa_mcu_add_group(dev, vif, sta); |
| 1848 | if (ret) { |
| 1849 | dev_kfree_skb(skb); |
| 1850 | return ret; |
| 1851 | } |
| 1852 | out: |
| 1853 | return mt76_mcu_skb_send_msg(&dev->mt76, skb, |
| 1854 | MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); |
| 1855 | } |
| 1856 | |
| 1857 | static int |
| 1858 | bersa_mcu_sta_key_tlv(struct mt76_wcid *wcid, |
| 1859 | struct mt76_connac_sta_key_conf *sta_key_conf, |
| 1860 | struct sk_buff *skb, |
| 1861 | struct ieee80211_key_conf *key, |
| 1862 | enum set_key_cmd cmd) |
| 1863 | { |
| 1864 | struct uni_sta_rec_sec *sec; |
| 1865 | struct tlv *tlv; |
| 1866 | |
| 1867 | tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); |
| 1868 | sec = (struct uni_sta_rec_sec *)tlv; |
| 1869 | sec->add = cmd; |
| 1870 | |
| 1871 | if (cmd == SET_KEY) { |
| 1872 | struct uni_sec_key *sec_key; |
| 1873 | u8 cipher; |
| 1874 | |
| 1875 | cipher = mt76_connac_mcu_get_cipher(key->cipher); |
| 1876 | if (cipher == MCU_CIPHER_NONE) |
| 1877 | return -EOPNOTSUPP; |
| 1878 | |
| 1879 | sec_key = &sec->key[0]; |
| 1880 | sec_key->cipher_len = sizeof(*sec_key); |
| 1881 | |
| 1882 | if (cipher == MCU_CIPHER_BIP_CMAC_128) { |
| 1883 | sec_key->wlan_idx = cpu_to_le16(wcid->idx); |
| 1884 | sec_key->cipher_id = MCU_CIPHER_AES_CCMP; |
| 1885 | sec_key->key_id = sta_key_conf->keyidx; |
| 1886 | sec_key->key_len = 16; |
| 1887 | memcpy(sec_key->key, sta_key_conf->key, 16); |
| 1888 | |
| 1889 | sec_key = &sec->key[1]; |
| 1890 | sec_key->wlan_idx = cpu_to_le16(wcid->idx); |
| 1891 | sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128; |
| 1892 | sec_key->cipher_len = sizeof(*sec_key); |
| 1893 | sec_key->key_len = 16; |
| 1894 | memcpy(sec_key->key, key->key, 16); |
| 1895 | sec->n_cipher = 2; |
| 1896 | } else { |
| 1897 | sec_key->wlan_idx = cpu_to_le16(wcid->idx); |
| 1898 | sec_key->cipher_id = cipher; |
| 1899 | sec_key->key_id = key->keyidx; |
| 1900 | sec_key->key_len = key->keylen; |
| 1901 | memcpy(sec_key->key, key->key, key->keylen); |
| 1902 | |
| 1903 | if (cipher == MCU_CIPHER_TKIP) { |
| 1904 | /* Rx/Tx MIC keys are swapped */ |
| 1905 | memcpy(sec_key->key + 16, key->key + 24, 8); |
| 1906 | memcpy(sec_key->key + 24, key->key + 16, 8); |
| 1907 | } |
| 1908 | |
| 1909 | /* store key_conf for BIP batch update */ |
| 1910 | if (cipher == MCU_CIPHER_AES_CCMP) { |
| 1911 | memcpy(sta_key_conf->key, key->key, key->keylen); |
| 1912 | sta_key_conf->keyidx = key->keyidx; |
| 1913 | } |
| 1914 | |
| 1915 | sec->n_cipher = 1; |
| 1916 | } |
| 1917 | } else { |
| 1918 | sec->n_cipher = 0; |
| 1919 | } |
| 1920 | |
| 1921 | return 0; |
| 1922 | } |
| 1923 | |
| 1924 | int bersa_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, |
| 1925 | struct mt76_connac_sta_key_conf *sta_key_conf, |
| 1926 | struct ieee80211_key_conf *key, int mcu_cmd, |
| 1927 | struct mt76_wcid *wcid, enum set_key_cmd cmd) |
| 1928 | { |
| 1929 | struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; |
| 1930 | struct sk_buff *skb; |
| 1931 | int ret; |
| 1932 | |
| 1933 | skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); |
| 1934 | if (IS_ERR(skb)) |
| 1935 | return PTR_ERR(skb); |
| 1936 | |
| 1937 | ret = bersa_mcu_sta_key_tlv(wcid, sta_key_conf, skb, key, cmd); |
| 1938 | if (ret) |
| 1939 | return ret; |
| 1940 | |
| 1941 | return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); |
| 1942 | } |
| 1943 | |
| 1944 | int bersa_mcu_add_dev_info(struct bersa_phy *phy, |
| 1945 | struct ieee80211_vif *vif, bool enable) |
| 1946 | { |
| 1947 | struct bersa_dev *dev = phy->dev; |
| 1948 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 1949 | struct { |
| 1950 | struct req_hdr { |
| 1951 | u8 omac_idx; |
| 1952 | u8 dbdc_idx; |
| 1953 | u8 __rsv[2]; |
| 1954 | } __packed hdr; |
| 1955 | struct req_tlv { |
| 1956 | __le16 tag; |
| 1957 | __le16 len; |
| 1958 | u8 active; |
| 1959 | u8 __rsv; |
| 1960 | u8 omac_addr[ETH_ALEN]; |
| 1961 | } __packed tlv; |
| 1962 | } data = { |
| 1963 | .hdr = { |
| 1964 | .omac_idx = mvif->mt76.omac_idx, |
| 1965 | .dbdc_idx = mvif->mt76.band_idx, |
| 1966 | }, |
| 1967 | .tlv = { |
| 1968 | .tag = cpu_to_le16(DEV_INFO_ACTIVE), |
| 1969 | .len = cpu_to_le16(sizeof(struct req_tlv)), |
| 1970 | .active = enable, |
| 1971 | }, |
| 1972 | }; |
| 1973 | |
| 1974 | if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) |
| 1975 | return bersa_mcu_muar_config(phy, vif, false, enable); |
| 1976 | |
| 1977 | memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN); |
| 1978 | return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE), |
| 1979 | &data, sizeof(data), true); |
| 1980 | } |
| 1981 | |
| 1982 | static void |
| 1983 | bersa_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb, |
| 1984 | struct sk_buff *skb, |
| 1985 | struct ieee80211_mutable_offsets *offs) |
| 1986 | { |
| 1987 | struct bss_bcn_cntdwn_tlv *info; |
| 1988 | struct tlv *tlv; |
| 1989 | u16 tag; |
| 1990 | |
| 1991 | if (!offs->cntdwn_counter_offs[0]) |
| 1992 | return; |
| 1993 | |
| 1994 | tag = vif->csa_active ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC; |
| 1995 | |
| 1996 | tlv = bersa_mcu_add_uni_tlv(rskb, tag, sizeof(*info)); |
| 1997 | |
| 1998 | info = (struct bss_bcn_cntdwn_tlv *)tlv; |
| 1999 | info->cnt = skb->data[offs->cntdwn_counter_offs[0]]; |
| 2000 | } |
| 2001 | |
| 2002 | static void |
| 2003 | bersa_mcu_beacon_cont(struct bersa_dev *dev, struct ieee80211_vif *vif, |
| 2004 | struct sk_buff *rskb, struct sk_buff *skb, |
| 2005 | struct bss_bcn_content_tlv *bcn, |
| 2006 | struct ieee80211_mutable_offsets *offs) |
| 2007 | { |
| 2008 | struct mt76_wcid *wcid = &dev->mt76.global_wcid; |
| 2009 | u8 *buf; |
| 2010 | |
| 2011 | bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); |
| 2012 | bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset); |
| 2013 | |
| 2014 | if (offs->cntdwn_counter_offs[0]) { |
| 2015 | u16 offset = offs->cntdwn_counter_offs[0]; |
| 2016 | |
| 2017 | if (vif->csa_active) |
| 2018 | bcn->csa_ie_pos = cpu_to_le16(offset - 4); |
| 2019 | if (vif->color_change_active) |
| 2020 | bcn->bcc_ie_pos = cpu_to_le16(offset - 3); |
| 2021 | } |
| 2022 | |
| 2023 | buf = (u8 *)bcn + sizeof(*bcn) - MAX_BEACON_SIZE; |
| 2024 | bersa_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, 0, NULL, |
| 2025 | true); |
| 2026 | memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); |
| 2027 | } |
| 2028 | |
| 2029 | static void |
| 2030 | bersa_mcu_beacon_check_caps(struct bersa_phy *phy, struct ieee80211_vif *vif, |
| 2031 | struct sk_buff *skb) |
| 2032 | { |
| 2033 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 2034 | struct bersa_vif_cap *vc = &mvif->cap; |
| 2035 | const struct ieee80211_he_cap_elem *he; |
| 2036 | const struct ieee80211_vht_cap *vht; |
| 2037 | const struct ieee80211_ht_cap *ht; |
| 2038 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; |
| 2039 | const u8 *ie; |
| 2040 | u32 len, bc; |
| 2041 | |
| 2042 | /* Check missing configuration options to allow AP mode in mac80211 |
| 2043 | * to remain in sync with hostapd settings, and get a subset of |
| 2044 | * beacon and hardware capabilities. |
| 2045 | */ |
| 2046 | if (WARN_ON_ONCE(skb->len <= (mgmt->u.beacon.variable - skb->data))) |
| 2047 | return; |
| 2048 | |
| 2049 | memset(vc, 0, sizeof(*vc)); |
| 2050 | |
| 2051 | len = skb->len - (mgmt->u.beacon.variable - skb->data); |
| 2052 | |
| 2053 | ie = cfg80211_find_ie(WLAN_EID_HT_CAPABILITY, mgmt->u.beacon.variable, |
| 2054 | len); |
| 2055 | if (ie && ie[1] >= sizeof(*ht)) { |
| 2056 | ht = (void *)(ie + 2); |
| 2057 | vc->ldpc |= !!(le16_to_cpu(ht->cap_info) & |
| 2058 | IEEE80211_HT_CAP_LDPC_CODING); |
| 2059 | } |
| 2060 | |
| 2061 | ie = cfg80211_find_ie(WLAN_EID_VHT_CAPABILITY, mgmt->u.beacon.variable, |
| 2062 | len); |
| 2063 | if (ie && ie[1] >= sizeof(*vht)) { |
| 2064 | u32 pc = phy->mt76->sband_5g.sband.vht_cap.cap; |
| 2065 | |
| 2066 | vht = (void *)(ie + 2); |
| 2067 | bc = le32_to_cpu(vht->vht_cap_info); |
| 2068 | |
| 2069 | vc->ldpc |= !!(bc & IEEE80211_VHT_CAP_RXLDPC); |
| 2070 | vc->vht_su_ebfer = |
| 2071 | (bc & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE) && |
| 2072 | (pc & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); |
| 2073 | vc->vht_su_ebfee = |
| 2074 | (bc & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE) && |
| 2075 | (pc & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE); |
| 2076 | vc->vht_mu_ebfer = |
| 2077 | (bc & IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE) && |
| 2078 | (pc & IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE); |
| 2079 | vc->vht_mu_ebfee = |
| 2080 | (bc & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE) && |
| 2081 | (pc & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); |
| 2082 | } |
| 2083 | |
| 2084 | ie = cfg80211_find_ext_ie(WLAN_EID_EXT_HE_CAPABILITY, |
| 2085 | mgmt->u.beacon.variable, len); |
| 2086 | if (ie && ie[1] >= sizeof(*he) + 1) { |
| 2087 | const struct ieee80211_sta_he_cap *pc = |
| 2088 | mt76_connac_get_he_phy_cap(phy->mt76, vif); |
| 2089 | const struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; |
| 2090 | |
| 2091 | he = (void *)(ie + 3); |
| 2092 | |
| 2093 | vc->he_su_ebfer = |
| 2094 | HE_PHY(CAP3_SU_BEAMFORMER, he->phy_cap_info[3]) && |
| 2095 | HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); |
| 2096 | vc->he_su_ebfee = |
| 2097 | HE_PHY(CAP4_SU_BEAMFORMEE, he->phy_cap_info[4]) && |
| 2098 | HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]); |
| 2099 | vc->he_mu_ebfer = |
| 2100 | HE_PHY(CAP4_MU_BEAMFORMER, he->phy_cap_info[4]) && |
| 2101 | HE_PHY(CAP4_MU_BEAMFORMER, pe->phy_cap_info[4]); |
| 2102 | } |
| 2103 | } |
| 2104 | |
| 2105 | int bersa_mcu_add_beacon(struct ieee80211_hw *hw, |
| 2106 | struct ieee80211_vif *vif, int en) |
| 2107 | { |
| 2108 | struct bersa_dev *dev = bersa_hw_dev(hw); |
| 2109 | struct bersa_phy *phy = bersa_hw_phy(hw); |
| 2110 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 2111 | struct ieee80211_mutable_offsets offs; |
| 2112 | struct ieee80211_tx_info *info; |
| 2113 | struct sk_buff *skb, *rskb; |
| 2114 | struct tlv *tlv; |
| 2115 | struct bss_bcn_content_tlv *bcn; |
| 2116 | u8 phy_idx = bersa_get_phy_id(phy); |
| 2117 | |
| 2118 | rskb = __bersa_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, |
| 2119 | BERSA_BEACON_UPDATE_SIZE); |
| 2120 | if (IS_ERR(rskb)) |
| 2121 | return PTR_ERR(rskb); |
| 2122 | |
| 2123 | tlv = bersa_mcu_add_uni_tlv(rskb, |
| 2124 | UNI_BSS_INFO_BCN_CONTENT, sizeof(*bcn)); |
| 2125 | bcn = (struct bss_bcn_content_tlv *)tlv; |
| 2126 | bcn->enable = en; |
| 2127 | |
| 2128 | if (!en) |
| 2129 | goto out; |
| 2130 | |
| 2131 | skb = ieee80211_beacon_get_template(hw, vif, &offs); |
| 2132 | if (!skb) |
| 2133 | return -EINVAL; |
| 2134 | |
| 2135 | if (skb->len > MAX_BEACON_SIZE - MT_TXD_SIZE) { |
| 2136 | dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); |
| 2137 | dev_kfree_skb(skb); |
| 2138 | return -EINVAL; |
| 2139 | } |
| 2140 | |
| 2141 | info = IEEE80211_SKB_CB(skb); |
| 2142 | info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy_idx); |
| 2143 | |
| 2144 | bersa_mcu_beacon_check_caps(phy, vif, skb); |
| 2145 | |
| 2146 | bersa_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs); |
| 2147 | /* TODO: subtag - 11v MBSSID */ |
| 2148 | bersa_mcu_beacon_cntdwn(vif, rskb, skb, &offs); |
| 2149 | dev_kfree_skb(skb); |
| 2150 | out: |
| 2151 | return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb, |
| 2152 | MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); |
| 2153 | } |
| 2154 | |
| 2155 | static int bersa_driver_own(struct bersa_dev *dev, u8 band) |
| 2156 | { |
| 2157 | mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN); |
| 2158 | if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band), |
| 2159 | MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) { |
| 2160 | dev_err(dev->mt76.dev, "Timeout for driver own\n"); |
| 2161 | return -EIO; |
| 2162 | } |
| 2163 | |
| 2164 | /* clear irq when the driver own success */ |
| 2165 | mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band), |
| 2166 | MT_TOP_LPCR_HOST_BAND_STAT); |
| 2167 | |
| 2168 | return 0; |
| 2169 | } |
| 2170 | |
| 2171 | static int bersa_load_patch(struct bersa_dev *dev) |
| 2172 | { |
| 2173 | const struct bersa_patch_hdr *hdr; |
| 2174 | const struct firmware *fw = NULL; |
| 2175 | int i, ret, sem; |
| 2176 | |
| 2177 | sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1); |
| 2178 | switch (sem) { |
| 2179 | case PATCH_IS_DL: |
| 2180 | return 0; |
| 2181 | case PATCH_NOT_DL_SEM_SUCCESS: |
| 2182 | break; |
| 2183 | default: |
| 2184 | dev_err(dev->mt76.dev, "Failed to get patch semaphore\n"); |
| 2185 | return -EAGAIN; |
| 2186 | } |
| 2187 | |
| 2188 | ret = request_firmware(&fw, MT7902_ROM_PATCH, |
| 2189 | dev->mt76.dev); |
| 2190 | if (ret) |
| 2191 | goto out; |
| 2192 | |
| 2193 | if (!fw || !fw->data || fw->size < sizeof(*hdr)) { |
| 2194 | dev_err(dev->mt76.dev, "Invalid firmware\n"); |
| 2195 | ret = -EINVAL; |
| 2196 | goto out; |
| 2197 | } |
| 2198 | |
| 2199 | hdr = (const struct bersa_patch_hdr *)(fw->data); |
| 2200 | |
| 2201 | dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", |
| 2202 | be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); |
| 2203 | |
| 2204 | for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { |
| 2205 | struct bersa_patch_sec *sec; |
| 2206 | const u8 *dl; |
| 2207 | u32 len, addr; |
| 2208 | |
| 2209 | sec = (struct bersa_patch_sec *)(fw->data + sizeof(*hdr) + |
| 2210 | i * sizeof(*sec)); |
| 2211 | if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != |
| 2212 | PATCH_SEC_TYPE_INFO) { |
| 2213 | ret = -EINVAL; |
| 2214 | goto out; |
| 2215 | } |
| 2216 | |
| 2217 | addr = be32_to_cpu(sec->info.addr); |
| 2218 | len = be32_to_cpu(sec->info.len); |
| 2219 | dl = fw->data + be32_to_cpu(sec->offs); |
| 2220 | |
| 2221 | ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len, |
| 2222 | DL_MODE_NEED_RSP); |
| 2223 | if (ret) { |
| 2224 | dev_err(dev->mt76.dev, "Download request failed\n"); |
| 2225 | goto out; |
| 2226 | } |
| 2227 | |
| 2228 | ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), |
| 2229 | dl, len, 4096); |
| 2230 | if (ret) { |
| 2231 | dev_err(dev->mt76.dev, "Failed to send patch\n"); |
| 2232 | goto out; |
| 2233 | } |
| 2234 | } |
| 2235 | |
| 2236 | ret = mt76_connac_mcu_start_patch(&dev->mt76); |
| 2237 | if (ret) |
| 2238 | dev_err(dev->mt76.dev, "Failed to start patch\n"); |
| 2239 | |
| 2240 | out: |
| 2241 | sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0); |
| 2242 | switch (sem) { |
| 2243 | case PATCH_REL_SEM_SUCCESS: |
| 2244 | break; |
| 2245 | default: |
| 2246 | ret = -EAGAIN; |
| 2247 | dev_err(dev->mt76.dev, "Failed to release patch semaphore\n"); |
| 2248 | break; |
| 2249 | } |
| 2250 | release_firmware(fw); |
| 2251 | |
| 2252 | return ret; |
| 2253 | } |
| 2254 | |
| 2255 | static int |
| 2256 | bersa_mcu_send_ram_firmware(struct bersa_dev *dev, |
| 2257 | const struct bersa_fw_trailer *hdr, |
| 2258 | const u8 *data, bool is_wa) |
| 2259 | { |
| 2260 | int i, offset = 0; |
| 2261 | u32 override = 0, option = 0; |
| 2262 | |
| 2263 | for (i = 0; i < hdr->n_region; i++) { |
| 2264 | const struct bersa_fw_region *region; |
| 2265 | int err; |
| 2266 | u32 len, addr, mode; |
| 2267 | |
| 2268 | region = (const struct bersa_fw_region *)((const u8 *)hdr - |
| 2269 | (hdr->n_region - i) * sizeof(*region)); |
| 2270 | mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, |
| 2271 | region->feature_set, is_wa); |
| 2272 | len = le32_to_cpu(region->len); |
| 2273 | addr = le32_to_cpu(region->addr); |
| 2274 | |
| 2275 | if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) |
| 2276 | override = addr; |
| 2277 | |
| 2278 | err = mt76_connac_mcu_init_download(&dev->mt76, addr, len, |
| 2279 | mode); |
| 2280 | if (err) { |
| 2281 | dev_err(dev->mt76.dev, "Download request failed\n"); |
| 2282 | return err; |
| 2283 | } |
| 2284 | |
| 2285 | err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), |
| 2286 | data + offset, len, 4096); |
| 2287 | if (err) { |
| 2288 | dev_err(dev->mt76.dev, "Failed to send firmware.\n"); |
| 2289 | return err; |
| 2290 | } |
| 2291 | |
| 2292 | offset += len; |
| 2293 | } |
| 2294 | |
| 2295 | if (override) |
| 2296 | option |= FW_START_OVERRIDE; |
| 2297 | |
| 2298 | if (is_wa) |
| 2299 | option |= FW_START_WORKING_PDA_CR4; |
| 2300 | |
| 2301 | return mt76_connac_mcu_start_firmware(&dev->mt76, override, option); |
| 2302 | } |
| 2303 | |
| 2304 | static int bersa_load_ram(struct bersa_dev *dev) |
| 2305 | { |
| 2306 | const struct bersa_fw_trailer *hdr; |
| 2307 | const struct firmware *fw; |
| 2308 | int ret; |
| 2309 | |
| 2310 | ret = request_firmware(&fw, MT7902_FIRMWARE_WM, |
| 2311 | dev->mt76.dev); |
| 2312 | if (ret) |
| 2313 | return ret; |
| 2314 | |
| 2315 | if (!fw || !fw->data || fw->size < sizeof(*hdr)) { |
| 2316 | dev_err(dev->mt76.dev, "Invalid firmware\n"); |
| 2317 | ret = -EINVAL; |
| 2318 | goto out; |
| 2319 | } |
| 2320 | |
| 2321 | hdr = (const struct bersa_fw_trailer *)(fw->data + fw->size - |
| 2322 | sizeof(*hdr)); |
| 2323 | |
| 2324 | dev_info(dev->mt76.dev, "WM Firmware Version: %.10s, Build Time: %.15s\n", |
| 2325 | hdr->fw_ver, hdr->build_date); |
| 2326 | |
| 2327 | ret = bersa_mcu_send_ram_firmware(dev, hdr, fw->data, false); |
| 2328 | if (ret) { |
| 2329 | dev_err(dev->mt76.dev, "Failed to start WM firmware\n"); |
| 2330 | goto out; |
| 2331 | } |
| 2332 | |
| 2333 | release_firmware(fw); |
| 2334 | |
| 2335 | ret = request_firmware(&fw, MT7902_FIRMWARE_WA, |
| 2336 | dev->mt76.dev); |
| 2337 | if (ret) |
| 2338 | return ret; |
| 2339 | |
| 2340 | if (!fw || !fw->data || fw->size < sizeof(*hdr)) { |
| 2341 | dev_err(dev->mt76.dev, "Invalid firmware\n"); |
| 2342 | ret = -EINVAL; |
| 2343 | goto out; |
| 2344 | } |
| 2345 | |
| 2346 | hdr = (const struct bersa_fw_trailer *)(fw->data + fw->size - |
| 2347 | sizeof(*hdr)); |
| 2348 | |
| 2349 | dev_info(dev->mt76.dev, "WA Firmware Version: %.10s, Build Time: %.15s\n", |
| 2350 | hdr->fw_ver, hdr->build_date); |
| 2351 | |
| 2352 | ret = bersa_mcu_send_ram_firmware(dev, hdr, fw->data, true); |
| 2353 | if (ret) { |
| 2354 | dev_err(dev->mt76.dev, "Failed to start WA firmware\n"); |
| 2355 | goto out; |
| 2356 | } |
| 2357 | |
| 2358 | snprintf(dev->mt76.hw->wiphy->fw_version, |
| 2359 | sizeof(dev->mt76.hw->wiphy->fw_version), |
| 2360 | "%.10s-%.15s", hdr->fw_ver, hdr->build_date); |
| 2361 | |
| 2362 | out: |
| 2363 | release_firmware(fw); |
| 2364 | |
| 2365 | return ret; |
| 2366 | } |
| 2367 | |
| 2368 | static int |
| 2369 | bersa_firmware_state(struct bersa_dev *dev, bool wa) |
| 2370 | { |
| 2371 | u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, |
| 2372 | wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD); |
| 2373 | |
| 2374 | if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, |
| 2375 | state, 1000)) { |
| 2376 | dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); |
| 2377 | return -EIO; |
| 2378 | } |
| 2379 | return 0; |
| 2380 | } |
| 2381 | |
| 2382 | static int bersa_load_firmware(struct bersa_dev *dev) |
| 2383 | { |
| 2384 | int ret; |
| 2385 | |
| 2386 | /* make sure fw is download state */ |
| 2387 | if (bersa_firmware_state(dev, false)) { |
| 2388 | /* restart firmware once */ |
| 2389 | __mt76_mcu_restart(&dev->mt76); |
| 2390 | ret = bersa_firmware_state(dev, false); |
| 2391 | if (ret) { |
| 2392 | dev_err(dev->mt76.dev, |
| 2393 | "Firmware is not ready for download\n"); |
| 2394 | return ret; |
| 2395 | } |
| 2396 | } |
| 2397 | |
| 2398 | ret = bersa_load_patch(dev); |
| 2399 | if (ret) |
| 2400 | return ret; |
| 2401 | |
| 2402 | ret = bersa_load_ram(dev); |
| 2403 | if (ret) |
| 2404 | return ret; |
| 2405 | |
| 2406 | ret = bersa_firmware_state(dev, true); |
| 2407 | if (ret) |
| 2408 | return ret; |
| 2409 | |
| 2410 | mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); |
| 2411 | |
| 2412 | dev_dbg(dev->mt76.dev, "Firmware init done\n"); |
| 2413 | |
| 2414 | return 0; |
| 2415 | } |
| 2416 | |
| 2417 | int bersa_mcu_fw_log_2_host(struct bersa_dev *dev, u8 type, u8 ctrl) |
| 2418 | { |
| 2419 | struct { |
| 2420 | u8 _rsv[4]; |
| 2421 | |
| 2422 | __le16 tag; |
| 2423 | __le16 len; |
| 2424 | u8 ctrl; |
| 2425 | u8 interval; |
| 2426 | u8 _rsv2[2]; |
| 2427 | } __packed data = { |
| 2428 | .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL), |
| 2429 | .len = cpu_to_le16(sizeof(data) - 4), |
| 2430 | .ctrl = ctrl, |
| 2431 | }; |
| 2432 | |
| 2433 | if (type == MCU_FW_LOG_WA) |
| 2434 | return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG), |
| 2435 | &data, sizeof(data), true); |
| 2436 | |
| 2437 | return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, |
| 2438 | sizeof(data), true); |
| 2439 | } |
| 2440 | |
| 2441 | int bersa_mcu_fw_dbg_ctrl(struct bersa_dev *dev, u32 module, u8 level) |
| 2442 | { |
| 2443 | struct { |
| 2444 | u8 _rsv[4]; |
| 2445 | |
| 2446 | __le16 tag; |
| 2447 | __le16 len; |
| 2448 | __le32 module_idx; |
| 2449 | u8 level; |
| 2450 | u8 _rsv2[3]; |
| 2451 | } data = { |
| 2452 | .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL), |
| 2453 | .len = cpu_to_le16(sizeof(data) - 4), |
| 2454 | .module_idx = cpu_to_le32(module), |
| 2455 | .level = level, |
| 2456 | }; |
| 2457 | |
| 2458 | return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, |
| 2459 | sizeof(data), false); |
| 2460 | } |
| 2461 | |
| 2462 | int bersa_mcu_muru_debug_set(struct bersa_dev *dev, bool enabled) |
| 2463 | { |
| 2464 | struct { |
| 2465 | __le32 cmd; |
| 2466 | u8 enable; |
| 2467 | } data = { |
| 2468 | .cmd = cpu_to_le32(MURU_SET_TXC_TX_STATS_EN), |
| 2469 | .enable = enabled, |
| 2470 | }; |
| 2471 | |
| 2472 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &data, |
| 2473 | sizeof(data), false); |
| 2474 | } |
| 2475 | |
| 2476 | int bersa_mcu_muru_debug_get(struct bersa_phy *phy, void *ms) |
| 2477 | { |
| 2478 | struct bersa_dev *dev = phy->dev; |
| 2479 | struct sk_buff *skb; |
| 2480 | struct bersa_mcu_muru_stats *mu_stats = |
| 2481 | (struct bersa_mcu_muru_stats *)ms; |
| 2482 | int ret; |
| 2483 | |
| 2484 | struct { |
| 2485 | __le32 cmd; |
| 2486 | u8 band_idx; |
| 2487 | } req = { |
| 2488 | .cmd = cpu_to_le32(MURU_GET_TXC_TX_STATS), |
| 2489 | .band_idx = phy->band_idx, |
| 2490 | }; |
| 2491 | |
| 2492 | ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), |
| 2493 | &req, sizeof(req), true, &skb); |
| 2494 | if (ret) |
| 2495 | return ret; |
| 2496 | |
| 2497 | memcpy(mu_stats, skb->data, sizeof(struct bersa_mcu_muru_stats)); |
| 2498 | dev_kfree_skb(skb); |
| 2499 | |
| 2500 | return 0; |
| 2501 | } |
| 2502 | |
| 2503 | static int bersa_mcu_set_mwds(struct bersa_dev *dev, bool enabled) |
| 2504 | { |
| 2505 | struct { |
| 2506 | u8 enable; |
| 2507 | u8 _rsv[3]; |
| 2508 | } __packed req = { |
| 2509 | .enable = enabled |
| 2510 | }; |
| 2511 | |
| 2512 | return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req, |
| 2513 | sizeof(req), false); |
| 2514 | } |
| 2515 | |
| 2516 | int bersa_mcu_set_muru_ctrl(struct bersa_dev *dev, u32 cmd, u32 val) |
| 2517 | { |
| 2518 | struct { |
| 2519 | __le32 cmd; |
| 2520 | u8 val[4]; |
| 2521 | } __packed req = { |
| 2522 | .cmd = cpu_to_le32(cmd), |
| 2523 | }; |
| 2524 | |
| 2525 | put_unaligned_le32(val, req.val); |
| 2526 | |
| 2527 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req, |
| 2528 | sizeof(req), false); |
| 2529 | } |
| 2530 | |
| 2531 | static int |
| 2532 | bersa_mcu_init_rx_airtime(struct bersa_dev *dev) |
| 2533 | { |
| 2534 | #define RX_AIRTIME_FEATURE_CTRL 1 |
| 2535 | #define RX_AIRTIME_BITWISE_CTRL 2 |
| 2536 | #define RX_AIRTIME_CLEAR_EN 1 |
| 2537 | struct { |
| 2538 | __le16 field; |
| 2539 | __le16 sub_field; |
| 2540 | __le32 set_status; |
| 2541 | __le32 get_status; |
| 2542 | u8 _rsv[12]; |
| 2543 | |
| 2544 | bool airtime_en; |
| 2545 | bool mibtime_en; |
| 2546 | bool earlyend_en; |
| 2547 | u8 _rsv1[9]; |
| 2548 | |
| 2549 | bool airtime_clear; |
| 2550 | bool mibtime_clear; |
| 2551 | u8 _rsv2[98]; |
| 2552 | } __packed req = { |
| 2553 | .field = cpu_to_le16(RX_AIRTIME_BITWISE_CTRL), |
| 2554 | .sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN), |
| 2555 | .airtime_clear = true, |
| 2556 | }; |
| 2557 | int ret; |
| 2558 | |
| 2559 | ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req, |
| 2560 | sizeof(req), true); |
| 2561 | if (ret) |
| 2562 | return ret; |
| 2563 | |
| 2564 | req.field = cpu_to_le16(RX_AIRTIME_FEATURE_CTRL); |
| 2565 | req.sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN); |
| 2566 | req.airtime_en = true; |
| 2567 | |
| 2568 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req, |
| 2569 | sizeof(req), true); |
| 2570 | } |
| 2571 | |
| 2572 | static int |
| 2573 | bersa_load_rom(struct bersa_dev *dev, bool is_sram) |
| 2574 | { |
| 2575 | #define MCU_FIRMWARE_ROM_ADDR 0x00800000 |
| 2576 | #define MCU_FIRMWARE_ROM_SRAM_ADDR 0xE0048000 |
| 2577 | |
| 2578 | const struct firmware *fw; |
| 2579 | int ret; |
| 2580 | u32 val, ofs = 0; |
| 2581 | |
| 2582 | ret = request_firmware(&fw, (is_sram ? MT7902_FIRMWARE_ROM_SRAM : |
| 2583 | MT7902_FIRMWARE_ROM), |
| 2584 | dev->mt76.dev); |
| 2585 | if (ret) { |
| 2586 | dev_err(dev->mt76.dev, "request rom binary failed\n"); |
| 2587 | return ret; |
| 2588 | } |
| 2589 | |
| 2590 | if (!fw || !fw->data ) { |
| 2591 | dev_err(dev->mt76.dev, "Invalid firmware\n"); |
| 2592 | ret = -EINVAL; |
| 2593 | goto out; |
| 2594 | } |
| 2595 | |
| 2596 | val = mt76_rr(dev, MT_INFRA_BUS_ON_REMAP_WF_5_4); |
| 2597 | |
| 2598 | mt76_wr(dev, MT_INFRA_BUS_ON_REMAP_WF_5_4, |
| 2599 | FIELD_GET(MT_INFRA_BUS_ON_REMAP_WF_4_MASK, val) | |
| 2600 | FIELD_PREP(MT_INFRA_BUS_ON_REMAP_WF_5_MASK, 0x1850)); |
| 2601 | |
| 2602 | while (true) { |
| 2603 | u32 size; |
| 2604 | |
| 2605 | if (ofs >= fw->size) |
| 2606 | break; |
| 2607 | |
| 2608 | if ((ofs + 0x10000) <= fw->size) |
| 2609 | size = 0x10000; |
| 2610 | else |
| 2611 | size = fw->size - ofs; |
| 2612 | |
| 2613 | mt76_wr(dev, MT_MCU_BUS_REMAP, |
| 2614 | ((is_sram ? MCU_FIRMWARE_ROM_SRAM_ADDR : MCU_FIRMWARE_ROM_ADDR) + ofs)); |
| 2615 | mt76_wr_copy(dev, 0x50000, (void *) (fw->data + ofs), size); |
| 2616 | |
| 2617 | ofs += 0x10000; |
| 2618 | } |
| 2619 | |
| 2620 | mt76_wr(dev, MT_INFRA_BUS_ON_REMAP_WF_5_4, val); |
| 2621 | |
| 2622 | out: |
| 2623 | release_firmware(fw); |
| 2624 | |
| 2625 | return ret; |
| 2626 | |
| 2627 | } |
| 2628 | |
| 2629 | int bersa_rom_start(struct bersa_dev *dev) |
| 2630 | { |
| 2631 | #define WF_IDLE 0xBE11 |
| 2632 | #define WF_STATE_MASK GENMASK(15, 0) |
| 2633 | |
| 2634 | int ret; |
| 2635 | u32 val; |
| 2636 | |
| 2637 | ret = !mt76_poll_msec(dev, MT_TOP_CFG_ON_ROM_IDX, |
| 2638 | MT_TOP_CFG_ON_ROM_STATE_MASK, |
| 2639 | FIELD_PREP(MT_TOP_CFG_ON_ROM_STATE_MASK, |
| 2640 | MT_TOP_CFG_ON_ROM_IDLE), 200); |
| 2641 | if (!ret) |
| 2642 | return ret; |
| 2643 | |
| 2644 | mt76_rmw(dev, MT_INFRA_RGU_RGU_ON_SW_RST_B, |
| 2645 | MT_INFRA_RGU_RGU_ON_SW_RST_B_MASK, 0); |
| 2646 | |
| 2647 | ret = bersa_load_rom(dev, false); |
| 2648 | if (ret) |
| 2649 | return ret; |
| 2650 | |
| 2651 | ret = bersa_load_rom(dev, true); |
| 2652 | if (ret) |
| 2653 | return ret; |
| 2654 | |
| 2655 | mt76_rmw(dev, MT_INFRA_RGU_RGU_ON_SW_RST_B, |
| 2656 | MT_INFRA_RGU_RGU_ON_SW_RST_B_MASK, 1); |
| 2657 | |
| 2658 | ret = !mt76_poll_msec(dev, MT_TOP_CFG_ON_ROM_IDX, |
| 2659 | MT_TOP_CFG_ON_ROM_STATE_MASK, |
| 2660 | FIELD_PREP(MT_TOP_CFG_ON_ROM_STATE_MASK, |
| 2661 | MT_TOP_CFG_ON_ROM_IDLE), 200); |
| 2662 | if (ret) |
| 2663 | return ret; |
| 2664 | |
| 2665 | val = mt76_rr(dev, MT_HIF_REMAP_L1); |
| 2666 | |
| 2667 | mt76_wr(dev, MT_HIF_REMAP_L1, |
| 2668 | FIELD_GET(MT_HIF_REMAP_L1_OFFSET, val) | FIELD_PREP(MT_HIF_REMAP_L1_BASE, 0x1805)); |
| 2669 | if (!mt76_poll_msec(dev, 0x54A68, WF_STATE_MASK, |
| 2670 | FIELD_PREP(WF_STATE_MASK, WF_IDLE), 1000)) { |
| 2671 | dev_err(dev->mt76.dev, "timeout for wf idle\n"); |
| 2672 | ret = -EIO; |
| 2673 | } |
| 2674 | |
| 2675 | mt76_wr(dev, MT_HIF_REMAP_L1, val); |
| 2676 | |
| 2677 | return ret; |
| 2678 | } |
| 2679 | |
| 2680 | int bersa_mcu_init(struct bersa_dev *dev) |
| 2681 | { |
| 2682 | static const struct mt76_mcu_ops bersa_mcu_ops = { |
| 2683 | .headroom = sizeof(struct bersa_mcu_txd), |
| 2684 | .mcu_skb_send_msg = bersa_mcu_send_message, |
| 2685 | .mcu_parse_response = bersa_mcu_parse_response, |
| 2686 | .mcu_restart = mt76_connac_mcu_restart, |
| 2687 | }; |
| 2688 | int ret; |
| 2689 | |
| 2690 | dev->mt76.mcu_ops = &bersa_mcu_ops; |
| 2691 | |
| 2692 | /* force firmware operation mode into normal state, |
| 2693 | * which should be set before firmware download stage. |
| 2694 | */ |
| 2695 | mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); |
| 2696 | |
| 2697 | ret = bersa_driver_own(dev, 0); |
| 2698 | if (ret) |
| 2699 | return ret; |
| 2700 | /* set driver own for band1 when two hif exist */ |
| 2701 | if (dev->hif2) { |
| 2702 | ret = bersa_driver_own(dev, 1); |
| 2703 | if (ret) |
| 2704 | return ret; |
| 2705 | } |
| 2706 | |
| 2707 | ret = bersa_load_firmware(dev); |
| 2708 | if (ret) |
| 2709 | return ret; |
| 2710 | |
| 2711 | set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); |
| 2712 | ret = bersa_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); |
| 2713 | if (ret) |
| 2714 | return ret; |
| 2715 | |
| 2716 | ret = bersa_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0); |
| 2717 | if (ret) |
| 2718 | return ret; |
| 2719 | |
| 2720 | ret = bersa_mcu_set_mwds(dev, 1); |
| 2721 | if (ret) |
| 2722 | return ret; |
| 2723 | |
| 2724 | ret = bersa_mcu_set_muru_ctrl(dev, MURU_SET_PLATFORM_TYPE, |
| 2725 | MURU_PLATFORM_TYPE_PERF_LEVEL_2); |
| 2726 | if (ret) |
| 2727 | return ret; |
| 2728 | |
| 2729 | ret = bersa_mcu_init_rx_airtime(dev); |
| 2730 | if (ret) |
| 2731 | return ret; |
| 2732 | |
| 2733 | return bersa_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), |
| 2734 | MCU_WA_PARAM_RED, 0, 0); |
| 2735 | } |
| 2736 | |
| 2737 | void bersa_mcu_exit(struct bersa_dev *dev) |
| 2738 | { |
| 2739 | __mt76_mcu_restart(&dev->mt76); |
| 2740 | if (bersa_firmware_state(dev, false)) { |
| 2741 | dev_err(dev->mt76.dev, "Failed to exit mcu\n"); |
| 2742 | return; |
| 2743 | } |
| 2744 | |
| 2745 | mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN); |
| 2746 | if (dev->hif2) |
| 2747 | mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1), |
| 2748 | MT_TOP_LPCR_HOST_FW_OWN); |
| 2749 | skb_queue_purge(&dev->mt76.mcu.res_q); |
| 2750 | } |
| 2751 | |
| 2752 | int bersa_mcu_set_hdr_trans(struct bersa_dev *dev, bool hdr_trans) |
| 2753 | { |
| 2754 | struct { |
| 2755 | u8 __rsv[4]; |
| 2756 | } __packed hdr; |
| 2757 | struct hdr_trans_blacklist *req_blacklist; |
| 2758 | struct hdr_trans_en *req_en; |
| 2759 | struct sk_buff *skb; |
| 2760 | struct tlv *tlv; |
| 2761 | int len = BERSA_HDR_TRANS_MAX_SIZE + sizeof(hdr); |
| 2762 | int ret; |
| 2763 | |
| 2764 | skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); |
| 2765 | if (!skb) |
| 2766 | return ERR_PTR(-ENOMEM); |
| 2767 | |
| 2768 | skb_put_data(skb, &hdr, sizeof(hdr)); |
| 2769 | |
| 2770 | tlv = bersa_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en)); |
| 2771 | req_en = (struct hdr_trans_en *)tlv; |
| 2772 | req_en->enable = hdr_trans; |
| 2773 | |
| 2774 | tlv = bersa_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN, |
| 2775 | sizeof(struct hdr_trans_vlan)); |
| 2776 | |
| 2777 | if (hdr_trans) { |
| 2778 | tlv = bersa_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST, |
| 2779 | sizeof(*req_blacklist)); |
| 2780 | req_blacklist = (struct hdr_trans_blacklist *)tlv; |
| 2781 | req_blacklist->enable = 1; |
| 2782 | req_blacklist->type = cpu_to_le16(ETH_P_PAE); |
| 2783 | } |
| 2784 | |
| 2785 | return mt76_mcu_skb_send_msg(&dev->mt76, skb, |
| 2786 | MCU_WM_UNI_CMD(RX_HDR_TRANS), true); |
| 2787 | } |
| 2788 | |
| 2789 | int bersa_mcu_set_scs(struct bersa_dev *dev, u8 band, bool enable) |
| 2790 | { |
| 2791 | struct { |
| 2792 | __le32 cmd; |
| 2793 | u8 band; |
| 2794 | u8 enable; |
| 2795 | } __packed req = { |
| 2796 | .cmd = cpu_to_le32(SCS_ENABLE), |
| 2797 | .band = band, |
| 2798 | .enable = enable + 1, |
| 2799 | }; |
| 2800 | |
| 2801 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SCS_CTRL), &req, |
| 2802 | sizeof(req), false); |
| 2803 | } |
| 2804 | |
| 2805 | int bersa_mcu_set_tx(struct bersa_dev *dev, struct ieee80211_vif *vif) |
| 2806 | { |
| 2807 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 2808 | struct { |
| 2809 | u8 bss_idx; |
| 2810 | u8 __rsv[3]; |
| 2811 | } __packed hdr = { |
| 2812 | .bss_idx = mvif->mt76.idx, |
| 2813 | }; |
| 2814 | struct sk_buff *skb; |
| 2815 | int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca); |
| 2816 | int ac; |
| 2817 | |
| 2818 | skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); |
| 2819 | if (!skb) |
| 2820 | return ERR_PTR(-ENOMEM); |
| 2821 | |
| 2822 | skb_put_data(skb, &hdr, sizeof(hdr)); |
| 2823 | |
| 2824 | for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { |
| 2825 | struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac]; |
| 2826 | struct edca *e; |
| 2827 | struct tlv *tlv; |
| 2828 | |
| 2829 | tlv = bersa_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e)); |
| 2830 | |
| 2831 | e = (struct edca *)tlv; |
| 2832 | e->set = WMM_PARAM_SET; |
| 2833 | e->queue = ac + mvif->mt76.wmm_idx * BERSA_MAX_WMM_SETS; |
| 2834 | e->aifs = q->aifs; |
| 2835 | e->txop = cpu_to_le16(q->txop); |
| 2836 | |
| 2837 | if (q->cw_min) |
| 2838 | e->cw_min = fls(q->cw_min); |
| 2839 | else |
| 2840 | e->cw_min = 5; |
| 2841 | |
| 2842 | if (q->cw_max) |
| 2843 | e->cw_max = cpu_to_le16(fls(q->cw_max)); |
| 2844 | else |
| 2845 | e->cw_max = cpu_to_le16(10); |
| 2846 | } |
| 2847 | return mt76_mcu_skb_send_msg(&dev->mt76, skb, |
| 2848 | MCU_WM_UNI_CMD(EDCA), true); |
| 2849 | } |
| 2850 | |
| 2851 | int bersa_mcu_set_fcc5_lpn(struct bersa_dev *dev, int val) |
| 2852 | { |
| 2853 | struct { |
| 2854 | __le32 tag; |
| 2855 | __le16 min_lpn; |
| 2856 | u8 rsv[2]; |
| 2857 | } __packed req = { |
| 2858 | .tag = cpu_to_le32(0x1), |
| 2859 | .min_lpn = cpu_to_le16(val), |
| 2860 | }; |
| 2861 | |
| 2862 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req, |
| 2863 | sizeof(req), true); |
| 2864 | } |
| 2865 | |
| 2866 | int bersa_mcu_set_pulse_th(struct bersa_dev *dev, |
| 2867 | const struct bersa_dfs_pulse *pulse) |
| 2868 | { |
| 2869 | struct { |
| 2870 | __le32 tag; |
| 2871 | |
| 2872 | __le32 max_width; /* us */ |
| 2873 | __le32 max_pwr; /* dbm */ |
| 2874 | __le32 min_pwr; /* dbm */ |
| 2875 | __le32 min_stgr_pri; /* us */ |
| 2876 | __le32 max_stgr_pri; /* us */ |
| 2877 | __le32 min_cr_pri; /* us */ |
| 2878 | __le32 max_cr_pri; /* us */ |
| 2879 | } __packed req = { |
| 2880 | .tag = cpu_to_le32(0x3), |
| 2881 | |
| 2882 | #define __req_field(field) .field = cpu_to_le32(pulse->field) |
| 2883 | __req_field(max_width), |
| 2884 | __req_field(max_pwr), |
| 2885 | __req_field(min_pwr), |
| 2886 | __req_field(min_stgr_pri), |
| 2887 | __req_field(max_stgr_pri), |
| 2888 | __req_field(min_cr_pri), |
| 2889 | __req_field(max_cr_pri), |
| 2890 | #undef __req_field |
| 2891 | }; |
| 2892 | |
| 2893 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req, |
| 2894 | sizeof(req), true); |
| 2895 | } |
| 2896 | |
| 2897 | int bersa_mcu_set_radar_th(struct bersa_dev *dev, int index, |
| 2898 | const struct bersa_dfs_pattern *pattern) |
| 2899 | { |
| 2900 | struct { |
| 2901 | __le32 tag; |
| 2902 | __le16 radar_type; |
| 2903 | |
| 2904 | u8 enb; |
| 2905 | u8 stgr; |
| 2906 | u8 min_crpn; |
| 2907 | u8 max_crpn; |
| 2908 | u8 min_crpr; |
| 2909 | u8 min_pw; |
| 2910 | __le32 min_pri; |
| 2911 | __le32 max_pri; |
| 2912 | u8 max_pw; |
| 2913 | u8 min_crbn; |
| 2914 | u8 max_crbn; |
| 2915 | u8 min_stgpn; |
| 2916 | u8 max_stgpn; |
| 2917 | u8 min_stgpr; |
| 2918 | u8 rsv[2]; |
| 2919 | __le32 min_stgpr_diff; |
| 2920 | } __packed req = { |
| 2921 | .tag = cpu_to_le32(0x2), |
| 2922 | .radar_type = cpu_to_le16(index), |
| 2923 | |
| 2924 | #define __req_field_u8(field) .field = pattern->field |
| 2925 | #define __req_field_u32(field) .field = cpu_to_le32(pattern->field) |
| 2926 | __req_field_u8(enb), |
| 2927 | __req_field_u8(stgr), |
| 2928 | __req_field_u8(min_crpn), |
| 2929 | __req_field_u8(max_crpn), |
| 2930 | __req_field_u8(min_crpr), |
| 2931 | __req_field_u8(min_pw), |
| 2932 | __req_field_u32(min_pri), |
| 2933 | __req_field_u32(max_pri), |
| 2934 | __req_field_u8(max_pw), |
| 2935 | __req_field_u8(min_crbn), |
| 2936 | __req_field_u8(max_crbn), |
| 2937 | __req_field_u8(min_stgpn), |
| 2938 | __req_field_u8(max_stgpn), |
| 2939 | __req_field_u8(min_stgpr), |
| 2940 | __req_field_u32(min_stgpr_diff), |
| 2941 | #undef __req_field_u8 |
| 2942 | #undef __req_field_u32 |
| 2943 | }; |
| 2944 | |
| 2945 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req, |
| 2946 | sizeof(req), true); |
| 2947 | } |
| 2948 | |
| 2949 | static int |
| 2950 | bersa_mcu_background_chain_ctrl(struct bersa_phy *phy, |
| 2951 | struct cfg80211_chan_def *chandef, |
| 2952 | int cmd) |
| 2953 | { |
| 2954 | struct bersa_dev *dev = phy->dev; |
| 2955 | struct mt76_phy *mphy = phy->mt76; |
| 2956 | struct ieee80211_channel *chan = mphy->chandef.chan; |
| 2957 | int freq = mphy->chandef.center_freq1; |
| 2958 | struct bersa_mcu_background_chain_ctrl req = { |
| 2959 | .monitor_scan_type = 2, /* simple rx */ |
| 2960 | }; |
| 2961 | |
| 2962 | if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP) |
| 2963 | return -EINVAL; |
| 2964 | |
| 2965 | if (!cfg80211_chandef_valid(&mphy->chandef)) |
| 2966 | return -EINVAL; |
| 2967 | |
| 2968 | switch (cmd) { |
| 2969 | case CH_SWITCH_BACKGROUND_SCAN_START: { |
| 2970 | req.chan = chan->hw_value; |
| 2971 | req.central_chan = ieee80211_frequency_to_channel(freq); |
| 2972 | req.bw = mt76_connac_chan_bw(&mphy->chandef); |
| 2973 | req.monitor_chan = chandef->chan->hw_value; |
| 2974 | req.monitor_central_chan = |
| 2975 | ieee80211_frequency_to_channel(chandef->center_freq1); |
| 2976 | req.monitor_bw = mt76_connac_chan_bw(chandef); |
| 2977 | req.band_idx = phy->band_idx; |
| 2978 | req.scan_mode = 1; |
| 2979 | break; |
| 2980 | } |
| 2981 | case CH_SWITCH_BACKGROUND_SCAN_RUNNING: |
| 2982 | req.monitor_chan = chandef->chan->hw_value; |
| 2983 | req.monitor_central_chan = |
| 2984 | ieee80211_frequency_to_channel(chandef->center_freq1); |
| 2985 | req.band_idx = phy->band_idx; |
| 2986 | req.scan_mode = 2; |
| 2987 | break; |
| 2988 | case CH_SWITCH_BACKGROUND_SCAN_STOP: |
| 2989 | req.chan = chan->hw_value; |
| 2990 | req.central_chan = ieee80211_frequency_to_channel(freq); |
| 2991 | req.bw = mt76_connac_chan_bw(&mphy->chandef); |
| 2992 | req.tx_stream = hweight8(mphy->antenna_mask); |
| 2993 | req.rx_stream = mphy->antenna_mask; |
| 2994 | break; |
| 2995 | default: |
| 2996 | return -EINVAL; |
| 2997 | } |
| 2998 | req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1; |
| 2999 | |
| 3000 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(OFFCH_SCAN_CTRL), |
| 3001 | &req, sizeof(req), false); |
| 3002 | } |
| 3003 | |
| 3004 | int bersa_mcu_rdd_background_enable(struct bersa_phy *phy, |
| 3005 | struct cfg80211_chan_def *chandef) |
| 3006 | { |
| 3007 | struct bersa_dev *dev = phy->dev; |
| 3008 | int err, region; |
| 3009 | |
| 3010 | if (!chandef) { /* disable offchain */ |
| 3011 | err = bersa_mcu_rdd_cmd(dev, RDD_STOP, MT_RX_SEL2, |
| 3012 | 0, 0); |
| 3013 | if (err) |
| 3014 | return err; |
| 3015 | |
| 3016 | return bersa_mcu_background_chain_ctrl(phy, NULL, |
| 3017 | CH_SWITCH_BACKGROUND_SCAN_STOP); |
| 3018 | } |
| 3019 | |
| 3020 | err = bersa_mcu_background_chain_ctrl(phy, chandef, |
| 3021 | CH_SWITCH_BACKGROUND_SCAN_START); |
| 3022 | if (err) |
| 3023 | return err; |
| 3024 | |
| 3025 | switch (dev->mt76.region) { |
| 3026 | case NL80211_DFS_ETSI: |
| 3027 | region = 0; |
| 3028 | break; |
| 3029 | case NL80211_DFS_JP: |
| 3030 | region = 2; |
| 3031 | break; |
| 3032 | case NL80211_DFS_FCC: |
| 3033 | default: |
| 3034 | region = 1; |
| 3035 | break; |
| 3036 | } |
| 3037 | |
| 3038 | return bersa_mcu_rdd_cmd(dev, RDD_START, MT_RX_SEL2, |
| 3039 | 0, region); |
| 3040 | } |
| 3041 | |
| 3042 | int bersa_mcu_set_chan_info(struct bersa_phy *phy, int tag) |
| 3043 | { |
| 3044 | struct bersa_dev *dev = phy->dev; |
| 3045 | struct cfg80211_chan_def *chandef = &phy->mt76->chandef; |
| 3046 | int freq1 = chandef->center_freq1; |
| 3047 | u8 phy_idx = bersa_get_phy_id(phy); |
| 3048 | u16 chainshift; |
| 3049 | struct { |
| 3050 | /* fixed field */ |
| 3051 | u8 __rsv[4]; |
| 3052 | |
| 3053 | /* TLV*/ |
| 3054 | __u16 tag; |
| 3055 | __u16 len; |
| 3056 | u8 control_ch; |
| 3057 | u8 center_ch; |
| 3058 | u8 bw; |
| 3059 | u8 tx_streams_num; |
| 3060 | u8 rx_streams; /* mask or num */ |
| 3061 | u8 switch_reason; |
| 3062 | u8 band_idx; |
| 3063 | u8 center_ch2; /* for 80+80 only */ |
| 3064 | __le16 cac_case; |
| 3065 | u8 channel_band; |
| 3066 | u8 rsv0; |
| 3067 | __le32 outband_freq; |
| 3068 | u8 txpower_drop; |
| 3069 | u8 ap_bw; |
| 3070 | u8 ap_center_ch; |
| 3071 | u8 rsv1[53]; |
| 3072 | } __packed req = { |
| 3073 | .tag = cpu_to_le16(tag), |
| 3074 | .len = cpu_to_le16(sizeof(req) - 4), |
| 3075 | .control_ch = chandef->chan->hw_value, |
| 3076 | .center_ch = ieee80211_frequency_to_channel(freq1), |
| 3077 | .bw = mt76_connac_chan_bw(chandef), |
| 3078 | .tx_streams_num = hweight8(phy->mt76->antenna_mask), |
| 3079 | .rx_streams = phy->mt76->antenna_mask, |
| 3080 | .band_idx = phy->band_idx, |
| 3081 | .channel_band = chandef->chan->band, |
| 3082 | }; |
| 3083 | |
| 3084 | #ifdef CONFIG_NL80211_TESTMODE |
| 3085 | if (phy->mt76->test.tx_antenna_mask && |
| 3086 | (phy->mt76->test.state == MT76_TM_STATE_TX_FRAMES || |
| 3087 | phy->mt76->test.state == MT76_TM_STATE_RX_FRAMES || |
| 3088 | phy->mt76->test.state == MT76_TM_STATE_TX_CONT)) { |
| 3089 | req.tx_streams_num = fls(phy->mt76->test.tx_antenna_mask); |
| 3090 | req.rx_streams = phy->mt76->test.tx_antenna_mask; |
| 3091 | |
| 3092 | if (phy_idx == MT_MAIN_PHY) |
| 3093 | chainshift = 0; |
| 3094 | else if (phy_idx == MT_EXT_PHY) |
| 3095 | chainshift = dev->chain_shift_ext; |
| 3096 | else |
| 3097 | chainshift = dev->chain_shift_tri; |
| 3098 | |
| 3099 | req.rx_streams >>= chainshift; |
| 3100 | } |
| 3101 | #endif |
| 3102 | |
| 3103 | if (phy->mt76->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) |
| 3104 | req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; |
| 3105 | else if (phy->mt76->hw->conf.radar_enabled && |
| 3106 | chandef->chan->dfs_state != NL80211_DFS_AVAILABLE) |
| 3107 | req.switch_reason = CH_SWITCH_DFS; |
| 3108 | else |
| 3109 | req.switch_reason = CH_SWITCH_NORMAL; |
| 3110 | |
| 3111 | if (tag == UNI_CHANNEL_SWITCH) |
| 3112 | req.rx_streams = hweight8(req.rx_streams); |
| 3113 | |
| 3114 | if (chandef->width == NL80211_CHAN_WIDTH_80P80) { |
| 3115 | int freq2 = chandef->center_freq2; |
| 3116 | |
| 3117 | req.center_ch2 = ieee80211_frequency_to_channel(freq2); |
| 3118 | } |
| 3119 | |
| 3120 | return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH), |
| 3121 | &req, sizeof(req), true); |
| 3122 | } |
| 3123 | |
| 3124 | static int bersa_mcu_set_eeprom_flash(struct bersa_dev *dev) |
| 3125 | { |
| 3126 | #define MAX_PAGE_IDX_MASK GENMASK(7, 5) |
| 3127 | #define PAGE_IDX_MASK GENMASK(4, 2) |
| 3128 | #define PER_PAGE_SIZE 0x400 |
| 3129 | struct bersa_mcu_eeprom req = { |
| 3130 | .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), |
| 3131 | .buffer_mode = EE_MODE_BUFFER |
| 3132 | }; |
| 3133 | u16 eeprom_size = BERSA_EEPROM_SIZE; |
| 3134 | u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE); |
| 3135 | u8 *eep = (u8 *)dev->mt76.eeprom.data; |
| 3136 | int eep_len, i; |
| 3137 | |
| 3138 | for (i = 0; i < total; i++, eep += eep_len) { |
| 3139 | struct sk_buff *skb; |
| 3140 | int ret, msg_len; |
| 3141 | |
| 3142 | if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE)) |
| 3143 | eep_len = eeprom_size % PER_PAGE_SIZE; |
| 3144 | else |
| 3145 | eep_len = PER_PAGE_SIZE; |
| 3146 | |
| 3147 | msg_len = sizeof(req) + eep_len; |
| 3148 | skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len); |
| 3149 | if (!skb) |
| 3150 | return -ENOMEM; |
| 3151 | |
| 3152 | req.len = cpu_to_le16(msg_len - 4); |
| 3153 | req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) | |
| 3154 | FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE; |
| 3155 | req.buf_len = cpu_to_le16(eep_len); |
| 3156 | |
| 3157 | skb_put_data(skb, &req, sizeof(req)); |
| 3158 | skb_put_data(skb, eep, eep_len); |
| 3159 | |
| 3160 | ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, |
| 3161 | MCU_WM_UNI_CMD(EFUSE_CTRL), true); |
| 3162 | if (ret) |
| 3163 | return ret; |
| 3164 | } |
| 3165 | |
| 3166 | return 0; |
| 3167 | } |
| 3168 | |
| 3169 | int bersa_mcu_set_eeprom(struct bersa_dev *dev) |
| 3170 | { |
| 3171 | struct bersa_mcu_eeprom req = { |
| 3172 | .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), |
| 3173 | .len = cpu_to_le16(sizeof(req) - 4), |
| 3174 | .buffer_mode = EE_MODE_EFUSE, |
| 3175 | .format = EE_FORMAT_WHOLE |
| 3176 | }; |
| 3177 | |
| 3178 | if (dev->flash_mode) |
| 3179 | return bersa_mcu_set_eeprom_flash(dev); |
| 3180 | |
| 3181 | return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL), |
| 3182 | &req, sizeof(req), true); |
| 3183 | } |
| 3184 | |
| 3185 | int bersa_mcu_get_eeprom(struct bersa_dev *dev, u32 offset) |
| 3186 | { |
| 3187 | struct bersa_mcu_eeprom_info req = { |
| 3188 | .addr = cpu_to_le32(round_down(offset, |
| 3189 | BERSA_EEPROM_BLOCK_SIZE)), |
| 3190 | }; |
| 3191 | struct bersa_mcu_eeprom_info *res; |
| 3192 | struct sk_buff *skb; |
| 3193 | int ret; |
| 3194 | u8 *buf; |
| 3195 | |
| 3196 | ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(EFUSE_ACCESS), &req, |
| 3197 | sizeof(req), true, &skb); |
| 3198 | if (ret) |
| 3199 | return ret; |
| 3200 | |
| 3201 | res = (struct bersa_mcu_eeprom_info *)skb->data; |
| 3202 | buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr); |
| 3203 | memcpy(buf, res->data, BERSA_EEPROM_BLOCK_SIZE); |
| 3204 | dev_kfree_skb(skb); |
| 3205 | |
| 3206 | return 0; |
| 3207 | } |
| 3208 | |
| 3209 | int bersa_mcu_get_eeprom_free_block(struct bersa_dev *dev, u8 *block_num) |
| 3210 | { |
| 3211 | struct { |
| 3212 | u8 _rsv; |
| 3213 | u8 version; |
| 3214 | u8 die_idx; |
| 3215 | u8 _rsv2; |
| 3216 | } __packed req = { |
| 3217 | .version = 1, |
| 3218 | }; |
| 3219 | struct sk_buff *skb; |
| 3220 | int ret; |
| 3221 | |
| 3222 | ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(EFUSE_FREE_BLOCK), &req, |
| 3223 | sizeof(req), true, &skb); |
| 3224 | if (ret) |
| 3225 | return ret; |
| 3226 | |
| 3227 | *block_num = *(u8 *)skb->data; |
| 3228 | dev_kfree_skb(skb); |
| 3229 | |
| 3230 | return 0; |
| 3231 | } |
| 3232 | |
| 3233 | static int bersa_mcu_set_pre_cal(struct bersa_dev *dev, u8 idx, |
| 3234 | u8 *data, u32 len, int cmd) |
| 3235 | { |
| 3236 | struct { |
| 3237 | u8 dir; |
| 3238 | u8 valid; |
| 3239 | __le16 bitmap; |
| 3240 | s8 precal; |
| 3241 | u8 action; |
| 3242 | u8 band; |
| 3243 | u8 idx; |
| 3244 | u8 rsv[4]; |
| 3245 | __le32 len; |
| 3246 | } req = {}; |
| 3247 | struct sk_buff *skb; |
| 3248 | |
| 3249 | skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, sizeof(req) + len); |
| 3250 | if (!skb) |
| 3251 | return -ENOMEM; |
| 3252 | |
| 3253 | req.idx = idx; |
| 3254 | req.len = cpu_to_le32(len); |
| 3255 | skb_put_data(skb, &req, sizeof(req)); |
| 3256 | skb_put_data(skb, data, len); |
| 3257 | |
| 3258 | return mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, false); |
| 3259 | } |
| 3260 | |
| 3261 | int bersa_mcu_apply_group_cal(struct bersa_dev *dev) |
| 3262 | { |
| 3263 | u8 idx = 0, *cal = dev->cal, *eep = dev->mt76.eeprom.data; |
| 3264 | u32 total = MT_EE_CAL_GROUP_SIZE; |
| 3265 | |
| 3266 | if (1 || !(eep[MT_EE_DO_PRE_CAL] & MT_EE_WIFI_CAL_GROUP)) |
| 3267 | return 0; |
| 3268 | |
| 3269 | /* |
| 3270 | * Items: Rx DCOC, RSSI DCOC, Tx TSSI DCOC, Tx LPFG |
| 3271 | * Tx FDIQ, Tx DCIQ, Rx FDIQ, Rx FIIQ, ADCDCOC |
| 3272 | */ |
| 3273 | while (total > 0) { |
| 3274 | int ret, len; |
| 3275 | |
| 3276 | len = min_t(u32, total, MT_EE_CAL_UNIT); |
| 3277 | |
| 3278 | ret = bersa_mcu_set_pre_cal(dev, idx, cal, len, |
| 3279 | MCU_EXT_CMD(GROUP_PRE_CAL_INFO)); |
| 3280 | if (ret) |
| 3281 | return ret; |
| 3282 | |
| 3283 | total -= len; |
| 3284 | cal += len; |
| 3285 | idx++; |
| 3286 | } |
| 3287 | |
| 3288 | return 0; |
| 3289 | } |
| 3290 | |
| 3291 | static int bersa_find_freq_idx(const u16 *freqs, int n_freqs, u16 cur) |
| 3292 | { |
| 3293 | int i; |
| 3294 | |
| 3295 | for (i = 0; i < n_freqs; i++) |
| 3296 | if (cur == freqs[i]) |
| 3297 | return i; |
| 3298 | |
| 3299 | return -1; |
| 3300 | } |
| 3301 | |
| 3302 | static int bersa_dpd_freq_idx(u16 freq, u8 bw) |
| 3303 | { |
| 3304 | static const u16 freq_list[] = { |
| 3305 | 5180, 5200, 5220, 5240, |
| 3306 | 5260, 5280, 5300, 5320, |
| 3307 | 5500, 5520, 5540, 5560, |
| 3308 | 5580, 5600, 5620, 5640, |
| 3309 | 5660, 5680, 5700, 5745, |
| 3310 | 5765, 5785, 5805, 5825 |
| 3311 | }; |
| 3312 | int offset_2g = ARRAY_SIZE(freq_list); |
| 3313 | int idx; |
| 3314 | |
| 3315 | if (freq < 4000) { |
| 3316 | if (freq < 2432) |
| 3317 | return offset_2g; |
| 3318 | if (freq < 2457) |
| 3319 | return offset_2g + 1; |
| 3320 | |
| 3321 | return offset_2g + 2; |
| 3322 | } |
| 3323 | |
| 3324 | if (bw == NL80211_CHAN_WIDTH_80P80 || bw == NL80211_CHAN_WIDTH_160) |
| 3325 | return -1; |
| 3326 | |
| 3327 | if (bw != NL80211_CHAN_WIDTH_20) { |
| 3328 | idx = bersa_find_freq_idx(freq_list, ARRAY_SIZE(freq_list), |
| 3329 | freq + 10); |
| 3330 | if (idx >= 0) |
| 3331 | return idx; |
| 3332 | |
| 3333 | idx = bersa_find_freq_idx(freq_list, ARRAY_SIZE(freq_list), |
| 3334 | freq - 10); |
| 3335 | if (idx >= 0) |
| 3336 | return idx; |
| 3337 | } |
| 3338 | |
| 3339 | return bersa_find_freq_idx(freq_list, ARRAY_SIZE(freq_list), freq); |
| 3340 | } |
| 3341 | |
| 3342 | int bersa_mcu_apply_tx_dpd(struct bersa_phy *phy) |
| 3343 | { |
| 3344 | struct bersa_dev *dev = phy->dev; |
| 3345 | struct cfg80211_chan_def *chandef = &phy->mt76->chandef; |
| 3346 | u16 total = 2, center_freq = chandef->center_freq1; |
| 3347 | u8 *cal = dev->cal, *eep = dev->mt76.eeprom.data; |
| 3348 | int idx; |
| 3349 | |
| 3350 | if (1 || !(eep[MT_EE_DO_PRE_CAL] & MT_EE_WIFI_CAL_DPD)) |
| 3351 | return 0; |
| 3352 | |
| 3353 | idx = bersa_dpd_freq_idx(center_freq, chandef->width); |
| 3354 | if (idx < 0) |
| 3355 | return -EINVAL; |
| 3356 | |
| 3357 | /* Items: Tx DPD, Tx Flatness */ |
| 3358 | idx = idx * 2; |
| 3359 | cal += MT_EE_CAL_GROUP_SIZE; |
| 3360 | |
| 3361 | while (total--) { |
| 3362 | int ret; |
| 3363 | |
| 3364 | cal += (idx * MT_EE_CAL_UNIT); |
| 3365 | ret = bersa_mcu_set_pre_cal(dev, idx, cal, MT_EE_CAL_UNIT, |
| 3366 | MCU_EXT_CMD(DPD_PRE_CAL_INFO)); |
| 3367 | if (ret) |
| 3368 | return ret; |
| 3369 | |
| 3370 | idx++; |
| 3371 | } |
| 3372 | |
| 3373 | return 0; |
| 3374 | } |
| 3375 | |
| 3376 | int bersa_mcu_get_chan_mib_info(struct bersa_phy *phy, bool chan_switch) |
| 3377 | { |
| 3378 | struct { |
| 3379 | struct { |
| 3380 | u8 band; |
| 3381 | u8 __rsv[3]; |
| 3382 | } hdr; |
| 3383 | struct { |
| 3384 | __le16 tag; |
| 3385 | __le16 len; |
| 3386 | __le32 offs; |
| 3387 | } data[4]; |
| 3388 | } __packed req = { |
| 3389 | .hdr.band = phy->band_idx, |
| 3390 | }; |
| 3391 | /* strict order */ |
| 3392 | static const u32 offs[] = { |
| 3393 | MIB_BUSY_TIME, MIB_TX_TIME, MIB_RX_TIME, |
| 3394 | MIB_OBSS_AIRTIME |
| 3395 | }; |
| 3396 | struct mt76_channel_state *state = phy->mt76->chan_state; |
| 3397 | struct mt76_channel_state *state_ts = &phy->state_ts; |
| 3398 | struct bersa_dev *dev = phy->dev; |
| 3399 | struct bersa_mcu_mib *res; |
| 3400 | struct sk_buff *skb; |
| 3401 | int i, ret; |
| 3402 | |
| 3403 | for (i = 0; i < 4; i++) { |
| 3404 | req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA); |
| 3405 | req.data[i].len = cpu_to_le16(sizeof(req.data[i])); |
| 3406 | req.data[i].offs = cpu_to_le32(offs[i]); |
| 3407 | } |
| 3408 | |
| 3409 | ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD(GET_MIB_INFO), |
| 3410 | &req, sizeof(req), true, &skb); |
| 3411 | if (ret) |
| 3412 | return ret; |
| 3413 | |
| 3414 | skb_pull(skb, sizeof(req.hdr)); |
| 3415 | |
| 3416 | res = (struct bersa_mcu_mib *)(skb->data); |
| 3417 | |
| 3418 | if (chan_switch) |
| 3419 | goto out; |
| 3420 | |
| 3421 | #define __res_u64(s) le64_to_cpu(res[s].data) |
| 3422 | state->cc_busy += __res_u64(0) - state_ts->cc_busy; |
| 3423 | state->cc_tx += __res_u64(1) - state_ts->cc_tx; |
| 3424 | state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx; |
| 3425 | state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx; |
| 3426 | |
| 3427 | out: |
| 3428 | state_ts->cc_busy = __res_u64(0); |
| 3429 | state_ts->cc_tx = __res_u64(1); |
| 3430 | state_ts->cc_bss_rx = __res_u64(2); |
| 3431 | state_ts->cc_rx = __res_u64(2) + __res_u64(3); |
| 3432 | #undef __res_u64 |
| 3433 | |
| 3434 | dev_kfree_skb(skb); |
| 3435 | |
| 3436 | return 0; |
| 3437 | } |
| 3438 | |
| 3439 | int bersa_mcu_get_temperature(struct bersa_phy *phy) |
| 3440 | { |
| 3441 | struct bersa_dev *dev = phy->dev; |
| 3442 | struct { |
| 3443 | u8 ctrl_id; |
| 3444 | u8 action; |
| 3445 | u8 band; |
| 3446 | u8 rsv[5]; |
| 3447 | } req = { |
| 3448 | .ctrl_id = THERMAL_SENSOR_TEMP_QUERY, |
| 3449 | .band = phy->band_idx, |
| 3450 | }; |
| 3451 | |
| 3452 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_CTRL), &req, |
| 3453 | sizeof(req), true); |
| 3454 | } |
| 3455 | |
| 3456 | int bersa_mcu_set_thermal_throttling(struct bersa_phy *phy, u8 state) |
| 3457 | { |
| 3458 | struct bersa_dev *dev = phy->dev; |
| 3459 | struct { |
| 3460 | struct bersa_mcu_thermal_ctrl ctrl; |
| 3461 | |
| 3462 | __le32 trigger_temp; |
| 3463 | __le32 restore_temp; |
| 3464 | __le16 sustain_time; |
| 3465 | u8 rsv[2]; |
| 3466 | } __packed req = { |
| 3467 | .ctrl = { |
| 3468 | .band_idx = phy->band_idx, |
| 3469 | }, |
| 3470 | }; |
| 3471 | int level; |
| 3472 | |
| 3473 | if (!state) { |
| 3474 | req.ctrl.ctrl_id = THERMAL_PROTECT_DISABLE; |
| 3475 | goto out; |
| 3476 | } |
| 3477 | |
| 3478 | /* set duty cycle and level */ |
| 3479 | for (level = 0; level < 4; level++) { |
| 3480 | int ret; |
| 3481 | |
| 3482 | req.ctrl.ctrl_id = THERMAL_PROTECT_DUTY_CONFIG; |
| 3483 | req.ctrl.duty.duty_level = level; |
| 3484 | req.ctrl.duty.duty_cycle = state; |
| 3485 | state /= 2; |
| 3486 | |
| 3487 | ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT), |
| 3488 | &req, sizeof(req.ctrl), false); |
| 3489 | if (ret) |
| 3490 | return ret; |
| 3491 | } |
| 3492 | |
| 3493 | /* set high-temperature trigger threshold */ |
| 3494 | req.ctrl.ctrl_id = THERMAL_PROTECT_ENABLE; |
| 3495 | /* add a safety margin ~10 */ |
| 3496 | req.restore_temp = cpu_to_le32(phy->throttle_temp[0] - 10); |
| 3497 | req.trigger_temp = cpu_to_le32(phy->throttle_temp[1]); |
| 3498 | req.sustain_time = cpu_to_le16(10); |
| 3499 | |
| 3500 | out: |
| 3501 | req.ctrl.type.protect_type = 1; |
| 3502 | req.ctrl.type.trigger_type = 1; |
| 3503 | |
| 3504 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT), |
| 3505 | &req, sizeof(req), false); |
| 3506 | } |
| 3507 | |
| 3508 | #if 0 |
| 3509 | int bersa_mcu_set_txpower_sku(struct bersa_phy *phy) |
| 3510 | { |
| 3511 | struct bersa_dev *dev = phy->dev; |
| 3512 | struct mt76_phy *mphy = phy->mt76; |
| 3513 | struct ieee80211_hw *hw = mphy->hw; |
| 3514 | struct bersa_sku_val { |
| 3515 | u8 format_id; |
| 3516 | u8 limit_type; |
| 3517 | u8 band; |
| 3518 | s8 val[BERSA_SKU_RATE_NUM]; |
| 3519 | } __packed req = { |
| 3520 | .format_id = 4, |
| 3521 | .band = phy->band_idx, |
| 3522 | }; |
| 3523 | struct mt76_power_limits limits_array; |
| 3524 | s8 *la = (s8 *)&limits_array; |
| 3525 | int i, idx, n_chains = hweight8(mphy->antenna_mask); |
| 3526 | int tx_power = hw->conf.power_level * 2; |
| 3527 | |
| 3528 | tx_power = mt76_get_sar_power(mphy, mphy->chandef.chan, |
| 3529 | tx_power); |
| 3530 | tx_power -= mt76_tx_power_nss_delta(n_chains); |
| 3531 | tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, |
| 3532 | &limits_array, tx_power); |
| 3533 | mphy->txpower_cur = tx_power; |
| 3534 | |
| 3535 | for (i = 0, idx = 0; i < ARRAY_SIZE(bersa_sku_group_len); i++) { |
| 3536 | u8 mcs_num, len = bersa_sku_group_len[i]; |
| 3537 | int j; |
| 3538 | |
| 3539 | if (i >= SKU_HT_BW20 && i <= SKU_VHT_BW160) { |
| 3540 | mcs_num = 10; |
| 3541 | |
| 3542 | if (i == SKU_HT_BW20 || i == SKU_VHT_BW20) |
| 3543 | la = (s8 *)&limits_array + 12; |
| 3544 | } else { |
| 3545 | mcs_num = len; |
| 3546 | } |
| 3547 | |
| 3548 | for (j = 0; j < min_t(u8, mcs_num, len); j++) |
| 3549 | req.val[idx + j] = la[j]; |
| 3550 | |
| 3551 | la += mcs_num; |
| 3552 | idx += len; |
| 3553 | } |
| 3554 | |
| 3555 | return mt76_mcu_send_msg(&dev->mt76, |
| 3556 | MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, |
| 3557 | sizeof(req), true); |
| 3558 | } |
| 3559 | #endif |
| 3560 | |
| 3561 | int bersa_mcu_get_txpower_sku(struct bersa_phy *phy, s8 *txpower, int len) |
| 3562 | { |
| 3563 | #define RATE_POWER_INFO 2 |
| 3564 | struct bersa_dev *dev = phy->dev; |
| 3565 | struct { |
| 3566 | u8 _rsv[4]; |
| 3567 | |
| 3568 | __le16 tag; |
| 3569 | __le16 len; |
| 3570 | |
| 3571 | u8 format_id; |
| 3572 | u8 category; |
| 3573 | u8 band; |
| 3574 | u8 _rsv2; |
| 3575 | } __packed req = { |
| 3576 | .tag = cpu_to_le16(UNI_TXPOWER_SHOW_INFO), |
| 3577 | .len = cpu_to_le16(sizeof(req) - 4), |
| 3578 | .format_id = 7, |
| 3579 | .category = RATE_POWER_INFO, |
| 3580 | .band = phy->band_idx, |
| 3581 | }; |
| 3582 | s8 res[BERSA_SKU_RATE_NUM][3]; |
| 3583 | struct sk_buff *skb; |
| 3584 | int ret, i; |
| 3585 | |
| 3586 | ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD(TXPOWER), |
| 3587 | &req, sizeof(req), true, &skb); |
| 3588 | if (ret) |
| 3589 | return ret; |
| 3590 | |
| 3591 | /* TODO: support EHT rates */ |
| 3592 | skb_pull(skb, 4 + sizeof(struct tlv)); |
| 3593 | memcpy(res, skb->data, sizeof(res)); |
| 3594 | for (i = 0; i < len; i++) |
| 3595 | txpower[i] = res[i][req.band]; |
| 3596 | |
| 3597 | dev_kfree_skb(skb); |
| 3598 | |
| 3599 | return 0; |
| 3600 | } |
| 3601 | |
| 3602 | int bersa_mcu_set_test_param(struct bersa_dev *dev, u8 param, bool test_mode, |
| 3603 | u8 en) |
| 3604 | { |
| 3605 | struct { |
| 3606 | u8 test_mode_en; |
| 3607 | u8 param_idx; |
| 3608 | u8 _rsv[2]; |
| 3609 | |
| 3610 | u8 enable; |
| 3611 | u8 _rsv2[3]; |
| 3612 | |
| 3613 | u8 pad[8]; |
| 3614 | } __packed req = { |
| 3615 | .test_mode_en = test_mode, |
| 3616 | .param_idx = param, |
| 3617 | .enable = en, |
| 3618 | }; |
| 3619 | |
| 3620 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req, |
| 3621 | sizeof(req), false); |
| 3622 | } |
| 3623 | |
| 3624 | int bersa_mcu_set_sku_en(struct bersa_phy *phy, bool enable) |
| 3625 | { |
| 3626 | struct bersa_dev *dev = phy->dev; |
| 3627 | struct bersa_sku { |
| 3628 | u8 format_id; |
| 3629 | u8 sku_enable; |
| 3630 | u8 band; |
| 3631 | u8 rsv; |
| 3632 | } __packed req = { |
| 3633 | .format_id = 0, |
| 3634 | .band = phy->band_idx, |
| 3635 | .sku_enable = enable, |
| 3636 | }; |
| 3637 | |
| 3638 | return mt76_mcu_send_msg(&dev->mt76, |
| 3639 | MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, |
| 3640 | sizeof(req), true); |
| 3641 | } |
| 3642 | |
| 3643 | int bersa_mcu_set_ser(struct bersa_dev *dev, u8 action, u8 set, u8 band) |
| 3644 | { |
| 3645 | struct { |
| 3646 | u8 action; |
| 3647 | u8 set; |
| 3648 | u8 band; |
| 3649 | u8 rsv; |
| 3650 | } req = { |
| 3651 | .action = action, |
| 3652 | .set = set, |
| 3653 | .band = band, |
| 3654 | }; |
| 3655 | |
| 3656 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SER_TRIGGER), |
| 3657 | &req, sizeof(req), false); |
| 3658 | } |
| 3659 | |
| 3660 | int bersa_mcu_set_txbf(struct bersa_dev *dev, u8 action) |
| 3661 | { |
| 3662 | struct { |
| 3663 | u8 action; |
| 3664 | union { |
| 3665 | struct { |
| 3666 | u8 snd_mode; |
| 3667 | u8 sta_num; |
| 3668 | u8 rsv; |
| 3669 | u8 wlan_idx[4]; |
| 3670 | __le32 snd_period; /* ms */ |
| 3671 | } __packed snd; |
| 3672 | struct { |
| 3673 | bool ebf; |
| 3674 | bool ibf; |
| 3675 | u8 rsv; |
| 3676 | } __packed type; |
| 3677 | struct { |
| 3678 | u8 bf_num; |
| 3679 | u8 bf_bitmap; |
| 3680 | u8 bf_sel[8]; |
| 3681 | u8 rsv[5]; |
| 3682 | } __packed mod; |
| 3683 | }; |
| 3684 | } __packed req = { |
| 3685 | .action = action, |
| 3686 | }; |
| 3687 | |
| 3688 | #define MT_BF_PROCESSING 4 |
| 3689 | switch (action) { |
| 3690 | case MT_BF_SOUNDING_ON: |
| 3691 | req.snd.snd_mode = MT_BF_PROCESSING; |
| 3692 | break; |
| 3693 | case MT_BF_TYPE_UPDATE: |
| 3694 | req.type.ebf = true; |
| 3695 | req.type.ibf = dev->ibf; |
| 3696 | break; |
| 3697 | case MT_BF_MODULE_UPDATE: |
| 3698 | req.mod.bf_num = 2; |
| 3699 | req.mod.bf_bitmap = GENMASK(1, 0); |
| 3700 | break; |
| 3701 | default: |
| 3702 | return -EINVAL; |
| 3703 | } |
| 3704 | |
| 3705 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req, |
| 3706 | sizeof(req), true); |
| 3707 | } |
| 3708 | |
| 3709 | int bersa_mcu_add_obss_spr(struct bersa_dev *dev, struct ieee80211_vif *vif, |
| 3710 | bool enable) |
| 3711 | { |
| 3712 | #define MT_SPR_ENABLE 1 |
| 3713 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 3714 | struct { |
| 3715 | u8 action; |
| 3716 | u8 arg_num; |
| 3717 | u8 band_idx; |
| 3718 | u8 status; |
| 3719 | u8 drop_tx_idx; |
| 3720 | u8 sta_idx; /* 256 sta */ |
| 3721 | u8 rsv[2]; |
| 3722 | __le32 val; |
| 3723 | } __packed req = { |
| 3724 | .action = MT_SPR_ENABLE, |
| 3725 | .arg_num = 1, |
| 3726 | .band_idx = mvif->mt76.band_idx, |
| 3727 | .val = cpu_to_le32(enable), |
| 3728 | }; |
| 3729 | |
| 3730 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req, |
| 3731 | sizeof(req), true); |
| 3732 | } |
| 3733 | |
| 3734 | int bersa_mcu_get_rx_rate(struct bersa_phy *phy, struct ieee80211_vif *vif, |
| 3735 | struct ieee80211_sta *sta, struct rate_info *rate) |
| 3736 | { |
| 3737 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 3738 | struct bersa_sta *msta = (struct bersa_sta *)sta->drv_priv; |
| 3739 | struct bersa_dev *dev = phy->dev; |
| 3740 | struct mt76_phy *mphy = phy->mt76; |
| 3741 | struct { |
| 3742 | u8 category; |
| 3743 | u8 band; |
| 3744 | __le16 wcid; |
| 3745 | } __packed req = { |
| 3746 | .category = MCU_PHY_STATE_CONTENTION_RX_RATE, |
| 3747 | .band = mvif->mt76.band_idx, |
| 3748 | .wcid = cpu_to_le16(msta->wcid.idx), |
| 3749 | }; |
| 3750 | struct ieee80211_supported_band *sband; |
| 3751 | struct bersa_mcu_phy_rx_info *res; |
| 3752 | struct sk_buff *skb; |
| 3753 | int ret; |
| 3754 | bool cck = false; |
| 3755 | |
| 3756 | ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(PHY_STAT_INFO), |
| 3757 | &req, sizeof(req), true, &skb); |
| 3758 | if (ret) |
| 3759 | return ret; |
| 3760 | |
| 3761 | res = (struct bersa_mcu_phy_rx_info *)skb->data; |
| 3762 | |
| 3763 | rate->mcs = res->rate; |
| 3764 | rate->nss = res->nsts + 1; |
| 3765 | |
| 3766 | switch (res->mode) { |
| 3767 | case MT_PHY_TYPE_CCK: |
| 3768 | cck = true; |
| 3769 | fallthrough; |
| 3770 | case MT_PHY_TYPE_OFDM: |
| 3771 | if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) |
| 3772 | sband = &mphy->sband_5g.sband; |
| 3773 | else |
| 3774 | sband = &mphy->sband_2g.sband; |
| 3775 | |
| 3776 | rate->mcs = mt76_get_rate(&dev->mt76, sband, rate->mcs, cck); |
| 3777 | rate->legacy = sband->bitrates[rate->mcs].bitrate; |
| 3778 | break; |
| 3779 | case MT_PHY_TYPE_HT: |
| 3780 | case MT_PHY_TYPE_HT_GF: |
| 3781 | if (rate->mcs > 31) { |
| 3782 | ret = -EINVAL; |
| 3783 | goto out; |
| 3784 | } |
| 3785 | |
| 3786 | rate->flags = RATE_INFO_FLAGS_MCS; |
| 3787 | if (res->gi) |
| 3788 | rate->flags |= RATE_INFO_FLAGS_SHORT_GI; |
| 3789 | break; |
| 3790 | case MT_PHY_TYPE_VHT: |
| 3791 | if (rate->mcs > 9) { |
| 3792 | ret = -EINVAL; |
| 3793 | goto out; |
| 3794 | } |
| 3795 | |
| 3796 | rate->flags = RATE_INFO_FLAGS_VHT_MCS; |
| 3797 | if (res->gi) |
| 3798 | rate->flags |= RATE_INFO_FLAGS_SHORT_GI; |
| 3799 | break; |
| 3800 | case MT_PHY_TYPE_HE_SU: |
| 3801 | case MT_PHY_TYPE_HE_EXT_SU: |
| 3802 | case MT_PHY_TYPE_HE_TB: |
| 3803 | case MT_PHY_TYPE_HE_MU: |
| 3804 | if (res->gi > NL80211_RATE_INFO_HE_GI_3_2 || rate->mcs > 11) { |
| 3805 | ret = -EINVAL; |
| 3806 | goto out; |
| 3807 | } |
| 3808 | rate->he_gi = res->gi; |
| 3809 | rate->flags = RATE_INFO_FLAGS_HE_MCS; |
| 3810 | break; |
| 3811 | default: |
| 3812 | ret = -EINVAL; |
| 3813 | goto out; |
| 3814 | } |
| 3815 | |
| 3816 | switch (res->bw) { |
| 3817 | case IEEE80211_STA_RX_BW_160: |
| 3818 | rate->bw = RATE_INFO_BW_160; |
| 3819 | break; |
| 3820 | case IEEE80211_STA_RX_BW_80: |
| 3821 | rate->bw = RATE_INFO_BW_80; |
| 3822 | break; |
| 3823 | case IEEE80211_STA_RX_BW_40: |
| 3824 | rate->bw = RATE_INFO_BW_40; |
| 3825 | break; |
| 3826 | default: |
| 3827 | rate->bw = RATE_INFO_BW_20; |
| 3828 | break; |
| 3829 | } |
| 3830 | |
| 3831 | out: |
| 3832 | dev_kfree_skb(skb); |
| 3833 | |
| 3834 | return ret; |
| 3835 | } |
| 3836 | |
| 3837 | int bersa_mcu_update_bss_color(struct bersa_dev *dev, struct ieee80211_vif *vif, |
| 3838 | struct cfg80211_he_bss_color *he_bss_color) |
| 3839 | { |
| 3840 | int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv); |
| 3841 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 3842 | struct bss_color_tlv *bss_color; |
| 3843 | struct sk_buff *skb; |
| 3844 | struct tlv *tlv; |
| 3845 | |
| 3846 | skb = __bersa_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, len); |
| 3847 | if (IS_ERR(skb)) |
| 3848 | return PTR_ERR(skb); |
| 3849 | |
| 3850 | tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR, |
| 3851 | sizeof(*bss_color)); |
| 3852 | bss_color = (struct bss_color_tlv *)tlv; |
| 3853 | bss_color->enable = he_bss_color->enabled; |
| 3854 | bss_color->color = he_bss_color->color; |
| 3855 | |
| 3856 | return mt76_mcu_skb_send_msg(&dev->mt76, skb, |
| 3857 | MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); |
| 3858 | } |
| 3859 | |
| 3860 | #define TWT_AGRT_TRIGGER BIT(0) |
| 3861 | #define TWT_AGRT_ANNOUNCE BIT(1) |
| 3862 | #define TWT_AGRT_PROTECT BIT(2) |
| 3863 | |
| 3864 | int bersa_mcu_twt_agrt_update(struct bersa_dev *dev, |
| 3865 | struct bersa_vif *mvif, |
| 3866 | struct bersa_twt_flow *flow, |
| 3867 | int cmd) |
| 3868 | { |
| 3869 | struct { |
| 3870 | u8 tbl_idx; |
| 3871 | u8 cmd; |
| 3872 | u8 own_mac_idx; |
| 3873 | u8 flowid; /* 0xff for group id */ |
| 3874 | __le16 peer_id; /* specify the peer_id (msb=0) |
| 3875 | * or group_id (msb=1) |
| 3876 | */ |
| 3877 | u8 duration; /* 256 us */ |
| 3878 | u8 bss_idx; |
| 3879 | __le64 start_tsf; |
| 3880 | __le16 mantissa; |
| 3881 | u8 exponent; |
| 3882 | u8 is_ap; |
| 3883 | u8 agrt_params; |
| 3884 | u8 rsv[23]; |
| 3885 | } __packed req = { |
| 3886 | .tbl_idx = flow->table_id, |
| 3887 | .cmd = cmd, |
| 3888 | .own_mac_idx = mvif->mt76.omac_idx, |
| 3889 | .flowid = flow->id, |
| 3890 | .peer_id = cpu_to_le16(flow->wcid), |
| 3891 | .duration = flow->duration, |
| 3892 | .bss_idx = mvif->mt76.idx, |
| 3893 | .start_tsf = cpu_to_le64(flow->tsf), |
| 3894 | .mantissa = flow->mantissa, |
| 3895 | .exponent = flow->exp, |
| 3896 | .is_ap = true, |
| 3897 | }; |
| 3898 | |
| 3899 | if (flow->protection) |
| 3900 | req.agrt_params |= TWT_AGRT_PROTECT; |
| 3901 | if (!flow->flowtype) |
| 3902 | req.agrt_params |= TWT_AGRT_ANNOUNCE; |
| 3903 | if (flow->trigger) |
| 3904 | req.agrt_params |= TWT_AGRT_TRIGGER; |
| 3905 | |
| 3906 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TWT_AGRT_UPDATE), |
| 3907 | &req, sizeof(req), true); |
| 3908 | } |
| 3909 | |
| 3910 | |
| 3911 | void bersa_mcu_set_pm(void *priv, u8 *mac, struct ieee80211_vif *vif) |
| 3912 | { |
| 3913 | #define EXIT_PM_STATE 0 |
| 3914 | #define ENTER_PM_STATE 1 |
| 3915 | struct ieee80211_hw *hw = priv; |
| 3916 | struct bersa_dev *dev = bersa_hw_dev(hw); |
| 3917 | struct bersa_phy *phy = bersa_hw_phy(hw); |
| 3918 | struct bersa_vif *mvif = (struct bersa_vif *)vif->drv_priv; |
| 3919 | struct bss_power_save *ps; |
| 3920 | struct sk_buff *skb; |
| 3921 | struct tlv *tlv; |
| 3922 | bool running = test_bit(MT76_STATE_RUNNING, &phy->mt76->state); |
| 3923 | |
| 3924 | skb = __bersa_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, |
| 3925 | BERSA_BSS_UPDATE_MAX_SIZE); |
| 3926 | if (IS_ERR(skb)) |
| 3927 | return; |
| 3928 | |
| 3929 | tlv = bersa_mcu_add_uni_tlv(skb, UNI_BSS_INFO_PS, sizeof(*ps)); |
| 3930 | ps = (struct bss_power_save *)tlv; |
| 3931 | ps->profile = running ? EXIT_PM_STATE : ENTER_PM_STATE; |
| 3932 | |
| 3933 | mt76_mcu_skb_send_msg(&dev->mt76, skb, |
| 3934 | MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); |
| 3935 | } |
| 3936 | |
| 3937 | int bersa_mcu_set_rts_thresh(struct bersa_phy *phy, u32 val) |
| 3938 | { |
| 3939 | struct { |
| 3940 | u8 band_idx; |
| 3941 | u8 _rsv[3]; |
| 3942 | |
| 3943 | __le16 tag; |
| 3944 | __le16 len; |
| 3945 | __le32 len_thresh; |
| 3946 | __le32 pkt_thresh; |
| 3947 | } __packed req = { |
| 3948 | .band_idx = phy->band_idx, |
| 3949 | .tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD), |
| 3950 | .len = cpu_to_le16(sizeof(req) - 4), |
| 3951 | .len_thresh = cpu_to_le32(val), |
| 3952 | .pkt_thresh = cpu_to_le32(0x2), |
| 3953 | }; |
| 3954 | |
| 3955 | return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), |
| 3956 | &req, sizeof(req), true); |
| 3957 | } |
| 3958 | |
| 3959 | int bersa_mcu_set_radio_en(struct bersa_phy *phy, bool enable) |
| 3960 | { |
| 3961 | struct { |
| 3962 | u8 band_idx; |
| 3963 | u8 _rsv[3]; |
| 3964 | |
| 3965 | __le16 tag; |
| 3966 | __le16 len; |
| 3967 | u8 enable; |
| 3968 | u8 _rsv2[3]; |
| 3969 | } __packed req = { |
| 3970 | .band_idx = phy->band_idx, |
| 3971 | .tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE), |
| 3972 | .len = cpu_to_le16(sizeof(req) - 4), |
| 3973 | .enable = enable, |
| 3974 | }; |
| 3975 | |
| 3976 | return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), |
| 3977 | &req, sizeof(req), true); |
| 3978 | } |
| 3979 | |
| 3980 | int bersa_mcu_set_edcca_thresh(struct bersa_phy *phy) |
| 3981 | { |
| 3982 | struct { |
| 3983 | u8 band_idx; |
| 3984 | u8 _rsv[3]; |
| 3985 | |
| 3986 | __le16 tag; |
| 3987 | __le16 len; |
| 3988 | u8 thresh[3]; |
| 3989 | u8 fginit; |
| 3990 | } __packed req = { |
| 3991 | .band_idx = phy->band_idx, |
| 3992 | .tag = cpu_to_le16(UNI_BAND_CONFIG_EDCCA_THRESHOLD), |
| 3993 | .len = cpu_to_le16(sizeof(req) - 4), |
| 3994 | .thresh = {0x7f, 0x7f, 0x7f}, |
| 3995 | .fginit = 1, |
| 3996 | }; |
| 3997 | |
| 3998 | return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), |
| 3999 | &req, sizeof(req), true); |
| 4000 | } |
| 4001 | |
| 4002 | int bersa_mcu_set_edcca_en(struct bersa_phy *phy, bool enable) |
| 4003 | { |
| 4004 | struct { |
| 4005 | u8 band_idx; |
| 4006 | u8 _rsv[3]; |
| 4007 | |
| 4008 | __le16 tag; |
| 4009 | __le16 len; |
| 4010 | u8 enable; |
| 4011 | u8 _rsv2[3]; |
| 4012 | } __packed req = { |
| 4013 | .band_idx = phy->band_idx, |
| 4014 | .tag = cpu_to_le16(UNI_BAND_CONFIG_EDCCA_ENABLE), |
| 4015 | .len = cpu_to_le16(sizeof(req) - 4), |
| 4016 | .enable = enable, |
| 4017 | }; |
| 4018 | |
| 4019 | return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), |
| 4020 | &req, sizeof(req), true); |
| 4021 | } |
| 4022 | |
| 4023 | int bersa_mcu_rdd_cmd(struct bersa_dev *dev, int cmd, u8 index, |
| 4024 | u8 rx_sel, u8 val) |
| 4025 | { |
| 4026 | struct { |
| 4027 | u8 _rsv[4]; |
| 4028 | |
| 4029 | __le16 tag; |
| 4030 | __le16 len; |
| 4031 | |
| 4032 | u8 ctrl; |
| 4033 | u8 rdd_idx; |
| 4034 | u8 rdd_rx_sel; |
| 4035 | u8 val; |
| 4036 | u8 rsv[4]; |
| 4037 | } __packed req = { |
| 4038 | .tag = cpu_to_le16(UNI_RDD_CTRL_PARM), |
| 4039 | .len = cpu_to_le16(sizeof(req) - 4), |
| 4040 | .ctrl = cmd, |
| 4041 | .rdd_idx = index, |
| 4042 | .rdd_rx_sel = rx_sel, |
| 4043 | .val = val, |
| 4044 | }; |
| 4045 | |
| 4046 | /* Todo: check return value. return 0 is bellwether workaround. |
| 4047 | Bellwether does not enable RDD. |
| 4048 | */ |
| 4049 | mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), |
| 4050 | &req, sizeof(req), true); |
| 4051 | return 0; |
| 4052 | } |