blob: cfca603ad5b0e3338a2d14fe141bf90d914c2e05 [file] [log] [blame]
developerfd40db22021-04-29 10:08:25 +08001/* SPDX-License-Identifier: GPL-2.0
2 *
3 * Copyright (c) 2019 MediaTek Inc.
4 * Author: Harry Huang <harry.huang@mediatek.com>
5 */
6
7#ifndef _RA_NAT_WANTED
8#define _RA_NAT_WANTED
9
10#include <linux/ip.h>
11#include <linux/ipv6.h>
12
13
14#ifndef NEXTHDR_IPIP
15#define NEXTHDR_IPIP 4
16#endif
17
18#define hwnat_vlan_tx_tag_present(__skb) ((__skb)->vlan_tci & VLAN_TAG_PRESENT)
19#define hwnat_vlan_tag_get(__skb) ((__skb)->vlan_tci & ~VLAN_TAG_PRESENT)
20
21#if defined(CONFIG_HW_NAT)
22extern void hwnat_magic_tag_set_zero(struct sk_buff *skb);
23extern void hwnat_check_magic_tag(struct sk_buff *skb);
24extern void hwnat_set_headroom_zero(struct sk_buff *skb);
25extern void hwnat_set_tailroom_zero(struct sk_buff *skb);
26extern void hwnat_copy_headroom(u8 *data, struct sk_buff *skb);
27extern void hwnat_copy_tailroom(u8 *data, int size, struct sk_buff *skb);
28extern void hwnat_setup_dma_ops(struct device *dev, bool coherent);
29#else
30
31static inline void hwnat_magic_tag_set_zero(struct sk_buff *skb)
32{
33}
34
35static inline void hwnat_check_magic_tag(struct sk_buff *skb)
36{
37}
38
39static inline void hwnat_set_headroom_zero(struct sk_buff *skb)
40{
41}
42
43static inline void hwnat_set_tailroom_zero(struct sk_buff *skb)
44{
45}
46
47static inline void hwnat_copy_headroom(u8 *data, struct sk_buff *skb)
48{
49}
50
51static inline void hwnat_copy_tailroom(u8 *data, int size, struct sk_buff *skb)
52{
53}
54
55#endif
56enum foe_cpu_reason {
57 TTL_0 = 0x02, /* IPv4(IPv6) TTL(hop limit) = 0 */
58 /* IPv4(IPv6) has option(extension) header */
59 HAS_OPTION_HEADER = 0x03,
60 NO_FLOW_IS_ASSIGNED = 0x07, /* No flow is assigned */
61 /* IPv4 HNAT doesn't support IPv4 /w fragment */
62 IPV4_WITH_FRAGMENT = 0x08,
63 /* IPv4 HNAPT/DS-Lite doesn't support IPv4 /w fragment */
64 IPV4_HNAPT_DSLITE_WITH_FRAGMENT = 0x09,
65 /* IPv4 HNAPT/DS-Lite can't find TCP/UDP sport/dport */
66 IPV4_HNAPT_DSLITE_WITHOUT_TCP_UDP = 0x0A,
67 /* IPv6 5T-route/6RD can't find TCP/UDP sport/dport */
68 IPV6_5T_6RD_WITHOUT_TCP_UDP = 0x0B,
69 /* Ingress packet is TCP fin/syn/rst */
70 /*(for IPv4 NAPT/DS-Lite or IPv6 5T-route/6RD) */
71 TCP_FIN_SYN_RST = 0x0C,
72 UN_HIT = 0x0D, /* FOE Un-hit */
73 HIT_UNBIND = 0x0E, /* FOE Hit unbind */
74 /* FOE Hit unbind & rate reach */
75 HIT_UNBIND_RATE_REACH = 0x0F,
76 HIT_BIND_TCP_FIN = 0x10, /* Hit bind PPE TCP FIN entry */
77 /* Hit bind PPE entry and TTL(hop limit) = 1 */
78 /* and TTL(hot limit) - 1 */
79 HIT_BIND_TTL_1 = 0x11,
80 /* Hit bind and VLAN replacement violation */
81 /*(Ingress 1(0) VLAN layers and egress 4(3 or 4) VLAN layers) */
82 HIT_BIND_WITH_VLAN_VIOLATION = 0x12,
83 /* Hit bind and keep alive with unicast old-header packet */
84 HIT_BIND_KEEPALIVE_UC_OLD_HDR = 0x13,
85 /* Hit bind and keep alive with multicast new-header packet */
86 HIT_BIND_KEEPALIVE_MC_NEW_HDR = 0x14,
87 /* Hit bind and keep alive with duplicate old-header packet */
88 HIT_BIND_KEEPALIVE_DUP_OLD_HDR = 0x15,
89 /* FOE Hit bind & force to CPU */
90 HIT_BIND_FORCE_TO_CPU = 0x16,
91 /* Hit bind and remove tunnel IP header, */
92 /* but inner IP has option/next header */
93 HIT_BIND_WITH_OPTION_HEADER = 0x17,
94 /* Hit bind and exceed MTU */
95 HIT_BIND_EXCEED_MTU = 0x1C,
96 HIT_BIND_PACKET_SAMPLING = 0x1B, /* PS packet */
97 /* Switch clone multicast packet to CPU */
98 HIT_BIND_MULTICAST_TO_CPU = 0x18,
99 /* Switch clone multicast packet to GMAC1 & CPU */
100 HIT_BIND_MULTICAST_TO_GMAC_CPU = 0x19,
101 HIT_PRE_BIND = 0x1A /* Pre-bind */
102};
103
104#define MAX_IF_NUM 64
105
developerd35bbcc2022-09-28 22:46:01 +0800106#if defined(CONFIG_MEDIATEK_NETSYS_V3)
developerfd40db22021-04-29 10:08:25 +0800107struct dmad_rx_descinfo4 {
108 uint32_t foe_entry_num:15;
109 uint32_t rsv0:3;
110 uint32_t CRSN:5;
111 uint32_t rsv1:3;
112 uint32_t SPORT:4;
113 uint32_t ppe:1;
114 uint32_t ALG:1;
115 uint32_t IF:8;
116 uint32_t WDMAID:2;
117 uint32_t RXID:2;
developerd35bbcc2022-09-28 22:46:01 +0800118 uint32_t WCID:16;
119 uint32_t BSSID:8;
120 uint32_t USR_INFO:16;
121 uint32_t TID:4;
122 uint32_t IS_FIXEDRATE:1;
123 uint32_t IS_PRIOR:1;
124 uint32_t IS_SP:1;
125 uint32_t HF:1;
126 uint32_t AMSDU:1;
127 uint16_t minfo:1;
128 uint16_t ntype:3;
129 uint16_t chid:8;
130 uint16_t rsv2:7;
131 u16 MAGIC_TAG_PROTECT;
132} __packed;
developer8ecd51b2023-03-13 11:28:28 +0800133#elif defined(CONFIG_MEDIATEK_NETSYS_RX_V2)
developerd35bbcc2022-09-28 22:46:01 +0800134struct dmad_rx_descinfo4 {
135 uint32_t foe_entry_num:15;
136 uint32_t rsv0:3;
137 uint32_t CRSN:5;
138 uint32_t rsv1:3;
139 uint32_t SPORT:4;
140 uint32_t ppe:1;
141 uint32_t ALG:1;
142 uint32_t IF:8;
143 uint32_t WDMAID:2;
144 uint32_t RXID:2;
developerfd40db22021-04-29 10:08:25 +0800145 uint32_t WCID:10;
146 uint32_t BSSID:6;
147 uint32_t rsv3:4;
148 uint16_t minfo:1;
149 uint16_t ntype:3;
150 uint16_t chid:8;
151 uint16_t rsv4:4;
152 u16 MAGIC_TAG_PROTECT;
153} __packed;
developer4ca501a2023-01-30 16:57:07 +0800154#else
155struct dmad_rx_descinfo4 {
156 uint32_t foe_entry_num:14;
157 uint32_t CRSN:5;
developer8ecd51b2023-03-13 11:28:28 +0800158 uint32_t SPORT:4;
developer4ca501a2023-01-30 16:57:07 +0800159 uint32_t ALG:1;
160 uint32_t IF:8;
developer8ecd51b2023-03-13 11:28:28 +0800161 uint32_t ppe:1;
162 uint32_t rsv2:3;
developer4ca501a2023-01-30 16:57:07 +0800163 uint32_t MAGIC_TAG_PROTECT: 16;
164 uint32_t WDMAID:8;
165 uint32_t RXID:2;
developer8ecd51b2023-03-13 11:28:28 +0800166 uint32_t WCID:10;
developer4ca501a2023-01-30 16:57:07 +0800167 uint32_t BSSID:6;
168#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
169 u16 SOURCE;
170 u16 DEST;
171#endif
172} __packed;
developerd35bbcc2022-09-28 22:46:01 +0800173#endif
developerfd40db22021-04-29 10:08:25 +0800174
175struct pdma_rx_desc_info4 {
176 u16 MAGIC_TAG_PROTECT;
177 uint32_t foe_entry_num:14;
178 uint32_t CRSN:5;
179 uint32_t SPORT:4;
180 uint32_t rsv:6;
181 uint32_t foe_entry_num_1:1;
182 uint32_t ppe:1;
183 uint32_t ALG:1;
184 uint32_t IF:8;
185 uint32_t WDMAID:2;
186 uint32_t RXID:2;
187 uint32_t WCID:10;
188 uint32_t BSSID:6;
189 uint32_t rsv2:4;
190 uint16_t minfo:1;
191 uint16_t ntype:3;
192 uint16_t chid:8;
193 uint16_t rsv3:4;
194#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
195 u16 SOURCE;
196 u16 DEST;
197#endif
198} __packed;
199
developer8ecd51b2023-03-13 11:28:28 +0800200#if defined(CONFIG_MEDIATEK_NETSYS_RX_V2)
developerfd40db22021-04-29 10:08:25 +0800201struct head_rx_descinfo4 {
202 uint32_t foe_entry_num:14;
203 uint32_t CRSN:5;
204 uint32_t SPORT:4;
205 uint32_t rsv:6;
206 uint32_t foe_entry_num_1:1;
207 uint32_t ppe:1;
208 uint32_t ALG:1;
209 uint32_t IF:8;
210 uint32_t WDMAID:2;
211 uint32_t RXID:2;
212 uint32_t WCID:10;
213 uint32_t BSSID:6;
214 uint32_t rsv2:4;
215 uint16_t minfo:1;
216 uint16_t ntype:3;
217 uint16_t chid:8;
218 uint16_t rsv3:4;
219#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
220 u16 SOURCE;
221 u16 DEST;
222#endif
223 u16 MAGIC_TAG_PROTECT;
224} __packed;
developer72d7e362021-07-08 19:29:25 +0800225#else
226struct head_rx_descinfo4 {
227 uint32_t foe_entry_num:14;
228 uint32_t CRSN:5;
229 uint32_t SPORT:3;
230 uint32_t rsv:1;
231 uint32_t ALG:1;
232 uint32_t IF:4;
233 uint32_t rsv2:4;
234 uint32_t MAGIC_TAG_PROTECT: 16;
235 uint32_t WDMAID:2;
236 uint32_t RXID:2;
237 uint32_t WCID:10;
238 uint32_t BSSID:6;
239#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
240 u16 SOURCE;
241 u16 DEST;
242#endif
243} __packed;
244#endif
developerfd40db22021-04-29 10:08:25 +0800245
246struct cb_rx_desc_info4 {
247 u16 MAGIC_TAG_PROTECT0;
248 uint32_t foe_entry_num:15;
249 uint32_t CRSN:5;
250 uint32_t SPORT:4;
251 uint32_t ALG:1;
252 uint32_t rsv:7;
253 uint16_t IF:8;
254 uint16_t WDMAID:2;
255 uint16_t RXID:2;
256 uint16_t WCID:10;
257 uint16_t BSSID:6;
258 uint16_t rsv1:4;
259 uint16_t minfo:1;
260 uint16_t ntype:3;
261 uint16_t chid:8;
262 uint16_t rsv2:4;
263#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
264 u16 SOURCE;
265 u16 DEST;
266#endif
267 u16 MAGIC_TAG_PROTECT1;
268} __packed;
269
270
271
developerfd40db22021-04-29 10:08:25 +0800272#define WIFI_INFO_LEN 6
developerd35bbcc2022-09-28 22:46:01 +0800273#define FOE_INFO_LEN (10 + WIFI_INFO_LEN)
developerfd40db22021-04-29 10:08:25 +0800274
275
276#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
developerd35bbcc2022-09-28 22:46:01 +0800277#define FOE_INFO_LEN (10 + 4 + WIFI_INFO_LEN)
developerfd40db22021-04-29 10:08:25 +0800278#define FOE_MAGIC_FASTPATH 0x77
279#define FOE_MAGIC_L2TPPATH 0x78
280#endif
281
282#define FOE_MAGIC_PCI 0x73
283#define FOE_MAGIC_WLAN 0x74
284#define FOE_MAGIC_GE 0x75
285#define FOE_MAGIC_PPE 0x76
286#define FOE_MAGIC_WED0 0x78
287#define FOE_MAGIC_WED1 0x79
developerd35bbcc2022-09-28 22:46:01 +0800288#define FOE_MAGIC_WED2 0x7A
developerfd40db22021-04-29 10:08:25 +0800289#define FOE_MAGIC_MED 0x80
290#define FOE_MAGIC_EDMA0 0x81
291#define FOE_MAGIC_EDMA1 0x82
292#define TAG_PROTECT 0x6789
293#define USE_HEAD_ROOM 0
294#define USE_TAIL_ROOM 1
295#define USE_CB 2
296#define ALL_INFO_ERROR 3
297
298/**************************DMAD FORMAT********************************/
299#define FOE_TAG_PROTECT(skb) \
300 (((struct dmad_rx_descinfo4 *)((skb)->head))->MAGIC_TAG_PROTECT)
301
302#define FOE_ENTRY_NUM(skb) \
303 (((struct dmad_rx_descinfo4 *)((skb)->head))->foe_entry_num)
304#define FOE_ALG(skb) \
305 (((struct dmad_rx_descinfo4 *)((skb)->head))->ALG)
306#define FOE_AI(skb) \
307 (((struct dmad_rx_descinfo4 *)((skb)->head))->CRSN)
308#define FOE_SP(skb) \
309 (((struct dmad_rx_descinfo4 *)((skb)->head))->SPORT)
310#define FOE_MAGIC_TAG(skb) \
311 (((struct dmad_rx_descinfo4 *)((skb)->head))->IF)
312#define FOE_WDMA_ID(skb) \
313 (((struct dmad_rx_descinfo4 *)((skb)->head))->WDMAID)
314#define FOE_RX_ID(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->RXID)
315#define FOE_WC_ID(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->WCID)
316#define FOE_BSS_ID(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->BSSID)
developerd35bbcc2022-09-28 22:46:01 +0800317#define FOE_USR_INFO(skb) \
318 (((struct dmad_rx_descinfo4 *)((skb)->head))->USR_INFO)
319#define FOE_TID(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->TID)
320#define FOE_IS_FIXEDRATE(skb) \
321 (((struct dmad_rx_descinfo4 *)((skb)->head))->IS_FIXEDRATE)
322#define FOE_IS_PRIOR(skb) \
323 (((struct dmad_rx_descinfo4 *)((skb)->head))->IS_PRIOR)
324#define FOE_IS_SP(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->IS_SP)
325#define FOE_HF(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->HF)
326#define FOE_AMSDU(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->AMSDU)
developerfd40db22021-04-29 10:08:25 +0800327#define FOE_PPE(skb) (((struct dmad_rx_descinfo4 *)((skb)->head))->ppe)
328
329/***********************HEAD FORMAT*************************************/
330
331#define FOE_TAG_PROTECT_HEAD(skb) \
332 (((struct head_rx_descinfo4 *)((skb)->head))->MAGIC_TAG_PROTECT)
333#define FOE_ENTRY_NUM_LSB_HEAD(skb) \
334 (((struct head_rx_descinfo4 *)((skb)->head))->foe_entry_num)
335#define FOE_ENTRY_NUM_MSB_HEAD(skb) \
336 (((struct head_rx_descinfo4 *)((skb)->head))->foe_entry_num_1)
337
338#define FOE_ENTRY_NUM_HEAD(skb) \
339 (((FOE_ENTRY_NUM_MSB_HEAD(skb) & 0x1) << 14) | FOE_ENTRY_NUM_LSB_HEAD(skb))
340
341
342#define FOE_ALG_HEAD(skb) \
343 (((struct head_rx_descinfo4 *)((skb)->head))->ALG)
344#define FOE_AI_HEAD(skb) \
345 (((struct head_rx_descinfo4 *)((skb)->head))->CRSN)
346#define FOE_SP_HEAD(skb) \
347 (((struct head_rx_descinfo4 *)((skb)->head))->SPORT)
348#define FOE_MAGIC_TAG_HEAD(skb) \
349 (((struct head_rx_descinfo4 *)((skb)->head))->IF)
350
351
352#define FOE_WDMA_ID_HEAD(skb) \
353 (((struct head_rx_descinfo4 *)((skb)->head))->WDMAID)
354#define FOE_RX_ID_HEAD(skb) \
355 (((struct head_rx_descinfo4 *)((skb)->head))->RXID)
356#define FOE_WC_ID_HEAD(skb) \
357 (((struct head_rx_descinfo4 *)((skb)->head))->WCID)
358#define FOE_BSS_ID_HEAD(skb) \
359 (((struct head_rx_descinfo4 *)((skb)->head))->BSSID)
360#define FOE_PPE_HEAD(skb) \
361 (((struct head_rx_descinfo4 *)((skb)->head))->PPE)
362
363/****************************TAIL FORMAT***************************************/
364#define FOE_TAG_PROTECT_TAIL(skb) \
365 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->MAGIC_TAG_PROTECT)
366#define FOE_ENTRY_NUM_LSB_TAIL(skb) \
367 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->foe_entry_num)
368
369#define FOE_ENTRY_NUM_MSB_TAIL(skb) \
370 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->foe_entry_num_1)
371#define FOE_ENTRY_NUM_TAIL(skb) \
372 (((FOE_ENTRY_NUM_MSB_TAIL(skb) & 0x1) << 14) | FOE_ENTRY_NUM_LSB_TAIL(skb))
373#define FOE_ALG_TAIL(skb) \
374 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->ALG)
375#define FOE_AI_TAIL(skb) \
376 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->CRSN)
377#define FOE_SP_TAIL(skb) \
378 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->SPORT)
379#define FOE_MAGIC_TAG_TAIL(skb) \
380 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->IF)
381
382#define FOE_WDMA_ID_TAIL(skb) \
383 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->WDMAID)
384#define FOE_RX_ID_TAIL(skb) \
385 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->RXID)
386#define FOE_WC_ID_TAIL(skb) \
387 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->WCID)
388#define FOE_BSS_ID_TAIL(skb) \
389 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->BSSID)
390
391#define FOE_PPE_TAIL(skb) \
392 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->ppe)
393/*********************************************************************/
394#define FOE_WDMA_ID_CB(skb) \
395 (((struct cb_rx_desc_info4 *)((skb)->head))->WDMAID)
396#define FOE_RX_ID_CB(skb) \
397 (((struct cb_rx_desc_info4 *)((skb)->head))->RXID)
398#define FOE_WC_ID_CB(skb) \
399 (((struct cb_rx_desc_info4 *)((skb)->head))->WCID)
400#define FOE_BSS_ID_CB(skb) \
401 (((struct cb_rx_desc_info4 *)((skb)->head))->BSSID)
402
403#define FOE_MINFO(skb) (((struct head_rx_descinfo4 *)((skb)->head))->minfo)
404#define FOE_MINFO_NTYPE(skb) (((struct head_rx_descinfo4 *)((skb)->head))->ntype)
405#define FOE_MINFO_CHID(skb) (((struct head_rx_descinfo4 *)((skb)->head))->chid)
406#define FOE_MINFO_HEAD(skb) (((struct head_rx_descinfo4 *)((skb)->head))->minfo)
407#define FOE_MINFO_NTYPE_HEAD(skb) (((struct head_rx_descinfo4 *)((skb)->head))->ntype)
408#define FOE_MINFO_CHID_HEAD(skb) (((struct head_rx_descinfo4 *)((skb)->head))->chid)
409
410#define FOE_MINFO_TAIL(skb) \
411 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->minfo)
412#define FOE_MINFO_NTYPE_TAIL(skb) \
413 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->ntype)
414#define FOE_MINFO_CHID_TAIL(skb) \
415 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->chid)
416
417#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
418#define FOE_SOURCE(skb) (((struct head_rx_descinfo4 *)((skb)->head))->SOURCE)
419#define FOE_DEST(skb) (((struct head_rx_descinfo4 *)((skb)->head))->DEST)
420#endif
421
422#define IS_SPACE_AVAILABLE_HEAD(skb) \
423 ((((skb_headroom(skb) >= FOE_INFO_LEN) ? 1 : 0)))
424#define IS_SPACE_AVAILABLE_HEAD(skb) \
425 ((((skb_headroom(skb) >= FOE_INFO_LEN) ? 1 : 0)))
426#define FOE_INFO_START_ADDR_HEAD(skb) (skb->head)
427
428#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
429#define FOE_SOURCE_HEAD(skb) \
430 (((struct head_rx_descinfo4 *)((skb)->head))->SOURCE)
431#define FOE_DEST_HEAD(skb) \
432 (((struct head_rx_descinfo4 *)((skb)->head))->DEST)
433#endif
434
435#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
436#define FOE_SOURCE_HEAD(skb) \
437 (((struct head_rx_descinfo4 *)((skb)->head))->SOURCE)
438#define FOE_DEST_HEAD(skb) \
439 (((struct head_rx_descinfo4 *)((skb)->head))->DEST)
440#endif
441#define IS_SPACE_AVAILABLE_TAIL(skb) \
442 (((skb_tailroom(skb) >= FOE_INFO_LEN) ? 1 : 0))
443#define IS_SPACE_AVAILABLE_TAIL(skb) \
444 (((skb_tailroom(skb) >= FOE_INFO_LEN) ? 1 : 0))
445#define FOE_INFO_START_ADDR_TAIL(skb) \
446 ((unsigned char *)(long)(skb_end_pointer(skb) - FOE_INFO_LEN))
447
448#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
449#define FOE_SOURCE_TAIL(skb) \
450 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->SOURCE)
451#define FOE_DEST_TAIL(skb) \
452 (((struct pdma_rx_desc_info4 *)((long)((skb_end_pointer(skb)) - FOE_INFO_LEN)))->DEST)
453#endif
454
455/* change the position of skb_CB if necessary */
456#define CB_OFFSET 40
457#define IS_SPACE_AVAILABLE_CB(skb) 1
458#define FOE_INFO_START_ADDR_CB(skb) (skb->cb + CB_OFFSET)
459#define FOE_TAG_PROTECT_CB0(skb) \
460 (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->MAGIC_TAG_PROTECT0)
461#define FOE_TAG_PROTECT_CB1(skb) \
462 (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->MAGIC_TAG_PROTECT1)
463#define FOE_ENTRY_NUM_CB(skb) \
464 (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->foe_entry_num)
465#define FOE_ALG_CB(skb) \
466 (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->ALG)
467#define FOE_AI_CB(skb) \
468 (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->CRSN)
469#define FOE_SP_CB(skb) \
470 (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->SPORT)
471#define FOE_MAGIC_TAG_CB(skb) \
472 (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->IF)
473
474#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
475#define FOE_SOURCE_CB(skb) (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->SOURCE)
476#define FOE_DEST_CB(skb) (((struct cb_rx_desc_info4 *)((skb)->cb + CB_OFFSET))->DEST)
477#endif
478
479#define IS_MAGIC_TAG_PROTECT_VALID_HEAD(skb) \
480 (FOE_TAG_PROTECT_HEAD(skb) == TAG_PROTECT)
481#define IS_MAGIC_TAG_PROTECT_VALID_TAIL(skb) \
482 (FOE_TAG_PROTECT_TAIL(skb) == TAG_PROTECT)
483#define IS_MAGIC_TAG_PROTECT_VALID_CB(skb) \
484 ((FOE_TAG_PROTECT_CB0(skb) == TAG_PROTECT) && \
485 (FOE_TAG_PROTECT_CB0(skb) == FOE_TAG_PROTECT_CB1(skb)))
486
487#define IS_IF_PCIE_WLAN_HEAD(skb) \
488 ((FOE_MAGIC_TAG_HEAD(skb) == FOE_MAGIC_PCI) || \
489 (FOE_MAGIC_TAG_HEAD(skb) == FOE_MAGIC_WLAN) || \
490 (FOE_MAGIC_TAG_HEAD(skb) == FOE_MAGIC_GE))
491
492#define IS_IF_PCIE_WLAN_TAIL(skb) \
493 ((FOE_MAGIC_TAG_TAIL(skb) == FOE_MAGIC_PCI) || \
494 (FOE_MAGIC_TAG_TAIL(skb) == FOE_MAGIC_WLAN))
495
496#define IS_IF_PCIE_WLAN_CB(skb) \
497 ((FOE_MAGIC_TAG_CB(skb) == FOE_MAGIC_PCI) || \
498 (FOE_MAGIC_TAG_CB(skb) == FOE_MAGIC_WLAN))
499
500/* macros */
501#define magic_tag_set_zero(skb) \
502{ \
503 if ((FOE_MAGIC_TAG_HEAD(skb) == FOE_MAGIC_PCI) || \
504 (FOE_MAGIC_TAG_HEAD(skb) == FOE_MAGIC_WLAN) || \
505 (FOE_MAGIC_TAG_HEAD(skb) == FOE_MAGIC_GE)) { \
506 if (IS_SPACE_AVAILABLE_HEAD(skb)) \
507 FOE_MAGIC_TAG_HEAD(skb) = 0; \
508 } \
509 if ((FOE_MAGIC_TAG_TAIL(skb) == FOE_MAGIC_PCI) || \
510 (FOE_MAGIC_TAG_TAIL(skb) == FOE_MAGIC_WLAN) || \
511 (FOE_MAGIC_TAG_TAIL(skb) == FOE_MAGIC_GE)) { \
512 if (IS_SPACE_AVAILABLE_TAIL(skb)) \
513 FOE_MAGIC_TAG_TAIL(skb) = 0; \
514 } \
515}
516
517static inline void hwnat_set_l2tp_unhit(struct iphdr *iph, struct sk_buff *skb)
518{
519#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
520 /* only clear headeroom for TCP OR not L2TP packets */
521 if ((iph->protocol == 0x6) || (ntohs(udp_hdr(skb)->dest) != 1701)) {
522 if (IS_SPACE_AVAILABLE_HEAD(skb)) {
523 FOE_MAGIC_TAG(skb) = 0;
524 FOE_AI(skb) = UN_HIT;
525 }
526 }
527#endif
528}
529
530static inline void hwnat_set_l2tp_fast_path(u32 l2tp_fast_path, u32 pptp_fast_path)
531{
532#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
533 l2tp_fast_path = 1;
534 pptp_fast_path = 0;
535#endif
536}
537
538static inline void hwnat_clear_l2tp_fast_path(u32 l2tp_fast_path)
539{
540#if defined(CONFIG_RA_HW_NAT_PPTP_L2TP)
541 l2tp_fast_path = 0;
542#endif
543}
544
545/* #define CONFIG_HW_NAT_IPI */
546#if defined(CONFIG_HW_NAT_IPI)
547extern int debug_level;
548int get_rps_cpu(struct net_device *dev, struct sk_buff *skb,
549 struct rps_dev_flow **rflowp);
550uint32_t ppe_extif_rx_handler(struct sk_buff *skb);
551int hitbind_force_to_cpu_handler(struct sk_buff *skb, struct foe_entry *entry);
552extern unsigned int ipidbg[num_possible_cpus()][10];
553extern unsigned int ipidbg2[num_possible_cpus()][10];
554/* #define HNAT_IPI_RXQUEUE 1 */
555#define HNAT_IPI_DQ 1
556#define HNAT_IPI_HASH_NORMAL 0
557#define HNAT_IPI_HASH_VTAG 1
558#define HNAT_IPI_HASH_FROM_EXTIF 2
559#define HNAT_IPI_HASH_FROM_GMAC 4
560
561struct hnat_ipi_s {
562#if defined(HNAT_IPI_DQ)
563 struct sk_buff_head skb_input_queue;
564 struct sk_buff_head skb_process_queue;
565#elif defined(HNAT_IPI_RXQUEUE)
566 atomic_t rx_queue_num;
567 unsigned int rx_queue_ridx;
568 unsigned int rx_queue_widx;
569 struct sk_buff **rx_queue;
570#else
571 /* unsigned int dummy0[0]; */
572 struct sk_buff_head skb_ipi_queue;
573 /* unsigned int dummy1[8]; */
574#endif
575 unsigned long time_rec, recv_time;
576 unsigned int ipi_accum;
577 /*hwnat ipi use*/
578 spinlock_t ipilock;
579 struct tasklet_struct smp_func_call_tsk;
580} ____cacheline_aligned_in_smp;
581
582struct hnat_ipi_stat {
583 unsigned long drop_pkt_num_from_extif;
584 unsigned long drop_pkt_num_from_ppehit;
585 unsigned int smp_call_cnt_from_extif;
586 unsigned int smp_call_cnt_from_ppehit;
587 atomic_t cpu_status;
588 /* atomic_t cpu_status_from_extif; */
589 /* atomic_t cpu_status_from_ppehit; */
590
591 /* atomic_t hook_status_from_extif; */
592 /* atomic_t hook_status_from_ppehit; */
593} ____cacheline_aligned_in_smp;
594
595#define cpu_status_from_extif cpu_status
596#define cpu_status_from_ppehit cpu_status
597
598struct hnat_ipi_cfg {
599 unsigned int enable_from_extif;
600 unsigned int enable_from_ppehit;
601 unsigned int queue_thresh_from_extif;
602 unsigned int queue_thresh_from_ppehit;
603 unsigned int drop_pkt_from_extif;
604 unsigned int drop_pkt_from_ppehit;
605 unsigned int ipi_cnt_mod_from_extif;
606 unsigned int ipi_cnt_mod_from_ppehit;
607} ____cacheline_aligned_in_smp;
608
609int hnat_ipi_init(void);
610int hnat_ipi_de_init(void);
611#endif
612
613#define QDMA_RX 5
614#define PDMA_RX 0
615
616
617#endif