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git01.mediatek.com / openwrt / feeds / mtk-openwrt-feeds / 8eb72a3c41aa9ee62258608a741a3925fd1e27aa / . / target / linux / generic / backport-5.4 / 471-mtd-spinand-toshiba-Support-for-new-Kioxia-Serial-NAND.patch
blob: ffa1ad89865f03c6d4e5ef33adade3047eb3ca78 [file] [log] [blame]
developer41370d52022-03-16 16:01:59 +0800[diff] [blame]1From 798fcdd010006e87b3154d6454c657af7b033002 Mon Sep 17 00:00:00 2001
2From: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
3Date: Tue, 24 Mar 2020 15:49:55 +0900
4Subject: [PATCH] mtd: spinand: toshiba: Support for new Kioxia Serial NAND
5
6Add support for new Kioxia products.
7The new Kioxia products support program load x4 command, and have
8HOLD_D bit which is equivalent to QE bit.
9
10Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
11Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
12Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
13Link: https://lore.kernel.org/linux-mtd/aa69e455beedc5ce0d7141359b9364ed8aec9e65.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
14---
15 drivers/mtd/nand/spi/toshiba.c | 128 ++++++++++++++++++++++++++++-----
16 1 file changed, 111 insertions(+), 17 deletions(-)
17
18diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c
19index 5d217dd4b2539a..bc801d83343e5c 100644
20--- a/drivers/mtd/nand/spi/toshiba.c
21+++ b/drivers/mtd/nand/spi/toshiba.c
22@@ -20,6 +20,18 @@ static SPINAND_OP_VARIANTS(read_cache_variants,
23 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
24 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
25
26+static SPINAND_OP_VARIANTS(write_cache_x4_variants,
27+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
28+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
29+
30+static SPINAND_OP_VARIANTS(update_cache_x4_variants,
31+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
32+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
33+
34+/**
35+ * Backward compatibility for 1st generation Serial NAND devices
36+ * which don't support Quad Program Load operation.
37+ */
38 static SPINAND_OP_VARIANTS(write_cache_variants,
39 SPINAND_PROG_LOAD(true, 0, NULL, 0));
40
41@@ -95,7 +107,7 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
42 }
43
44 static const struct spinand_info toshiba_spinand_table[] = {
45- /* 3.3V 1Gb */
46+ /* 3.3V 1Gb (1st generation) */
47 SPINAND_INFO("TC58CVG0S3HRAIG",
48 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2),
49 NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
50@@ -106,7 +118,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
51 0,
52 SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
53 tx58cxgxsxraix_ecc_get_status)),
54- /* 3.3V 2Gb */
55+ /* 3.3V 2Gb (1st generation) */
56 SPINAND_INFO("TC58CVG1S3HRAIG",
57 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB),
58 NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
59@@ -117,7 +129,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
60 0,
61 SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
62 tx58cxgxsxraix_ecc_get_status)),
63- /* 3.3V 4Gb */
64+ /* 3.3V 4Gb (1st generation) */
65 SPINAND_INFO("TC58CVG2S0HRAIG",
66 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD),
67 NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
68@@ -128,18 +140,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
69 0,
70 SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
71 tx58cxgxsxraix_ecc_get_status)),
72- /* 3.3V 4Gb */
73- SPINAND_INFO("TC58CVG2S0HRAIJ",
74- SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED),
75- NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
76- NAND_ECCREQ(8, 512),
77- SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
78- &write_cache_variants,
79- &update_cache_variants),
80- 0,
81- SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
82- tx58cxgxsxraix_ecc_get_status)),
83- /* 1.8V 1Gb */
84+ /* 1.8V 1Gb (1st generation) */
85 SPINAND_INFO("TC58CYG0S3HRAIG",
86 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2),
87 NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
88@@ -150,7 +151,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
89 0,
90 SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
91 tx58cxgxsxraix_ecc_get_status)),
92- /* 1.8V 2Gb */
93+ /* 1.8V 2Gb (1st generation) */
94 SPINAND_INFO("TC58CYG1S3HRAIG",
95 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB),
96 NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
97@@ -161,7 +162,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
98 0,
99 SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
100 tx58cxgxsxraix_ecc_get_status)),
101- /* 1.8V 4Gb */
102+ /* 1.8V 4Gb (1st generation) */
103 SPINAND_INFO("TC58CYG2S0HRAIG",
104 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD),
105 NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
106@@ -172,6 +173,99 @@ static const struct spinand_info toshiba_spinand_table[] = {
107 0,
108 SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
109 tx58cxgxsxraix_ecc_get_status)),
110+
111+ /*
112+ * 2nd generation serial nand has HOLD_D which is equivalent to
113+ * QE_BIT.
114+ */
115+ /* 3.3V 1Gb (2nd generation) */
116+ SPINAND_INFO("TC58CVG0S3HRAIJ",
117+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
118+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
119+ NAND_ECCREQ(8, 512),
120+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
121+ &write_cache_x4_variants,
122+ &update_cache_x4_variants),
123+ SPINAND_HAS_QE_BIT,
124+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
125+ tx58cxgxsxraix_ecc_get_status)),
126+ /* 3.3V 2Gb (2nd generation) */
127+ SPINAND_INFO("TC58CVG1S3HRAIJ",
128+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB),
129+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
130+ NAND_ECCREQ(8, 512),
131+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
132+ &write_cache_x4_variants,
133+ &update_cache_x4_variants),
134+ SPINAND_HAS_QE_BIT,
135+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
136+ tx58cxgxsxraix_ecc_get_status)),
137+ /* 3.3V 4Gb (2nd generation) */
138+ SPINAND_INFO("TC58CVG2S0HRAIJ",
139+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED),
140+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
141+ NAND_ECCREQ(8, 512),
142+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
143+ &write_cache_x4_variants,
144+ &update_cache_x4_variants),
145+ SPINAND_HAS_QE_BIT,
146+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
147+ tx58cxgxsxraix_ecc_get_status)),
148+ /* 3.3V 8Gb (2nd generation) */
149+ SPINAND_INFO("TH58CVG3S0HRAIJ",
150+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
151+ NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
152+ NAND_ECCREQ(8, 512),
153+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
154+ &write_cache_x4_variants,
155+ &update_cache_x4_variants),
156+ SPINAND_HAS_QE_BIT,
157+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
158+ tx58cxgxsxraix_ecc_get_status)),
159+ /* 1.8V 1Gb (2nd generation) */
160+ SPINAND_INFO("TC58CYG0S3HRAIJ",
161+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD2),
162+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
163+ NAND_ECCREQ(8, 512),
164+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
165+ &write_cache_x4_variants,
166+ &update_cache_x4_variants),
167+ SPINAND_HAS_QE_BIT,
168+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
169+ tx58cxgxsxraix_ecc_get_status)),
170+ /* 1.8V 2Gb (2nd generation) */
171+ SPINAND_INFO("TC58CYG1S3HRAIJ",
172+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDB),
173+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
174+ NAND_ECCREQ(8, 512),
175+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
176+ &write_cache_x4_variants,
177+ &update_cache_x4_variants),
178+ SPINAND_HAS_QE_BIT,
179+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
180+ tx58cxgxsxraix_ecc_get_status)),
181+ /* 1.8V 4Gb (2nd generation) */
182+ SPINAND_INFO("TC58CYG2S0HRAIJ",
183+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDD),
184+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
185+ NAND_ECCREQ(8, 512),
186+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
187+ &write_cache_x4_variants,
188+ &update_cache_x4_variants),
189+ SPINAND_HAS_QE_BIT,
190+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
191+ tx58cxgxsxraix_ecc_get_status)),
192+ /* 1.8V 8Gb (2nd generation) */
193+ SPINAND_INFO("TH58CYG3S0HRAIJ",
194+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
195+ NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
196+ NAND_ECCREQ(8, 512),
197+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
198+ &write_cache_x4_variants,
199+ &update_cache_x4_variants),
200+ SPINAND_HAS_QE_BIT,
201+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
202+ tx58cxgxsxraix_ecc_get_status)),
203 };
204
205 static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {