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git01.mediatek.com / openwrt / feeds / mtk-openwrt-feeds / 8eb72a3c41aa9ee62258608a741a3925fd1e27aa / . / target / linux / generic / backport-5.4 / 435-mtd-spinand-macronix-Add-Quad-support-for-serial-NAND-flash.patch
blob: cc6900afdb6ad0ae302ca1822c926f4574122b08 [file] [log] [blame]
developer41370d52022-03-16 16:01:59 +0800[diff] [blame]1From 6f802696c2faf0119781fc3b7977a4eedf9ab239 Mon Sep 17 00:00:00 2001
2From: Jaime Liao <jaimeliao@mxic.com.tw>
3Date: Mon, 9 Aug 2021 09:27:52 +0800
4Subject: [PATCH] mtd: spinand: macronix: Add Quad support for serial NAND
5 flash
6
7Adding FLAG "SPINAND_HAS_QE_BIT" for Quad mode support on Macronix
8Serial Flash.
9Validated via normal(default) and QUAD mode by read, erase, read back,
10on Xilinx Zynq PicoZed FPGA board which included Macronix
11SPI Host(drivers/spi/spi-mxic.c).
12
13Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
14Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
15Link: https://lore.kernel.org/linux-mtd/1628472472-32008-1-git-send-email-jaimeliao@mxic.com.tw
16---
17 drivers/mtd/nand/spi/macronix.c | 16 ++++++++--------
18 1 file changed, 8 insertions(+), 8 deletions(-)
19
20diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
21index a9890350db0293..3f31f1381a62c0 100644
22--- a/drivers/mtd/nand/spi/macronix.c
23+++ b/drivers/mtd/nand/spi/macronix.c
24@@ -126,7 +126,7 @@ static const struct spinand_info macronix_spinand_table[] = {
25 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
26 &write_cache_variants,
27 &update_cache_variants),
28- 0,
29+ SPINAND_HAS_QE_BIT,
30 SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
31 mx35lf1ge4ab_ecc_get_status)),
32 SPINAND_INFO("MX35LF4GE4AD",
33@@ -136,7 +136,7 @@ static const struct spinand_info macronix_spinand_table[] = {
34 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
35 &write_cache_variants,
36 &update_cache_variants),
37- 0,
38+ SPINAND_HAS_QE_BIT,
39 SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
40 mx35lf1ge4ab_ecc_get_status)),
41 SPINAND_INFO("MX35LF1G24AD",
42@@ -146,16 +146,16 @@ static const struct spinand_info macronix_spinand_table[] = {
43 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
44 &write_cache_variants,
45 &update_cache_variants),
46- 0,
47+ SPINAND_HAS_QE_BIT,
48 SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
49 SPINAND_INFO("MX35LF2G24AD",
50 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x24),
51- NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
52+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
53 NAND_ECCREQ(8, 512),
54 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
55 &write_cache_variants,
56 &update_cache_variants),
57- 0,
58+ SPINAND_HAS_QE_BIT,
59 SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
60 SPINAND_INFO("MX35LF4G24AD",
61 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x35),
62@@ -164,7 +164,7 @@ static const struct spinand_info macronix_spinand_table[] = {
63 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
64 &write_cache_variants,
65 &update_cache_variants),
66- 0,
67+ SPINAND_HAS_QE_BIT,
68 SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
69 SPINAND_INFO("MX31LF1GE4BC",
70 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e),
71@@ -173,7 +173,7 @@ static const struct spinand_info macronix_spinand_table[] = {
72 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
73 &write_cache_variants,
74 &update_cache_variants),
75- 0 /*SPINAND_HAS_QE_BIT*/,
76+ SPINAND_HAS_QE_BIT,
77 SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
78 mx35lf1ge4ab_ecc_get_status)),
79 SPINAND_INFO("MX31UF1GE4BC",
80@@ -183,7 +183,7 @@ static const struct spinand_info macronix_spinand_table[] = {
81 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
82 &write_cache_variants,
83 &update_cache_variants),
84- 0 /*SPINAND_HAS_QE_BIT*/,
85+ SPINAND_HAS_QE_BIT,
86 SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
87 mx35lf1ge4ab_ecc_get_status)),
88