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developer8eb72a32023-03-30 08:32:07 +08001From 15078cb8bc36fb6194ecaf65887d899f9a9c5435 Mon Sep 17 00:00:00 2001
developerabdbf252023-02-06 16:02:21 +08002From: MeiChia Chiu <MeiChia.Chiu@mediatek.com>
3Date: Mon, 28 Nov 2022 14:36:09 +0800
developer1bc2ce22023-03-25 00:47:41 +08004Subject: [PATCH 10/29] wifi: mt76: mt7996: add muru support
developerabdbf252023-02-06 16:02:21 +08005
6Add sta_rec_muru() and related phy cap for MU and RU support.
7
8Signed-off-by: MeiChia Chiu <meichia.chiu@mediatek.com>
9Signed-off-by: Shayne Chen <shayne.chen@mediatek.com>
10Change-Id: I2206a9bb6fd6e50f4bf1380a8bea19920f1b7bfd
11---
12 mt76_connac_mcu.h | 3 ++-
13 mt7996/mcu.c | 69 ++++++++++++++++++++++++++++++++++++++++++++++-
14 mt7996/mt7996.h | 3 +++
15 3 files changed, 73 insertions(+), 2 deletions(-)
16
17diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h
developer8eb72a32023-03-30 08:32:07 +080018index 40a99e0..6f30a0f 100644
developerabdbf252023-02-06 16:02:21 +080019--- a/mt76_connac_mcu.h
20+++ b/mt76_connac_mcu.h
21@@ -518,7 +518,8 @@ struct sta_rec_muru {
22 u8 uo_ra;
23 u8 he_2x996_tone;
24 u8 rx_t_frame_11ac;
25- u8 rsv[3];
26+ u8 rx_ctrl_frame_to_mbss;
27+ u8 rsv[2];
28 } ofdma_ul;
29
30 struct {
31diff --git a/mt7996/mcu.c b/mt7996/mcu.c
developer8eb72a32023-03-30 08:32:07 +080032index f694743..b6bd36c 100644
developerabdbf252023-02-06 16:02:21 +080033--- a/mt7996/mcu.c
34+++ b/mt7996/mcu.c
developer483388c2023-03-08 13:52:15 +080035@@ -1050,6 +1050,63 @@ mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
developerabdbf252023-02-06 16:02:21 +080036 }
37 }
38
39+static void
40+mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
41+ struct ieee80211_vif *vif, struct ieee80211_sta *sta)
42+{
43+ struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
44+ struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
45+ struct sta_rec_muru *muru;
46+ struct tlv *tlv;
47+
48+ if (vif->type != NL80211_IFTYPE_STATION &&
49+ vif->type != NL80211_IFTYPE_AP)
50+ return;
51+
52+ tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru));
53+
54+ muru = (struct sta_rec_muru *)tlv;
55+
56+ muru->cfg.mimo_dl_en = mvif->cap.eht_mu_ebfer_bw80 ||
57+ mvif->cap.eht_mu_ebfer_bw160 ||
58+ mvif->cap.eht_mu_ebfer_bw320 ||
59+ mvif->cap.he_mu_ebfer ||
60+ mvif->cap.vht_mu_ebfer ||
61+ mvif->cap.vht_mu_ebfee;
62+ muru->cfg.ofdma_dl_en = true;
63+
64+ if (sta->deflink.vht_cap.vht_supported)
65+ muru->mimo_dl.vht_mu_bfee =
66+ !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
67+
68+ if (!sta->deflink.he_cap.has_he)
69+ return;
70+
71+ muru->mimo_dl.partial_bw_dl_mimo =
72+ HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]);
73+
74+ muru->mimo_ul.full_ul_mimo =
75+ HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]);
76+ muru->mimo_ul.partial_ul_mimo =
77+ HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]);
78+
79+ muru->ofdma_dl.punc_pream_rx =
80+ HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
81+ muru->ofdma_dl.he_20m_in_40m_2g =
82+ HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]);
83+ muru->ofdma_dl.he_20m_in_160m =
84+ HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
85+ muru->ofdma_dl.he_80m_in_160m =
86+ HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
87+
88+ muru->ofdma_ul.t_frame_dur =
89+ HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
90+ muru->ofdma_ul.mu_cascading =
91+ HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]);
92+ muru->ofdma_ul.uo_ra =
93+ HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]);
94+}
95+
96 static inline bool
97 mt7996_is_ebf_supported(struct mt7996_phy *phy, struct ieee80211_vif *vif,
98 struct ieee80211_sta *sta, bool bfee)
developer483388c2023-03-08 13:52:15 +080099@@ -1722,7 +1779,8 @@ int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif,
developerabdbf252023-02-06 16:02:21 +0800100 mt7996_mcu_sta_he_6g_tlv(skb, sta);
101 /* starec eht */
102 mt7996_mcu_sta_eht_tlv(skb, sta);
103- /* TODO: starec muru */
104+ /* starec muru */
105+ mt7996_mcu_sta_muru_tlv(dev, skb, vif, sta);
106 /* starec bfee */
107 mt7996_mcu_sta_bfee_tlv(dev, skb, vif, sta);
108 /* starec hdr trans */
developer483388c2023-03-08 13:52:15 +0800109@@ -2005,6 +2063,15 @@ mt7996_mcu_beacon_check_caps(struct mt7996_phy *phy, struct ieee80211_vif *vif,
developerabdbf252023-02-06 16:02:21 +0800110 vc->eht_su_ebfee =
111 EHT_PHY(CAP0_SU_BEAMFORMEE, eht->phy_cap_info[0]) &&
112 EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]);
113+ vc->eht_mu_ebfer_bw80 =
114+ EHT_PHY(CAP7_MU_BEAMFORMER_80MHZ, eht->phy_cap_info[7]) &&
115+ EHT_PHY(CAP7_MU_BEAMFORMER_80MHZ, pe->phy_cap_info[7]);
116+ vc->eht_mu_ebfer_bw160 =
117+ EHT_PHY(CAP7_MU_BEAMFORMER_160MHZ, eht->phy_cap_info[7]) &&
118+ EHT_PHY(CAP7_MU_BEAMFORMER_160MHZ, pe->phy_cap_info[7]);
119+ vc->eht_mu_ebfer_bw320 =
120+ EHT_PHY(CAP7_MU_BEAMFORMER_320MHZ, eht->phy_cap_info[7]) &&
121+ EHT_PHY(CAP7_MU_BEAMFORMER_320MHZ, pe->phy_cap_info[7]);
122 }
123 }
124
125diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h
developer8eb72a32023-03-30 08:32:07 +0800126index f9d8fbf..997a0bf 100644
developerabdbf252023-02-06 16:02:21 +0800127--- a/mt7996/mt7996.h
128+++ b/mt7996/mt7996.h
129@@ -125,6 +125,9 @@ struct mt7996_vif_cap {
130 bool he_mu_ebfer:1;
131 bool eht_su_ebfer:1;
132 bool eht_su_ebfee:1;
133+ bool eht_mu_ebfer_bw80:1;
134+ bool eht_mu_ebfer_bw160:1;
135+ bool eht_mu_ebfer_bw320:1;
136 };
137
138 struct mt7996_vif {
139--
developer8eb72a32023-03-30 08:32:07 +08001402.18.0
developerabdbf252023-02-06 16:02:21 +0800141