| developer | 8cb3ac7 | 2022-07-04 10:55:14 +0800 | [diff] [blame^] | 1 | From b83743c16da6fa4da206df3e5a1a9c29485bb613 Mon Sep 17 00:00:00 2001 |
| 2 | From: Bo Jiao <Bo.Jiao@mediatek.com> |
| 3 | Date: Wed, 22 Jun 2022 16:36:42 +0800 |
| 4 | Subject: [PATCH 3/8] 9992-dts-mt7986-wed-changes |
| 5 | |
| 6 | --- |
| 7 | arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 33 ++++++++--------------- |
| 8 | arch/arm64/boot/dts/mediatek/mt7986b.dtsi | 33 ++++++++--------------- |
| 9 | 2 files changed, 22 insertions(+), 44 deletions(-) |
| 10 | |
| 11 | diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi |
| 12 | index ba27b95f5..7f78de6b9 100644 |
| 13 | --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi |
| 14 | +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi |
| 15 | @@ -58,32 +58,20 @@ |
| 16 | }; |
| 17 | }; |
| 18 | |
| 19 | - wed: wed@15010000 { |
| 20 | - compatible = "mediatek,wed"; |
| 21 | - wed_num = <2>; |
| 22 | - /* add this property for wed get the pci slot number. */ |
| 23 | - pci_slot_map = <0>, <1>; |
| 24 | - reg = <0 0x15010000 0 0x1000>, |
| 25 | - <0 0x15011000 0 0x1000>; |
| 26 | + wed0: wed@15010000 { |
| 27 | + compatible = "mediatek,mt7986-wed", |
| 28 | + "syscon"; |
| 29 | + reg = <0 0x15010000 0 0x1000>; |
| 30 | interrupt-parent = <&gic>; |
| 31 | - interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, |
| 32 | - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; |
| 33 | + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; |
| 34 | }; |
| 35 | |
| 36 | - wed2: wed2@15011000 { |
| 37 | - compatible = "mediatek,wed2"; |
| 38 | - wed_num = <2>; |
| 39 | - reg = <0 0x15010000 0 0x1000>, |
| 40 | - <0 0x15011000 0 0x1000>; |
| 41 | + wed1: wed@15011000 { |
| 42 | + compatible = "mediatek,mt7986-wed", |
| 43 | + "syscon"; |
| 44 | + reg = <0 0x15011000 0 0x1000>; |
| 45 | interrupt-parent = <&gic>; |
| 46 | - interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, |
| 47 | - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; |
| 48 | - }; |
| 49 | - |
| 50 | - wdma: wdma@15104800 { |
| 51 | - compatible = "mediatek,wed-wdma"; |
| 52 | - reg = <0 0x15104800 0 0x400>, |
| 53 | - <0 0x15104c00 0 0x400>; |
| 54 | + interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; |
| 55 | }; |
| 56 | |
| 57 | ap2woccif: ap2woccif@151A5000 { |
| 58 | @@ -490,6 +478,7 @@ |
| 59 | <&topckgen CK_TOP_CB_SGM_325M>; |
| 60 | mediatek,ethsys = <ðsys>; |
| 61 | mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>; |
| 62 | + mediatek,wed = <&wed0>, <&wed1>; |
| 63 | #reset-cells = <1>; |
| 64 | #address-cells = <1>; |
| 65 | #size-cells = <0>; |
| 66 | diff --git a/arch/arm64/boot/dts/mediatek/mt7986b.dtsi b/arch/arm64/boot/dts/mediatek/mt7986b.dtsi |
| 67 | index 523d585cb..0e5f116a2 100644 |
| 68 | --- a/arch/arm64/boot/dts/mediatek/mt7986b.dtsi |
| 69 | +++ b/arch/arm64/boot/dts/mediatek/mt7986b.dtsi |
| 70 | @@ -58,32 +58,20 @@ |
| 71 | }; |
| 72 | }; |
| 73 | |
| 74 | - wed: wed@15010000 { |
| 75 | - compatible = "mediatek,wed"; |
| 76 | - wed_num = <2>; |
| 77 | - /* add this property for wed get the pci slot number. */ |
| 78 | - pci_slot_map = <0>, <1>; |
| 79 | - reg = <0 0x15010000 0 0x1000>, |
| 80 | - <0 0x15011000 0 0x1000>; |
| 81 | + wed0: wed@15010000 { |
| 82 | + compatible = "mediatek,mt7986-wed", |
| 83 | + "syscon"; |
| 84 | + reg = <0 0x15010000 0 0x1000>; |
| 85 | interrupt-parent = <&gic>; |
| 86 | - interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, |
| 87 | - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; |
| 88 | + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; |
| 89 | }; |
| 90 | |
| 91 | - wed2: wed2@15011000 { |
| 92 | - compatible = "mediatek,wed2"; |
| 93 | - wed_num = <2>; |
| 94 | - reg = <0 0x15010000 0 0x1000>, |
| 95 | - <0 0x15011000 0 0x1000>; |
| 96 | + wed1: wed@15011000 { |
| 97 | + compatible = "mediatek,mt7986-wed", |
| 98 | + "syscon"; |
| 99 | + reg = <0 0x15011000 0 0x1000>; |
| 100 | interrupt-parent = <&gic>; |
| 101 | - interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, |
| 102 | - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; |
| 103 | - }; |
| 104 | - |
| 105 | - wdma: wdma@15104800 { |
| 106 | - compatible = "mediatek,wed-wdma"; |
| 107 | - reg = <0 0x15104800 0 0x400>, |
| 108 | - <0 0x15104c00 0 0x400>; |
| 109 | + interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; |
| 110 | }; |
| 111 | |
| 112 | ap2woccif: ap2woccif@151A5000 { |
| 113 | @@ -405,6 +393,7 @@ |
| 114 | <&topckgen CK_TOP_CB_SGM_325M>; |
| 115 | mediatek,ethsys = <ðsys>; |
| 116 | mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>; |
| 117 | + mediatek,wed = <&wed0>, <&wed1>; |
| 118 | #reset-cells = <1>; |
| 119 | #address-cells = <1>; |
| 120 | #size-cells = <0>; |
| 121 | -- |
| 122 | 2.18.0 |
| 123 | |