developer | e5e687d | 2023-08-08 16:05:33 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* |
| 3 | * Copyright (c) 2023 MediaTek Inc. All Rights Reserved. |
| 4 | * |
| 5 | * Author: Ren-Ting Wang <ren-ting.wang@mediatek.com> |
| 6 | */ |
| 7 | |
| 8 | #ifndef _TOPS_INTERNAL_H_ |
| 9 | #define _TOPS_INTERNAL_H_ |
| 10 | |
| 11 | #include <linux/bitfield.h> |
| 12 | #include <linux/device.h> |
| 13 | #include <linux/io.h> |
| 14 | |
| 15 | extern struct device *tops_dev; |
| 16 | |
| 17 | #define TOPS_DBG(fmt, ...) dev_dbg(tops_dev, fmt, ##__VA_ARGS__) |
| 18 | #define TOPS_INFO(fmt, ...) dev_info(tops_dev, fmt, ##__VA_ARGS__) |
| 19 | #define TOPS_NOTICE(fmt, ...) dev_notice(tops_dev, fmt, ##__VA_ARGS__) |
| 20 | #define TOPS_WARN(fmt, ...) dev_warn(tops_dev, fmt, ##__VA_ARGS__) |
| 21 | #define TOPS_ERR(fmt, ...) dev_err(tops_dev, fmt, ##__VA_ARGS__) |
| 22 | |
| 23 | /* tops 32 bits read/write */ |
| 24 | #define setbits(addr, set) writel(readl(addr) | (set), (addr)) |
| 25 | #define clrbits(addr, clr) writel(readl(addr) & ~(clr), (addr)) |
| 26 | #define clrsetbits(addr, clr, set) writel((readl(addr) & ~(clr)) | (set), (addr)) |
| 27 | #endif /* _TOPS_INTERNAL_H_ */ |