blob: 751127986e13feae9c705001f713c44bab4ca4cf [file] [log] [blame]
developer7e2761e2023-10-12 08:11:13 +08001From a2bd3309c6c1ea4d63d8ac3fc066914186740ab5 Mon Sep 17 00:00:00 2001
2From: mtk27745 <rex.lu@mediatek.com>
3Date: Fri, 6 Oct 2023 15:48:37 +0800
4Subject: [PATCH 70/98] wifi: mt76: mt7996: add rro elem free when rmmod wifi
5 module
6
7---
8 mt7996/init.c | 34 ++++++++++++++++++++++++++++++++++
9 1 file changed, 34 insertions(+)
10
11diff --git a/mt7996/init.c b/mt7996/init.c
12index 5627605..1ece390 100644
13--- a/mt7996/init.c
14+++ b/mt7996/init.c
15@@ -670,6 +670,38 @@ void mt7996_wfsys_reset(struct mt7996_dev *dev)
16 msleep(20);
17 }
18
19+static int mt7996_rro_free(struct mt7996_dev *dev)
20+{
21+ int i;
22+
23+ for (i = 0; i < ARRAY_SIZE(dev->wed_rro.ba_bitmap); i++) {
24+ if (dev->wed_rro.ba_bitmap[i].ptr)
25+ dmam_free_coherent(dev->mt76.dma_dev,
26+ MT7996_RRO_BA_BITMAP_CR_SIZE,
27+ dev->wed_rro.ba_bitmap[i].ptr,
28+ dev->wed_rro.ba_bitmap[i].phy_addr);
29+ }
30+
31+ for (i = 0; i < ARRAY_SIZE(dev->wed_rro.addr_elem); i++) {
32+ if (dev->wed_rro.addr_elem[i].ptr) {
33+ dmam_free_coherent(dev->mt76.dma_dev,
34+ MT7996_RRO_WINDOW_MAX_SIZE *
35+ sizeof(struct mt7996_wed_rro_addr),
36+ dev->wed_rro.addr_elem[i].ptr,
37+ dev->wed_rro.addr_elem[i].phy_addr);
38+ }
39+ }
40+
41+ if (dev->wed_rro.session.ptr)
42+ dmam_free_coherent(dev->mt76.dma_dev,
43+ MT7996_RRO_WINDOW_MAX_LEN *
44+ sizeof(struct mt7996_wed_rro_addr),
45+ dev->wed_rro.session.ptr,
46+ dev->wed_rro.session.phy_addr);
47+
48+ return 0;
49+}
50+
51 static int mt7996_wed_rro_init(struct mt7996_dev *dev)
52 {
53 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
54@@ -1295,6 +1327,8 @@ void mt7996_unregister_device(struct mt7996_dev *dev)
55 mt7996_coredump_unregister(dev);
56 mt76_unregister_device(&dev->mt76);
57 mt7996_mcu_exit(dev);
58+ if (mtk_wed_device_active(&dev->mt76.mmio.wed) && dev->has_rro)
59+ mt7996_rro_free(dev);
60 mt7996_tx_token_put(dev);
61 mt7996_dma_cleanup(dev);
62 tasklet_disable(&dev->mt76.irq_tasklet);
63--
642.18.0
65