blob: ce35b7aeb9ad33453a1f0ac23f713cc236911e87 [file] [log] [blame]
developercc8c8f12023-05-31 20:08:19 +08001From 37b0b79827edbd5c312aa546a1fe148bda616e30 Mon Sep 17 00:00:00 2001
2From: Sam Shih <sam.shih@mediatek.com>
3Date: Wed, 31 May 2023 19:53:09 +0800
4Subject: [PATCH] iio: adc: Add rtq6056 support
5
6---
7 drivers/iio/adc/Kconfig | 15 +
8 drivers/iio/adc/Makefile | 1 +
9 drivers/iio/adc/rtq6056.c | 649 ++++++++++++++++++++++++++++++++++++++
10 3 files changed, 665 insertions(+)
11 create mode 100644 drivers/iio/adc/rtq6056.c
12
13diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
14index cb57880..7457a53 100644
15--- a/drivers/iio/adc/Kconfig
16+++ b/drivers/iio/adc/Kconfig
17@@ -746,6 +746,21 @@ config ROCKCHIP_SARADC
18 To compile this driver as a module, choose M here: the
19 module will be called rockchip_saradc.
20
21+config RICHTEK_RTQ6056
22+ tristate "Richtek RTQ6056 Current and Power Monitor ADC"
23+ depends on I2C
24+ select REGMAP_I2C
25+ select IIO_BUFFER
26+ select IIO_TRIGGERED_BUFFER
27+ help
28+ Say yes here to enable RQT6056 ADC support.
29+ RTQ6056 is a high accuracy current-sense monitor with I2C and SMBus
30+ compatible interface, and the device provides full information for
31+ system by reading out the load current and power.
32+
33+ This driver can also be built as a module. If so, the module will be
34+ called rtq6056.
35+
36 config SC27XX_ADC
37 tristate "Spreadtrum SC27xx series PMICs ADC"
38 depends on MFD_SC27XX_PMIC || COMPILE_TEST
39diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
40index ef9cc48..6a4ac1b 100644
41--- a/drivers/iio/adc/Makefile
42+++ b/drivers/iio/adc/Makefile
43@@ -59,6 +59,7 @@ obj-$(CONFIG_MCP3911) += mcp3911.o
44 obj-$(CONFIG_MEDIATEK_MT6577_AUXADC) += mt6577_auxadc.o
45 obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
46 obj-$(CONFIG_MESON_SARADC) += meson_saradc.o
47+obj-$(CONFIG_RICHTEK_RTQ6056) += rtq6056.o
48 obj-$(CONFIG_MXS_LRADC_ADC) += mxs-lradc-adc.o
49 obj-$(CONFIG_NAU7802) += nau7802.o
50 obj-$(CONFIG_NPCM_ADC) += npcm_adc.o
51diff --git a/drivers/iio/adc/rtq6056.c b/drivers/iio/adc/rtq6056.c
52new file mode 100644
53index 0000000..962058e
54--- /dev/null
55+++ b/drivers/iio/adc/rtq6056.c
56@@ -0,0 +1,649 @@
57+// SPDX-License-Identifier: GPL-2.0
58+/*
59+ * Copyright (c) 2022 Richtek Technology Corp.
60+ *
61+ * ChiYuan Huang <cy_huang@richtek.com>
62+ */
63+
64+#include <linux/bitops.h>
65+#include <linux/delay.h>
66+#include <linux/i2c.h>
67+#include <linux/kernel.h>
68+#include <linux/mod_devicetable.h>
69+#include <linux/module.h>
70+#include <linux/pm_runtime.h>
71+#include <linux/property.h>
72+#include <linux/regmap.h>
73+#include <linux/sysfs.h>
74+#include <linux/types.h>
75+#include <linux/util_macros.h>
76+
77+#include <linux/iio/buffer.h>
78+#include <linux/iio/iio.h>
79+#include <linux/iio/driver.h>
80+#include <linux/iio/machine.h>
81+#include <linux/iio/sysfs.h>
82+#include <linux/iio/trigger_consumer.h>
83+#include <linux/iio/triggered_buffer.h>
84+
85+#define RTQ6056_REG_CONFIG 0x00
86+#define RTQ6056_REG_SHUNTVOLT 0x01
87+#define RTQ6056_REG_BUSVOLT 0x02
88+#define RTQ6056_REG_POWER 0x03
89+#define RTQ6056_REG_CURRENT 0x04
90+#define RTQ6056_REG_CALIBRATION 0x05
91+#define RTQ6056_REG_MASKENABLE 0x06
92+#define RTQ6056_REG_ALERTLIMIT 0x07
93+#define RTQ6056_REG_MANUFACTID 0xFE
94+#define RTQ6056_REG_DIEID 0xFF
95+
96+#define RTQ6056_MAX_CHANNEL 4
97+#define RTQ6056_VENDOR_ID 0x1214
98+#define RTQ6056_DEFAULT_CONFIG 0x4127
99+#define RTQ6056_CONT_ALLON 7
100+
101+#define RTQ6056_CONFIG_OPMODE_MASK GENMASK(2, 0)
102+#define RTQ6056_CONFIG_OPMODE(x) ((x << 0) & RTQ6056_CONFIG_OPMODE_MASK)
103+#define RTQ6056_CONFIG_VSHUNTCT_MASK GENMASK(5, 3)
104+#define RTQ6056_CONFIG_VSHUNTCT(x) ((x << 3) & \
105+ RTQ6056_CONFIG_VSHUNTCT_MASK)
106+#define RTQ6056_CONFIG_VBUSCT_MASK GENMASK(8, 6)
107+#define RTQ6056_CONFIG_VBUSCT(x) ((x << 6) & RTQ6056_CONFIG_VBUSCT_MASK)
108+#define RTQ6056_CONFIG_AVG_MASK GENMASK(11, 9)
109+#define RTQ6056_CONFIG_AVG(x) ((x << 9) & RTQ6056_CONFIG_AVG_MASK)
110+#define RTQ6056_CONFIG_RESET_MASK GENMASK(15, 15)
111+#define RTQ6056_CONFIG_RESET(x) ((x << 15) & RTQ6056_CONFIG_RESET_MASK)
112+
113+struct rtq6056_priv {
114+ struct device *dev;
115+ struct regmap *regmap;
116+ u32 shunt_resistor_uohm;
117+ int vshuntct_us;
118+ int vbusct_us;
119+ int avg_sample;
120+};
121+
122+static struct iio_map rtq6056_maps[] = {
123+ {
124+ .consumer_dev_name = "voltage0",
125+ .consumer_channel = "voltage0",
126+ .adc_channel_label = "Vshunt",
127+ }, {
128+ .consumer_dev_name = "voltage1",
129+ .consumer_channel = "voltage1",
130+ .adc_channel_label = "Vbus",
131+ }, {
132+ .consumer_dev_name = "power2",
133+ .consumer_channel = "power2",
134+ .adc_channel_label = "Power",
135+ }, {
136+ .consumer_dev_name = "current3",
137+ .consumer_channel = "current3",
138+ .adc_channel_label = "Current",
139+ }, { /* sentinel */ }
140+};
141+
142+static const struct iio_chan_spec rtq6056_channels[RTQ6056_MAX_CHANNEL + 1] = {
143+ {
144+ .type = IIO_VOLTAGE,
145+ .indexed = 1,
146+ .channel = 0,
147+ .address = RTQ6056_REG_SHUNTVOLT,
148+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
149+ BIT(IIO_CHAN_INFO_SCALE) |
150+ BIT(IIO_CHAN_INFO_SAMP_FREQ),
151+ .info_mask_separate_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),
152+ .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
153+ .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
154+ .scan_index = 0,
155+ .scan_type = {
156+ .sign = 's',
157+ .realbits = 16,
158+ .storagebits = 16,
159+ .endianness = IIO_CPU,
160+ },
161+ .datasheet_name = "voltage0",
162+ },
163+ {
164+ .type = IIO_VOLTAGE,
165+ .indexed = 1,
166+ .channel = 1,
167+ .address = RTQ6056_REG_BUSVOLT,
168+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
169+ BIT(IIO_CHAN_INFO_SCALE) |
170+ BIT(IIO_CHAN_INFO_SAMP_FREQ),
171+ .info_mask_separate_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),
172+ .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
173+ .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
174+ .scan_index = 1,
175+ .scan_type = {
176+ .sign = 'u',
177+ .realbits = 16,
178+ .storagebits = 16,
179+ .endianness = IIO_CPU,
180+ },
181+ .datasheet_name = "voltage1",
182+ },
183+ {
184+ .type = IIO_POWER,
185+ .indexed = 1,
186+ .channel = 2,
187+ .address = RTQ6056_REG_POWER,
188+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
189+ BIT(IIO_CHAN_INFO_SCALE) |
190+ BIT(IIO_CHAN_INFO_SAMP_FREQ),
191+ .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
192+ .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
193+ .scan_index = 2,
194+ .scan_type = {
195+ .sign = 'u',
196+ .realbits = 16,
197+ .storagebits = 16,
198+ .endianness = IIO_CPU,
199+ },
200+ .datasheet_name = "power2",
201+ },
202+ {
203+ .type = IIO_CURRENT,
204+ .indexed = 1,
205+ .channel = 3,
206+ .address = RTQ6056_REG_CURRENT,
207+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
208+ BIT(IIO_CHAN_INFO_SAMP_FREQ),
209+ .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
210+ .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
211+ .scan_index = 3,
212+ .scan_type = {
213+ .sign = 's',
214+ .realbits = 16,
215+ .storagebits = 16,
216+ .endianness = IIO_CPU,
217+ },
218+ .datasheet_name = "current3",
219+ },
220+ IIO_CHAN_SOFT_TIMESTAMP(RTQ6056_MAX_CHANNEL),
221+};
222+
223+static int rtq6056_adc_read_channel(struct rtq6056_priv *priv,
224+ struct iio_chan_spec const *ch,
225+ int *val)
226+{
227+ struct device *dev = priv->dev;
228+ unsigned int addr = ch->address;
229+ unsigned int regval;
230+ int ret;
231+
232+ pm_runtime_get_sync(dev);
233+ ret = regmap_read(priv->regmap, addr, &regval);
234+ pm_runtime_mark_last_busy(dev);
235+ pm_runtime_put(dev);
236+ if (ret)
237+ return ret;
238+
239+ /* Power and VBUS is unsigned 16-bit, others are signed 16-bit */
240+ if (addr == RTQ6056_REG_BUSVOLT || addr == RTQ6056_REG_POWER)
241+ *val = regval;
242+ else
243+ *val = sign_extend32(regval, 16);
244+
245+ return IIO_VAL_INT;
246+}
247+
248+static int rtq6056_adc_read_scale(struct iio_chan_spec const *ch, int *val,
249+ int *val2)
250+{
251+ switch (ch->address) {
252+ case RTQ6056_REG_SHUNTVOLT:
253+ /* VSHUNT lsb 2.5uV */
254+ *val = 2500;
255+ *val2 = 1000000;
256+ return IIO_VAL_FRACTIONAL;
257+ case RTQ6056_REG_BUSVOLT:
258+ /* VBUS lsb 1.25mV */
259+ *val = 1250;
260+ *val2 = 1000;
261+ return IIO_VAL_FRACTIONAL;
262+ case RTQ6056_REG_POWER:
263+ /* Power lsb 25mW */
264+ *val = 25;
265+ return IIO_VAL_INT;
266+ default:
267+ return -EINVAL;
268+ }
269+}
270+
271+/*
272+ * Sample frequency for channel VSHUNT and VBUS. The indices correspond
273+ * with the bit value expected by the chip. And it can be found at
274+ * https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf
275+ */
276+static const int rtq6056_samp_freq_list[] = {
277+ 7194, 4926, 3717, 1904, 964, 485, 243, 122,
278+};
279+
280+static int rtq6056_adc_set_samp_freq(struct rtq6056_priv *priv,
281+ struct iio_chan_spec const *ch, int val)
282+{
283+ unsigned int selector;
284+ int *ct, ret;
285+
286+ if (val > 7194 || val < 122)
287+ return -EINVAL;
288+
289+ if (ch->address == RTQ6056_REG_SHUNTVOLT) {
290+ ct = &priv->vshuntct_us;
291+ } else if (ch->address == RTQ6056_REG_BUSVOLT) {
292+ ct = &priv->vbusct_us;
293+ } else
294+ return -EINVAL;
295+
296+ selector = find_closest_descending(val, rtq6056_samp_freq_list,
297+ ARRAY_SIZE(rtq6056_samp_freq_list));
298+
299+ if (ch->address == RTQ6056_REG_SHUNTVOLT) {
300+ ret = regmap_update_bits(priv->regmap, RTQ6056_REG_CONFIG,
301+ RTQ6056_CONFIG_VSHUNTCT_MASK,
302+ RTQ6056_CONFIG_VSHUNTCT(selector));
303+ } else {
304+ ret = regmap_update_bits(priv->regmap, RTQ6056_REG_CONFIG,
305+ RTQ6056_CONFIG_VBUSCT_MASK,
306+ RTQ6056_CONFIG_VBUSCT(selector));
307+ }
308+ if (ret)
309+ return ret;
310+
311+ *ct = 1000000 / rtq6056_samp_freq_list[selector];
312+
313+ return 0;
314+}
315+
316+/*
317+ * Available averaging rate for rtq6056. The indices correspond with the bit
318+ * value expected by the chip. And it can be found at
319+ * https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf
320+ */
321+static const int rtq6056_avg_sample_list[] = {
322+ 1, 4, 16, 64, 128, 256, 512, 1024,
323+};
324+
325+static int rtq6056_adc_set_average(struct rtq6056_priv *priv, int val)
326+{
327+ unsigned int selector;
328+ int ret;
329+
330+ if (val > 1024 || val < 1)
331+ return -EINVAL;
332+
333+ selector = find_closest(val, rtq6056_avg_sample_list,
334+ ARRAY_SIZE(rtq6056_avg_sample_list));
335+
336+ ret = regmap_update_bits(priv->regmap, RTQ6056_REG_CONFIG,
337+ RTQ6056_CONFIG_AVG_MASK,
338+ RTQ6056_CONFIG_AVG(selector));
339+
340+ if (ret)
341+ return ret;
342+
343+ priv->avg_sample = rtq6056_avg_sample_list[selector];
344+
345+ return 0;
346+}
347+
348+static int rtq6056_adc_get_sample_freq(struct rtq6056_priv *priv,
349+ struct iio_chan_spec const *ch, int *val)
350+{
351+ int sample_time;
352+
353+ if (ch->address == RTQ6056_REG_SHUNTVOLT)
354+ sample_time = priv->vshuntct_us;
355+ else if (ch->address == RTQ6056_REG_BUSVOLT)
356+ sample_time = priv->vbusct_us;
357+ else {
358+ sample_time = priv->vshuntct_us + priv->vbusct_us;
359+ sample_time *= priv->avg_sample;
360+ }
361+
362+ *val = 1000000 / sample_time;
363+
364+ return IIO_VAL_INT;
365+}
366+
367+static int rtq6056_adc_read_raw(struct iio_dev *indio_dev,
368+ struct iio_chan_spec const *chan, int *val,
369+ int *val2, long mask)
370+{
371+ struct rtq6056_priv *priv = iio_priv(indio_dev);
372+
373+ switch (mask) {
374+ case IIO_CHAN_INFO_RAW:
375+ return rtq6056_adc_read_channel(priv, chan, val);
376+ case IIO_CHAN_INFO_SCALE:
377+ return rtq6056_adc_read_scale(chan, val, val2);
378+ case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
379+ *val = priv->avg_sample;
380+ return IIO_VAL_INT;
381+ case IIO_CHAN_INFO_SAMP_FREQ:
382+ return rtq6056_adc_get_sample_freq(priv, chan, val);
383+ default:
384+ return -EINVAL;
385+ }
386+}
387+
388+static int rtq6056_adc_read_avail(struct iio_dev *indio_dev,
389+ struct iio_chan_spec const *chan,
390+ const int **vals, int *type, int *length,
391+ long mask)
392+{
393+ switch (mask) {
394+ case IIO_CHAN_INFO_SAMP_FREQ:
395+ *vals = rtq6056_samp_freq_list;
396+ *type = IIO_VAL_INT;
397+ *length = ARRAY_SIZE(rtq6056_samp_freq_list);
398+ return IIO_AVAIL_LIST;
399+ case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
400+ *vals = rtq6056_avg_sample_list;
401+ *type = IIO_VAL_INT;
402+ *length = ARRAY_SIZE(rtq6056_avg_sample_list);
403+ return IIO_AVAIL_LIST;
404+ default:
405+ return -EINVAL;
406+ }
407+}
408+
409+static int rtq6056_adc_write_raw(struct iio_dev *indio_dev,
410+ struct iio_chan_spec const *chan, int val,
411+ int val2, long mask)
412+{
413+ struct rtq6056_priv *priv = iio_priv(indio_dev);
414+ int ret;
415+
416+ ret = iio_device_claim_direct_mode(indio_dev);
417+ if (ret)
418+ return ret;
419+
420+ switch (mask) {
421+ case IIO_CHAN_INFO_SAMP_FREQ:
422+ ret = rtq6056_adc_set_samp_freq(priv, chan, val);
423+ break;
424+ case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
425+ ret = rtq6056_adc_set_average(priv, val);
426+ break;
427+ default:
428+ ret = -EINVAL;
429+ break;
430+ }
431+
432+ iio_device_release_direct_mode(indio_dev);
433+
434+ return ret;
435+}
436+
437+static int rtq6056_set_shunt_resistor(struct rtq6056_priv *priv,
438+ int resistor_uohm)
439+{
440+ unsigned int calib_val;
441+ int ret;
442+
443+ if (resistor_uohm <= 0) {
444+ dev_err(priv->dev, "Invalid resistor [%d]\n", resistor_uohm);
445+ return -EINVAL;
446+ }
447+
448+ /* calibration = 5120000 / (Rshunt (uOhm) * current lsb (1mA)) */
449+ calib_val = 5120000 / resistor_uohm;
450+ ret = regmap_write(priv->regmap, RTQ6056_REG_CALIBRATION, calib_val);
451+ if (ret)
452+ return ret;
453+
454+ priv->shunt_resistor_uohm = resistor_uohm;
455+
456+ return 0;
457+}
458+
459+static ssize_t shunt_resistor_show(struct device *dev,
460+ struct device_attribute *attr, char *buf)
461+{
462+ struct rtq6056_priv *priv = iio_priv(dev_to_iio_dev(dev));
463+ int vals[2] = { priv->shunt_resistor_uohm, 1000000 };
464+
465+ return iio_format_value(buf, IIO_VAL_FRACTIONAL, 1, vals);
466+}
467+
468+static ssize_t shunt_resistor_store(struct device *dev,
469+ struct device_attribute *attr,
470+ const char *buf, size_t len)
471+{
472+ struct iio_dev *indio_dev = dev_to_iio_dev(dev);
473+ struct rtq6056_priv *priv = iio_priv(indio_dev);
474+ int val, val_fract, ret;
475+
476+ ret = iio_device_claim_direct_mode(indio_dev);
477+ if (ret)
478+ return ret;
479+
480+ ret = iio_str_to_fixpoint(buf, 100000, &val, &val_fract);
481+ if (ret)
482+ goto out_store;
483+
484+ ret = rtq6056_set_shunt_resistor(priv, val * 1000000 + val_fract);
485+
486+out_store:
487+ iio_device_release_direct_mode(indio_dev);
488+
489+ return ret ?: len;
490+}
491+
492+static IIO_DEVICE_ATTR_RW(shunt_resistor, 0);
493+
494+static struct attribute *rtq6056_attributes[] = {
495+ &iio_dev_attr_shunt_resistor.dev_attr.attr,
496+ NULL
497+};
498+
499+static const struct attribute_group rtq6056_attribute_group = {
500+ .attrs = rtq6056_attributes,
501+};
502+
503+static const struct iio_info rtq6056_info = {
504+ .attrs = &rtq6056_attribute_group,
505+ .read_raw = rtq6056_adc_read_raw,
506+ .read_avail = rtq6056_adc_read_avail,
507+ .write_raw = rtq6056_adc_write_raw,
508+};
509+
510+static irqreturn_t rtq6056_buffer_trigger_handler(int irq, void *p)
511+{
512+ struct iio_poll_func *pf = p;
513+ struct iio_dev *indio_dev = pf->indio_dev;
514+ struct rtq6056_priv *priv = iio_priv(indio_dev);
515+ struct device *dev = priv->dev;
516+ struct {
517+ u16 vals[RTQ6056_MAX_CHANNEL];
518+ s64 timestamp __aligned(8);
519+ } data;
520+ unsigned int raw;
521+ int i = 0, bit, ret;
522+
523+ memset(&data, 0, sizeof(data));
524+
525+ pm_runtime_get_sync(dev);
526+
527+ for_each_set_bit(bit, indio_dev->active_scan_mask, indio_dev->masklength) {
528+ unsigned int addr = rtq6056_channels[bit].address;
529+
530+ ret = regmap_read(priv->regmap, addr, &raw);
531+ if (ret)
532+ goto out;
533+
534+ data.vals[i++] = raw;
535+ }
536+
537+ iio_push_to_buffers_with_timestamp(indio_dev, &data, iio_get_time_ns(indio_dev));
538+
539+out:
540+ pm_runtime_mark_last_busy(dev);
541+ pm_runtime_put(dev);
542+
543+ iio_trigger_notify_done(indio_dev->trig);
544+
545+ return IRQ_HANDLED;
546+}
547+
548+static void rtq6056_enter_shutdown_state(void *dev)
549+{
550+ struct rtq6056_priv *priv = dev_get_drvdata(dev);
551+
552+ /* Enter shutdown state */
553+ regmap_update_bits(priv->regmap, RTQ6056_REG_CONFIG,
554+ RTQ6056_CONFIG_OPMODE_MASK,
555+ RTQ6056_CONFIG_OPMODE(0));
556+}
557+
558+static bool rtq6056_is_readable_reg(struct device *dev, unsigned int reg)
559+{
560+ switch (reg) {
561+ case RTQ6056_REG_CONFIG ... RTQ6056_REG_ALERTLIMIT:
562+ case RTQ6056_REG_MANUFACTID ... RTQ6056_REG_DIEID:
563+ return true;
564+ default:
565+ return false;
566+ }
567+}
568+
569+static bool rtq6056_is_writeable_reg(struct device *dev, unsigned int reg)
570+{
571+ switch (reg) {
572+ case RTQ6056_REG_CONFIG:
573+ case RTQ6056_REG_CALIBRATION ... RTQ6056_REG_ALERTLIMIT:
574+ return true;
575+ default:
576+ return false;
577+ }
578+}
579+
580+static const struct regmap_config rtq6056_regmap_config = {
581+ .reg_bits = 8,
582+ .val_bits = 16,
583+ .val_format_endian = REGMAP_ENDIAN_BIG,
584+ .max_register = RTQ6056_REG_DIEID,
585+ .readable_reg = rtq6056_is_readable_reg,
586+ .writeable_reg = rtq6056_is_writeable_reg,
587+};
588+
589+static int rtq6056_probe(struct i2c_client *i2c)
590+{
591+ struct iio_dev *indio_dev;
592+ struct rtq6056_priv *priv;
593+ struct device *dev = &i2c->dev;
594+ struct regmap *regmap;
595+ unsigned int vendor_id, shunt_resistor_uohm;
596+ int ret;
597+
598+ if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_SMBUS_WORD_DATA))
599+ return -EOPNOTSUPP;
600+
601+ indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
602+ if (!indio_dev)
603+ return -ENOMEM;
604+
605+ priv = iio_priv(indio_dev);
606+ priv->dev = dev;
607+ priv->vshuntct_us = priv->vbusct_us = 1037;
608+ priv->avg_sample = 1;
609+ i2c_set_clientdata(i2c, priv);
610+
611+ regmap = devm_regmap_init_i2c(i2c, &rtq6056_regmap_config);
612+ if (IS_ERR(regmap)) {
613+ dev_err(dev, "Failed to init regmap\n");
614+ return PTR_ERR(regmap);
615+ }
616+
617+ priv->regmap = regmap;
618+
619+ ret = regmap_read(regmap, RTQ6056_REG_MANUFACTID, &vendor_id);
620+ if (ret) {
621+ dev_err(dev, "Failed to get manufacturer info: %d\n", ret);
622+ return ret;
623+ }
624+
625+ if (vendor_id != RTQ6056_VENDOR_ID) {
626+ dev_err(dev, "Invalid vendor id 0x%04x\n", vendor_id);
627+ return -ENODEV;
628+ }
629+
630+ /*
631+ * By default, configure average sample as 1, bus and shunt conversion
632+ * time as 1037 microsecond, and operating mode to all on.
633+ */
634+ ret = regmap_write(regmap, RTQ6056_REG_CONFIG, RTQ6056_DEFAULT_CONFIG);
635+ if (ret) {
636+ dev_err(dev, "Failed to enable continuous sensing: %d\n", ret);
637+ return ret;
638+ }
639+
640+ ret = devm_add_action_or_reset(dev, rtq6056_enter_shutdown_state, dev);
641+ if (ret)
642+ return ret;
643+
644+ /* By default, use 2000 micro-Ohm resistor */
645+ shunt_resistor_uohm = 2000;
646+ device_property_read_u32(dev, "shunt-resistor-micro-ohms",
647+ &shunt_resistor_uohm);
648+
649+ ret = rtq6056_set_shunt_resistor(priv, shunt_resistor_uohm);
650+ if (ret) {
651+ dev_err(dev, "Failed to init shunt resistor: %d\n", ret);
652+ goto err;
653+ }
654+
655+ indio_dev->name = "rtq6056";
656+ indio_dev->modes = INDIO_DIRECT_MODE;
657+ indio_dev->channels = rtq6056_channels;
658+ indio_dev->num_channels = ARRAY_SIZE(rtq6056_channels);
659+ indio_dev->info = &rtq6056_info;
660+
661+ ret = iio_map_array_register(indio_dev, rtq6056_maps);
662+ if (ret) {
663+ dev_err(dev, "Failed to register iio map: %d\n", ret);
664+ goto err;
665+ }
666+
667+ ret = iio_triggered_buffer_setup(indio_dev, NULL,
668+ &rtq6056_buffer_trigger_handler, NULL);
669+
670+ if (ret) {
671+ dev_err(dev, "Failed to allocate iio trigger buffer: %d\n",
672+ ret);
673+ goto err;
674+ }
675+
676+ ret = devm_iio_device_register(dev, indio_dev);
677+ if (ret) {
678+ dev_err(dev, "Failed to register iio device: %d\n", ret);
679+ goto err;
680+ }
681+
682+ return 0;
683+
684+err:
685+ return ret;
686+}
687+
688+static const struct of_device_id rtq6056_device_match[] = {
689+ { .compatible = "richtek,rtq6056" },
690+ {}
691+};
692+MODULE_DEVICE_TABLE(of, rtq6056_device_match);
693+
694+static struct i2c_driver rtq6056_driver = {
695+ .driver = {
696+ .name = "rtq6056",
697+ .of_match_table = rtq6056_device_match,
698+ },
699+ .probe_new = rtq6056_probe,
700+};
701+module_i2c_driver(rtq6056_driver);
702+
703+MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
704+MODULE_DESCRIPTION("Richtek RTQ6056 Driver");
705+MODULE_LICENSE("GPL v2");
706--
7072.18.0
708