blob: 81653031883c50e571694f594341aa89192baf56 [file] [log] [blame]
developer82eae452023-02-13 10:04:09 +08001diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
2index daed73a..7d080d5 100644
3--- a/drivers/net/phy/marvell10g.c
4+++ b/drivers/net/phy/marvell10g.c
5@@ -516,6 +516,7 @@ static void mv3310_update_interface(struct phy_device *phydev)
6
7 if ((phydev->interface == PHY_INTERFACE_MODE_SGMII ||
8 phydev->interface == PHY_INTERFACE_MODE_2500BASEX ||
9+ phydev->interface == PHY_INTERFACE_MODE_5GBASER ||
10 phydev->interface == PHY_INTERFACE_MODE_10GKR) && phydev->link) {
11 /* The PHY automatically switches its serdes interface (and
12 * active PHYXS instance) between Cisco SGMII, 10GBase-KR and
13@@ -527,6 +528,9 @@ static void mv3310_update_interface(struct phy_device *phydev)
14 case SPEED_10000:
15 phydev->interface = PHY_INTERFACE_MODE_10GKR;
16 break;
17+ case SPEED_5000:
18+ phydev->interface = PHY_INTERFACE_MODE_5GBASER;
19+ break;
20 case SPEED_2500:
21 phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
22 break;
developercfa104b2023-01-11 17:40:41 +080023diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
24index b3f25a9..6a38a1c 100644
25--- a/drivers/net/phy/phylink.c
26+++ b/drivers/net/phy/phylink.c
27@@ -299,6 +299,10 @@ static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
28 phylink_set(pl->supported, 2500baseX_Full);
29 break;
30
31+ case PHY_INTERFACE_MODE_5GBASER:
32+ phylink_set(pl->supported, 5000baseT_Full);
33+ break;
34+
35 case PHY_INTERFACE_MODE_10GKR:
36 phylink_set(pl->supported, 10baseT_Half);
37 phylink_set(pl->supported, 10baseT_Full);
38diff --git a/drivers/net/phy/sfp-bus.c b/drivers/net/phy/sfp-bus.c
39index 0d5ac2a..a702c9b 100644
40--- a/drivers/net/phy/sfp-bus.c
41+++ b/drivers/net/phy/sfp-bus.c
42@@ -302,6 +302,9 @@ phy_interface_t sfp_select_interface(struct sfp_bus *bus,
43 phylink_test(link_modes, 10000baseT_Full))
44 return PHY_INTERFACE_MODE_10GKR;
45
46+ if (phylink_test(link_modes, 5000baseT_Full))
47+ return PHY_INTERFACE_MODE_5GBASER;
48+
49 if (phylink_test(link_modes, 2500baseX_Full))
50 return PHY_INTERFACE_MODE_2500BASEX;
51
52diff --git a/include/linux/phy.h b/include/linux/phy.h
53index 34bdd16..77fad08 100644
54--- a/include/linux/phy.h
55+++ b/include/linux/phy.h
56@@ -98,6 +98,7 @@ typedef enum {
57 PHY_INTERFACE_MODE_TRGMII,
58 PHY_INTERFACE_MODE_1000BASEX,
59 PHY_INTERFACE_MODE_2500BASEX,
60+ PHY_INTERFACE_MODE_5GBASER,
61 PHY_INTERFACE_MODE_RXAUI,
62 PHY_INTERFACE_MODE_XAUI,
63 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
64@@ -172,6 +173,8 @@ static inline const char *phy_modes(phy_interface_t interface)
65 return "1000base-x";
66 case PHY_INTERFACE_MODE_2500BASEX:
67 return "2500base-x";
68+ case PHY_INTERFACE_MODE_5GBASER:
69+ return "5gbase-r";
70 case PHY_INTERFACE_MODE_RXAUI:
71 return "rxaui";
72 case PHY_INTERFACE_MODE_XAUI: