developer | fd40db2 | 2021-04-29 10:08:25 +0800 | [diff] [blame] | 1 | From patchwork Tue Sep 22 11:49:02 2020 |
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| 82 | From: Chuanhong Guo <gch981213@gmail.com> |
| 83 | To: linux-spi@vger.kernel.org |
| 84 | Subject: [PATCH v2] spi: spi-mtk-nor: fix timeout calculation overflow |
| 85 | Date: Tue, 22 Sep 2020 19:49:02 +0800 |
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| 130 | Cc: linux-kernel@vger.kernel.org, stable@vger.kernel.org, |
| 131 | Mark Brown <broonie@kernel.org>, linux-mediatek@lists.infradead.org, |
| 132 | bayi.cheng@mediatek.com, Matthias Brugger <matthias.bgg@gmail.com>, |
| 133 | Chuanhong Guo <gch981213@gmail.com>, linux-arm-kernel@lists.infradead.org |
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| 136 | linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org |
| 137 | |
| 138 | CLK_TO_US macro is used to calculate potential transfer time for various |
| 139 | timeout handling. However it overflows on transfer bigger than 512 bytes |
| 140 | because it first did (len * 8 * 1000000). |
| 141 | This controller typically operates at 45MHz. This patch did 2 things: |
| 142 | 1. calculate clock / 1000000 first |
| 143 | 2. add a 4M transfer size cap so that the final timeout in DMA reading |
| 144 | doesn't overflow |
| 145 | |
| 146 | Fixes: 881d1ee9fe81f ("spi: add support for mediatek spi-nor controller") |
| 147 | Cc: <stable@vger.kernel.org> |
| 148 | Signed-off-by: Chuanhong Guo <gch981213@gmail.com> |
| 149 | --- |
| 150 | |
| 151 | Change since v1: fix transfer size cap to 4M |
| 152 | |
| 153 | drivers/spi/spi-mtk-nor.c | 6 +++++- |
| 154 | 1 file changed, 5 insertions(+), 1 deletion(-) |
| 155 | |
| 156 | diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c |
| 157 | index 6e6ca2b8e6c82..62f5ff2779884 100644 |
| 158 | --- a/drivers/spi/spi-mtk-nor.c |
| 159 | +++ b/drivers/spi/spi-mtk-nor.c |
| 160 | @@ -89,7 +89,7 @@ |
| 161 | // Buffered page program can do one 128-byte transfer |
| 162 | #define MTK_NOR_PP_SIZE 128 |
| 163 | |
| 164 | -#define CLK_TO_US(sp, clkcnt) ((clkcnt) * 1000000 / sp->spi_freq) |
| 165 | +#define CLK_TO_US(sp, clkcnt) DIV_ROUND_UP(clkcnt, sp->spi_freq / 1000000) |
| 166 | |
| 167 | struct mtk_nor { |
| 168 | struct spi_controller *ctlr; |
| 169 | @@ -177,6 +177,10 @@ static int mtk_nor_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) |
| 170 | if ((op->addr.nbytes == 3) || (op->addr.nbytes == 4)) { |
| 171 | if ((op->data.dir == SPI_MEM_DATA_IN) && |
| 172 | mtk_nor_match_read(op)) { |
| 173 | + // limit size to prevent timeout calculation overflow |
| 174 | + if (op->data.nbytes > 0x400000) |
| 175 | + op->data.nbytes = 0x400000; |
| 176 | + |
| 177 | if ((op->addr.val & MTK_NOR_DMA_ALIGN_MASK) || |
| 178 | (op->data.nbytes < MTK_NOR_DMA_ALIGN)) |
| 179 | op->data.nbytes = 1; |