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developer699cda22022-12-17 15:21:57 +08001From ff22ef4a4d68412999df62ca05c012c05ffdbf81 Mon Sep 17 00:00:00 2001
developera833e5a2022-09-07 18:00:50 +08002From: Peter Chiu <chui-hao.chiu@mediatek.com>
3Date: Fri, 2 Sep 2022 14:40:40 +0800
developer699cda22022-12-17 15:21:57 +08004Subject: [PATCH 3006/3013] mt76: mt7915: wed: enable red per-band token drop
developerbf24a8a2022-11-30 14:52:20 +08005 for HW Path
developera833e5a2022-09-07 18:00:50 +08006
7Limit the number of token used by each band. If a band uses too many token,
8it may hurt the throughput of the other band. The SW path can solve this
9problem by AQL.
10
11Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com>
12---
developer30d39c22022-12-16 10:29:49 +080013 mt7915/mcu.c | 56 ++++++++++++++++++++++++++++++++++++++++---------
developera833e5a2022-09-07 18:00:50 +080014 mt7915/mcu.h | 1 +
developer30d39c22022-12-16 10:29:49 +080015 mt7915/mmio.c | 2 +-
16 mt7915/mt7915.h | 4 +++-
17 4 files changed, 51 insertions(+), 12 deletions(-)
developera833e5a2022-09-07 18:00:50 +080018
19diff --git a/mt7915/mcu.c b/mt7915/mcu.c
developer699cda22022-12-17 15:21:57 +080020index f494d9f..5b2ae77 100644
developera833e5a2022-09-07 18:00:50 +080021--- a/mt7915/mcu.c
22+++ b/mt7915/mcu.c
developer1346ce52022-12-15 21:36:14 +080023@@ -2374,8 +2374,17 @@ int mt7915_mcu_init_firmware(struct mt7915_dev *dev)
developerafd75872022-12-14 21:15:46 +080024 dev->mt76.mmio.wed.rev_id, 0);
25 if (ret)
26 return ret;
developera833e5a2022-09-07 18:00:50 +080027+
developerafd75872022-12-14 21:15:46 +080028+ ret = mt7915_mcu_set_red(dev, true);
29+ if (ret)
30+ return ret;
developera833e5a2022-09-07 18:00:50 +080031+ } else {
32+ mt7915_mcu_set_red(dev, false);
developerafd75872022-12-14 21:15:46 +080033+ if (ret)
34+ return ret;
developera833e5a2022-09-07 18:00:50 +080035 }
36
37+
38 ret = mt7915_mcu_set_mwds(dev, 1);
39 if (ret)
40 return ret;
developer1346ce52022-12-15 21:36:14 +080041@@ -2385,12 +2394,7 @@ int mt7915_mcu_init_firmware(struct mt7915_dev *dev)
developera833e5a2022-09-07 18:00:50 +080042 if (ret)
43 return ret;
44
45- ret = mt7915_mcu_init_rx_airtime(dev);
46- if (ret)
47- return ret;
48-
49- return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
50- MCU_WA_PARAM_RED, 0, 0);
51+ return mt7915_mcu_init_rx_airtime(dev);
52 }
53
54 int mt7915_mcu_init(struct mt7915_dev *dev)
developer30d39c22022-12-16 10:29:49 +080055@@ -4533,6 +4537,34 @@ int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a
developera833e5a2022-09-07 18:00:50 +080056
57 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), wait_resp);
58 }
59+#endif
60+
61+static int mt7915_red_set_watermark(struct mt7915_dev *dev)
62+{
63+#define RED_GLOBAL_TOKEN_WATERMARK 2
developera833e5a2022-09-07 18:00:50 +080064+ struct {
65+ __le32 args[3];
66+
67+ u8 cmd;
68+ u8 version;
69+ u8 __rsv1[4];
70+ u16 len;
71+
72+ __le16 high_mark;
73+ __le16 low_mark;
74+ u8 __rsv2[12];
75+ } req = {
76+ .args[0] = cpu_to_le32(MCU_WA_PARAM_RED_SETTING),
77+ .cmd = RED_GLOBAL_TOKEN_WATERMARK,
78+ .len = cpu_to_le16(sizeof(req) - 12),
79+
developer30d39c22022-12-16 10:29:49 +080080+ .high_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256),
81+ .low_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256 - 1536),
developera833e5a2022-09-07 18:00:50 +080082+ };
83+
84+ return mt76_mcu_send_msg(&dev->mt76, MCU_WA_PARAM_CMD(SET), &req,
85+ sizeof(req), false);
86+}
87
88 int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled)
89 {
developer30d39c22022-12-16 10:29:49 +080090@@ -4543,17 +4575,21 @@ int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled)
developera833e5a2022-09-07 18:00:50 +080091 u32 red_type = enabled > 0 ? RED_BY_WA_ENABLE : RED_DISABLE;
92 __le32 req = cpu_to_le32(red_type);
93
94+ if (enabled) {
95+ ret = mt7915_red_set_watermark(dev);
96+ if (ret < 0)
97+ return ret;
98+ }
99+
100 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RED_ENABLE), &req,
101 sizeof(req), false);
102 if (ret < 0)
103 return ret;
104
105- mt7915_dbg_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
106- MCU_WA_PARAM_RED, enabled, 0, true);
107+ return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
108+ MCU_WA_PARAM_RED, enabled, 0);
109
110- return 0;
111 }
112-#endif
113
114 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)
115 {
116diff --git a/mt7915/mcu.h b/mt7915/mcu.h
developer699cda22022-12-17 15:21:57 +0800117index f2f88cc..572cc16 100644
developera833e5a2022-09-07 18:00:50 +0800118--- a/mt7915/mcu.h
119+++ b/mt7915/mcu.h
developerafd75872022-12-14 21:15:46 +0800120@@ -285,6 +285,7 @@ enum {
121 MCU_WA_PARAM_CPU_UTIL = 0x0b,
122 MCU_WA_PARAM_RED = 0x0e,
developera833e5a2022-09-07 18:00:50 +0800123 MCU_WA_PARAM_WED_VERSION = 0x32,
124+ MCU_WA_PARAM_RED_SETTING = 0x40,
developerafd75872022-12-14 21:15:46 +0800125 #ifdef MTK_DEBUG
126 MCU_WA_PARAM_RED_SHOW_STA = 0xf,
127 MCU_WA_PARAM_RED_TARGET_DELAY = 0x10,
developer30d39c22022-12-16 10:29:49 +0800128diff --git a/mt7915/mmio.c b/mt7915/mmio.c
developer699cda22022-12-17 15:21:57 +0800129index e0761e8..b29fe7a 100644
developer30d39c22022-12-16 10:29:49 +0800130--- a/mt7915/mmio.c
131+++ b/mt7915/mmio.c
132@@ -759,7 +759,7 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr,
133 wed->wlan.wpdma_rx_glo = res->start + MT_WPDMA_GLO_CFG;
134 wed->wlan.wpdma_rx = res->start + MT_RXQ_WED_DATA_RING_BASE;
135 }
136- wed->wlan.nbuf = 4096;
137+ wed->wlan.nbuf = MT7915_HW_TOKEN_SIZE;
138 wed->wlan.tx_tbit[0] = is_mt7915(&dev->mt76) ? 4 : 30;
139 wed->wlan.tx_tbit[1] = is_mt7915(&dev->mt76) ? 5 : 31;
140 wed->wlan.txfree_tbit = is_mt7986(&dev->mt76) ? 2 : 1;
developera833e5a2022-09-07 18:00:50 +0800141diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
developer699cda22022-12-17 15:21:57 +0800142index 89c13db..5b0f1fc 100644
developera833e5a2022-09-07 18:00:50 +0800143--- a/mt7915/mt7915.h
144+++ b/mt7915/mt7915.h
developer30d39c22022-12-16 10:29:49 +0800145@@ -56,6 +56,7 @@
146
147 #define MT7915_EEPROM_BLOCK_SIZE 16
148 #define MT7915_TOKEN_SIZE 8192
149+#define MT7915_HW_TOKEN_SIZE 4096
150
151 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
152 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
153@@ -771,13 +772,14 @@ int mt7915_vendor_amnt_sta_remove(struct mt7915_phy *phy,
developera833e5a2022-09-07 18:00:50 +0800154 #endif
developer335cbee2022-11-17 14:55:34 +0800155 int mt7915_mcu_set_edcca(struct mt7915_phy *phy, int mode, u8 *value, s8 compensation);
156 int mt7915_mcu_get_edcca(struct mt7915_phy *phy, u8 mode, s8 *value);
developera833e5a2022-09-07 18:00:50 +0800157+int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled);
developer335cbee2022-11-17 14:55:34 +0800158+
developer887da632022-10-28 09:35:38 +0800159 int mt7915_mcu_ipi_hist_ctrl(struct mt7915_phy *phy, void *data, u8 cmd, bool wait_resp);
160 int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool wait_resp);
developer335cbee2022-11-17 14:55:34 +0800161
developera833e5a2022-09-07 18:00:50 +0800162 #ifdef MTK_DEBUG
163 int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir);
164 int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3, bool wait_resp);
165-int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled);
166 void mt7915_dump_tmac_info(u8 *tmac_info);
167 int mt7915_mcu_set_txpower_level(struct mt7915_phy *phy, u8 drop_level);
168 void mt7915_packet_log_to_host(struct mt7915_dev *dev, const void *data, int len, int type, int des_len);
169--
developer699cda22022-12-17 15:21:57 +08001702.36.1
developera833e5a2022-09-07 18:00:50 +0800171