developer | 2908908 | 2023-05-25 12:12:40 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* FILE NAME: en8801sc.h |
| 3 | * PURPOSE: |
| 4 | * Define EN8801SC driver function |
| 5 | * |
| 6 | * NOTES: |
| 7 | * |
| 8 | */ |
| 9 | |
| 10 | #ifndef __EN8801SC_H |
| 11 | #define __EN8801SC_H |
| 12 | |
| 13 | /* NAMING DECLARATIONS |
| 14 | */ |
| 15 | #define EN8801S_DRIVER_VERSION "1.1.7_Generic" |
| 16 | #define EN8801S_PBUS_DEFAULT_ID 0x1e |
| 17 | #define EN8801S_RG_ETHER_PHY_OUI 0x19a4 |
| 18 | #define EN8801S_RG_SMI_ADDR 0x19a8 |
| 19 | #define EN8801S_RG_BUCK_CTL 0x1a20 |
| 20 | #define EN8801S_RG_LTR_CTL 0x0cf8 |
| 21 | |
| 22 | #define EN8801S_PBUS_OUI 0x17a5 |
| 23 | #define EN8801S_PHY_ID1 0x03a2 |
| 24 | #define EN8801S_PHY_ID2 0x9461 |
| 25 | #define EN8801SC_PHY_ID 0x03a29471 |
| 26 | |
| 27 | #define LED_ON_CTRL(i) (0x024 + ((i)*2)) |
| 28 | #define LED_ON_EN (1 << 15) |
| 29 | #define LED_ON_POL (1 << 14) |
| 30 | #define LED_ON_EVT_MASK (0x7f) |
| 31 | /* LED ON Event Option.B */ |
| 32 | #define LED_ON_EVT_FORCE (1 << 6) |
| 33 | #define LED_ON_EVT_LINK_DOWN (1 << 3) |
| 34 | #define LED_ON_EVT_LINK_10M (1 << 2) |
| 35 | #define LED_ON_EVT_LINK_100M (1 << 1) |
| 36 | #define LED_ON_EVT_LINK_1000M (1 << 0) |
| 37 | /* LED ON Event Option.E */ |
| 38 | |
| 39 | #define LED_BLK_CTRL(i) (0x025 + ((i)*2)) |
| 40 | #define LED_BLK_EVT_MASK (0x3ff) |
| 41 | /* LED Blinking Event Option.B*/ |
| 42 | #define LED_BLK_EVT_FORCE (1 << 9) |
| 43 | #define LED_BLK_EVT_10M_RX_ACT (1 << 5) |
| 44 | #define LED_BLK_EVT_10M_TX_ACT (1 << 4) |
| 45 | #define LED_BLK_EVT_100M_RX_ACT (1 << 3) |
| 46 | #define LED_BLK_EVT_100M_TX_ACT (1 << 2) |
| 47 | #define LED_BLK_EVT_1000M_RX_ACT (1 << 1) |
| 48 | #define LED_BLK_EVT_1000M_TX_ACT (1 << 0) |
| 49 | /* LED Blinking Event Option.E*/ |
| 50 | #define LED_ENABLE 1 |
| 51 | #define LED_DISABLE 0 |
| 52 | |
| 53 | #define LINK_UP 1 |
| 54 | #define LINK_DOWN 0 |
| 55 | |
| 56 | /* |
| 57 | SFP Sample for verification |
| 58 | Tx Reverse, Rx Reverse |
| 59 | */ |
| 60 | #define EN8801S_TX_POLARITY_NORMAL 0x0 |
| 61 | #define EN8801S_TX_POLARITY_REVERSE 0x1 |
| 62 | |
| 63 | #define EN8801S_RX_POLARITY_NORMAL (0x1 << 1) |
| 64 | #define EN8801S_RX_POLARITY_REVERSE (0x0 << 1) |
| 65 | |
| 66 | /* |
| 67 | The following led_cfg example is for reference only. |
| 68 | LED5 1000M/LINK/ACT (GPIO5) <-> BASE_T_LED0, |
| 69 | LED6 10/100M/LINK/ACT(GPIO9) <-> BASE_T_LED1, |
| 70 | LED4 100M/LINK/ACT (GPIO8) <-> BASE_T_LED2, |
| 71 | */ |
| 72 | /* User-defined.B */ |
| 73 | #define BASE_T_LED0_ON_CFG (LED_ON_EVT_LINK_1000M) |
| 74 | #define BASE_T_LED0_BLK_CFG \ |
| 75 | (LED_BLK_EVT_1000M_TX_ACT | \ |
| 76 | LED_BLK_EVT_1000M_RX_ACT) |
| 77 | #define BASE_T_LED1_ON_CFG \ |
| 78 | (LED_ON_EVT_LINK_100M | \ |
| 79 | LED_ON_EVT_LINK_10M) |
| 80 | #define BASE_T_LED1_BLK_CFG \ |
| 81 | (LED_BLK_EVT_100M_TX_ACT | \ |
| 82 | LED_BLK_EVT_100M_RX_ACT | \ |
| 83 | LED_BLK_EVT_10M_TX_ACT | \ |
| 84 | LED_BLK_EVT_10M_RX_ACT) |
| 85 | #define BASE_T_LED2_ON_CFG \ |
| 86 | (LED_ON_EVT_LINK_100M) |
| 87 | #define BASE_T_LED2_BLK_CFG \ |
| 88 | (LED_BLK_EVT_100M_TX_ACT | \ |
| 89 | LED_BLK_EVT_100M_RX_ACT) |
| 90 | #define BASE_T_LED3_ON_CFG (0x0) |
| 91 | #define BASE_T_LED3_BLK_CFG (0x0) |
| 92 | /* User-defined.E */ |
| 93 | |
| 94 | #define EN8801S_LED_COUNT 4 |
| 95 | |
| 96 | #define MAX_RETRY 5 |
| 97 | #define MAX_OUI_CHECK 2 |
| 98 | /* CL45 MDIO control */ |
| 99 | #define MII_MMD_ACC_CTL_REG 0x0d |
| 100 | #define MII_MMD_ADDR_DATA_REG 0x0e |
| 101 | #define MMD_OP_MODE_DATA BIT(14) |
| 102 | |
| 103 | #define MAX_TRG_COUNTER 5 |
| 104 | |
| 105 | /* CL22 Reg Support Page Select */ |
| 106 | #define RgAddr_Reg1Fh 0x1f |
| 107 | #define CL22_Page_Reg 0x0000 |
| 108 | #define CL22_Page_ExtReg 0x0001 |
| 109 | #define CL22_Page_MiscReg 0x0002 |
| 110 | #define CL22_Page_LpiReg 0x0003 |
| 111 | #define CL22_Page_tReg 0x02A3 |
| 112 | #define CL22_Page_TrReg 0x52B5 |
| 113 | |
| 114 | /* CL45 Reg Support DEVID */ |
| 115 | #define DEVID_03 0x03 |
| 116 | #define DEVID_07 0x07 |
| 117 | #define DEVID_1E 0x1E |
| 118 | #define DEVID_1F 0x1F |
| 119 | |
| 120 | /* TokenRing Reg Access */ |
| 121 | #define TrReg_PKT_XMT_STA 0x8000 |
| 122 | #define TrReg_WR 0x8000 |
| 123 | #define TrReg_RD 0xA000 |
| 124 | |
| 125 | #define RgAddr_LPI_1Ch 0x1c |
| 126 | #define RgAddr_AUXILIARY_1Dh 0x1d |
| 127 | #define RgAddr_PMA_00h 0x0f80 |
| 128 | #define RgAddr_PMA_01h 0x0f82 |
| 129 | #define RgAddr_PMA_17h 0x0fae |
| 130 | #define RgAddr_PMA_18h 0x0fb0 |
| 131 | #define RgAddr_DSPF_03h 0x1686 |
| 132 | #define RgAddr_DSPF_06h 0x168c |
| 133 | #define RgAddr_DSPF_08h 0x1690 |
| 134 | #define RgAddr_DSPF_0Ch 0x1698 |
| 135 | #define RgAddr_DSPF_0Dh 0x169a |
| 136 | #define RgAddr_DSPF_0Fh 0x169e |
| 137 | #define RgAddr_DSPF_10h 0x16a0 |
| 138 | #define RgAddr_DSPF_11h 0x16a2 |
| 139 | #define RgAddr_DSPF_13h 0x16a6 |
| 140 | #define RgAddr_DSPF_14h 0x16a8 |
| 141 | #define RgAddr_DSPF_1Bh 0x16b6 |
| 142 | #define RgAddr_DSPF_1Ch 0x16b8 |
| 143 | #define RgAddr_TR_26h 0x0ecc |
| 144 | #define RgAddr_R1000DEC_15h 0x03aa |
| 145 | #define RgAddr_R1000DEC_17h 0x03ae |
| 146 | |
| 147 | #define LED_BCR (0x021) |
| 148 | #define LED_BCR_EXT_CTRL (1 << 15) |
| 149 | #define LED_BCR_CLK_EN (1 << 3) |
| 150 | #define LED_BCR_TIME_TEST (1 << 2) |
| 151 | #define LED_BCR_MODE_MASK (3) |
| 152 | #define LED_BCR_MODE_DISABLE (0) |
| 153 | |
| 154 | #define LED_ON_DUR (0x022) |
| 155 | #define LED_ON_DUR_MASK (0xffff) |
| 156 | |
| 157 | #define LED_BLK_DUR (0x023) |
| 158 | #define LED_BLK_DUR_MASK (0xffff) |
| 159 | |
| 160 | #define LED_GPIO_SEL_MASK 0x7FFFFFF |
| 161 | |
| 162 | #define UNIT_LED_BLINK_DURATION 1024 |
| 163 | |
| 164 | /* Invalid data */ |
| 165 | #define INVALID_DATA 0xffffffff |
| 166 | |
| 167 | #define LED_SET_EVT(reg, cod, result, bit) do \ |
| 168 | { \ |
| 169 | if (reg & cod) { \ |
| 170 | result |= bit; \ |
| 171 | } \ |
| 172 | } while (0) |
| 173 | |
| 174 | #define LED_SET_GPIO_SEL(gpio, led, val) \ |
| 175 | (val |= (led << (8 * (gpio % 4)))) \ |
| 176 | |
| 177 | |
| 178 | /* DATA TYPE DECLARATIONS |
| 179 | */ |
| 180 | struct AIR_BASE_T_LED_CFG_S { |
| 181 | u16 en; |
| 182 | u16 gpio; |
| 183 | u16 pol; |
| 184 | u16 on_cfg; |
| 185 | u16 blk_cfg; |
| 186 | }; |
| 187 | |
| 188 | union gephy_all_REG_LpiReg1Ch { |
| 189 | struct { |
| 190 | /* b[15:00] */ |
| 191 | u16 smi_deton_wt : 3; |
| 192 | u16 smi_det_mdi_inv : 1; |
| 193 | u16 smi_detoff_wt : 3; |
| 194 | u16 smi_sigdet_debouncing_en : 1; |
| 195 | u16 smi_deton_th : 6; |
| 196 | u16 rsv_14 : 2; |
| 197 | } DataBitField; |
| 198 | u16 DATA; |
| 199 | }; |
| 200 | |
| 201 | union gephy_all_REG_dev1Eh_reg324h { |
| 202 | struct { |
| 203 | /* b[15:00] */ |
| 204 | u16 rg_smi_detcnt_max : 6; |
| 205 | u16 rsv_6 : 2; |
| 206 | u16 rg_smi_det_max_en : 1; |
| 207 | u16 smi_det_deglitch_off : 1; |
| 208 | u16 rsv_10 : 6; |
| 209 | } DataBitField; |
| 210 | u16 DATA; |
| 211 | }; |
| 212 | |
| 213 | union gephy_all_REG_dev1Eh_reg012h { |
| 214 | struct { |
| 215 | /* b[15:00] */ |
| 216 | u16 da_tx_i2mpb_a_tbt : 6; |
| 217 | u16 rsv_6 : 4; |
| 218 | u16 da_tx_i2mpb_a_gbe : 6; |
| 219 | } DataBitField; |
| 220 | u16 DATA; |
| 221 | }; |
| 222 | |
| 223 | union gephy_all_REG_dev1Eh_reg017h { |
| 224 | struct { |
| 225 | /* b[15:00] */ |
| 226 | u16 da_tx_i2mpb_b_tbt : 6; |
| 227 | u16 rsv_6 : 2; |
| 228 | u16 da_tx_i2mpb_b_gbe : 6; |
| 229 | u16 rsv_14 : 2; |
| 230 | } DataBitField; |
| 231 | u16 DATA; |
| 232 | }; |
| 233 | |
| 234 | enum { |
| 235 | AIR_LED_BLK_DUR_32M, |
| 236 | AIR_LED_BLK_DUR_64M, |
| 237 | AIR_LED_BLK_DUR_128M, |
| 238 | AIR_LED_BLK_DUR_256M, |
| 239 | AIR_LED_BLK_DUR_512M, |
| 240 | AIR_LED_BLK_DUR_1024M, |
| 241 | AIR_LED_BLK_DUR_LAST |
| 242 | }; |
| 243 | |
| 244 | enum { |
| 245 | AIR_ACTIVE_LOW, |
| 246 | AIR_ACTIVE_HIGH, |
| 247 | }; |
| 248 | |
| 249 | enum { |
| 250 | AIR_LED_MODE_DISABLE, |
| 251 | AIR_LED_MODE_USER_DEFINE, |
| 252 | AIR_LED_MODE_LAST |
| 253 | }; |
| 254 | |
| 255 | #endif /* End of __EN8801SC_H */ |