blob: b112bdbf792a17a64c65c7e8a348590317a5a7c7 [file] [log] [blame]
developer5d148cb2023-06-02 13:08:11 +08001From 4df7f1c284d2c63bc78c2a517e510a8d250dd4c4 Mon Sep 17 00:00:00 2001
2From: Sam Shih <sam.shih@mediatek.com>
3Date: Fri, 2 Jun 2023 13:06:01 +0800
4Subject: [PATCH]
5 [backport-networking-drivers][999-1708-net-phy-add-5GBASER.patch]
6
7---
8 drivers/net/phy/marvell10g.c | 4 ++++
9 drivers/net/phy/phylink.c | 4 ++++
10 drivers/net/phy/sfp-bus.c | 3 +++
11 include/linux/phy.h | 3 +++
12 4 files changed, 14 insertions(+)
13
developer82eae452023-02-13 10:04:09 +080014diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
developer5d148cb2023-06-02 13:08:11 +080015index 512f27b0b..1e4631761 100644
developer82eae452023-02-13 10:04:09 +080016--- a/drivers/net/phy/marvell10g.c
17+++ b/drivers/net/phy/marvell10g.c
developer5d148cb2023-06-02 13:08:11 +080018@@ -386,6 +386,7 @@ static void mv3310_update_interface(struct phy_device *phydev)
19 {
developer82eae452023-02-13 10:04:09 +080020 if ((phydev->interface == PHY_INTERFACE_MODE_SGMII ||
21 phydev->interface == PHY_INTERFACE_MODE_2500BASEX ||
22+ phydev->interface == PHY_INTERFACE_MODE_5GBASER ||
23 phydev->interface == PHY_INTERFACE_MODE_10GKR) && phydev->link) {
24 /* The PHY automatically switches its serdes interface (and
25 * active PHYXS instance) between Cisco SGMII, 10GBase-KR and
developer5d148cb2023-06-02 13:08:11 +080026@@ -397,6 +398,9 @@ static void mv3310_update_interface(struct phy_device *phydev)
developer82eae452023-02-13 10:04:09 +080027 case SPEED_10000:
28 phydev->interface = PHY_INTERFACE_MODE_10GKR;
29 break;
30+ case SPEED_5000:
31+ phydev->interface = PHY_INTERFACE_MODE_5GBASER;
32+ break;
33 case SPEED_2500:
34 phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
35 break;
developercfa104b2023-01-11 17:40:41 +080036diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
developer5d148cb2023-06-02 13:08:11 +080037index b3f25a939..f360d9225 100644
developercfa104b2023-01-11 17:40:41 +080038--- a/drivers/net/phy/phylink.c
39+++ b/drivers/net/phy/phylink.c
40@@ -299,6 +299,10 @@ static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
41 phylink_set(pl->supported, 2500baseX_Full);
42 break;
43
44+ case PHY_INTERFACE_MODE_5GBASER:
45+ phylink_set(pl->supported, 5000baseT_Full);
46+ break;
47+
48 case PHY_INTERFACE_MODE_10GKR:
49 phylink_set(pl->supported, 10baseT_Half);
50 phylink_set(pl->supported, 10baseT_Full);
51diff --git a/drivers/net/phy/sfp-bus.c b/drivers/net/phy/sfp-bus.c
developer5d148cb2023-06-02 13:08:11 +080052index 42f0441f2..a2f451c31 100644
developercfa104b2023-01-11 17:40:41 +080053--- a/drivers/net/phy/sfp-bus.c
54+++ b/drivers/net/phy/sfp-bus.c
developer5d148cb2023-06-02 13:08:11 +080055@@ -389,6 +389,9 @@ phy_interface_t sfp_select_interface(struct sfp_bus *bus,
developercfa104b2023-01-11 17:40:41 +080056 phylink_test(link_modes, 10000baseT_Full))
57 return PHY_INTERFACE_MODE_10GKR;
58
59+ if (phylink_test(link_modes, 5000baseT_Full))
60+ return PHY_INTERFACE_MODE_5GBASER;
61+
62 if (phylink_test(link_modes, 2500baseX_Full))
63 return PHY_INTERFACE_MODE_2500BASEX;
64
65diff --git a/include/linux/phy.h b/include/linux/phy.h
developer5d148cb2023-06-02 13:08:11 +080066index 19444cd96..a1070d60e 100644
developercfa104b2023-01-11 17:40:41 +080067--- a/include/linux/phy.h
68+++ b/include/linux/phy.h
developer5d148cb2023-06-02 13:08:11 +080069@@ -97,6 +97,7 @@ typedef enum {
developercfa104b2023-01-11 17:40:41 +080070 PHY_INTERFACE_MODE_TRGMII,
71 PHY_INTERFACE_MODE_1000BASEX,
72 PHY_INTERFACE_MODE_2500BASEX,
73+ PHY_INTERFACE_MODE_5GBASER,
74 PHY_INTERFACE_MODE_RXAUI,
75 PHY_INTERFACE_MODE_XAUI,
76 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
developer5d148cb2023-06-02 13:08:11 +080077@@ -171,6 +172,8 @@ static inline const char *phy_modes(phy_interface_t interface)
developercfa104b2023-01-11 17:40:41 +080078 return "1000base-x";
79 case PHY_INTERFACE_MODE_2500BASEX:
80 return "2500base-x";
81+ case PHY_INTERFACE_MODE_5GBASER:
82+ return "5gbase-r";
83 case PHY_INTERFACE_MODE_RXAUI:
84 return "rxaui";
85 case PHY_INTERFACE_MODE_XAUI:
developer5d148cb2023-06-02 13:08:11 +080086--
872.34.1
88