blob: 49a38b693485f7db5e94cc70aa361ef570a2a596 [file] [log] [blame]
developer5c2422b2024-03-08 00:27:44 +08001/* FILE NAME: air_aml.h
2 * PURPOSE:
3 * Define the access management layer function in AIR SDK.
4 * NOTES:
5 */
6
7#ifndef AIR_AML_H
8#define AIR_AML_H
9
10/* INCLUDE FILE DECLARATIONS
11 */
12
13/* NAMING CONSTANT DECLARATIONS
14 */
15
16/* MACRO FUNCTION DECLARATIONS
17 */
18
19/* DATA TYPE DECLARATIONS
20 */
21typedef AIR_ERROR_NO_T
22(*AML_DEV_READ_FUNC_T)(
23 const UI32_T unit,
24 const UI32_T addr_offset,
25 UI32_T *ptr_data);
26
27typedef AIR_ERROR_NO_T
28(*AML_DEV_WRITE_FUNC_T)(
29 const UI32_T unit,
30 const UI32_T addr_offset,
31 const UI32_T data);
32
33typedef AIR_ERROR_NO_T
34(*AML_DEV_PHY_READ_FUNC_T)(
35 const UI32_T unit,
36 const UI32_T port_id,
37 const UI32_T addr_offset,
38 UI32_T *ptr_data);
39
40typedef AIR_ERROR_NO_T
41(*AML_DEV_PHY_WRITE_FUNC_T)(
42 const UI32_T unit,
43 const UI32_T port_id,
44 const UI32_T addr_offset,
45 const UI32_T data);
46
47typedef AIR_ERROR_NO_T
48(*AML_DEV_PHY_READ_CL45_FUNC_T)(
49 const UI32_T unit,
50 const UI32_T port_id,
51 const UI32_T dev_type,
52 const UI32_T addr_offset,
53 UI32_T *ptr_data);
54
55typedef AIR_ERROR_NO_T
56(*AML_DEV_PHY_WRITE_CL45_FUNC_T)(
57 const UI32_T unit,
58 const UI32_T port_id,
59 const UI32_T dev_type,
60 const UI32_T addr_offset,
61 const UI32_T data);
62
63/* To read or write the HW-intf registers. */
64typedef struct
65{
66 AML_DEV_READ_FUNC_T read_callback;
67 AML_DEV_WRITE_FUNC_T write_callback;
68 AML_DEV_PHY_READ_FUNC_T phy_read_callback;
69 AML_DEV_PHY_WRITE_FUNC_T phy_write_callback;
70 AML_DEV_PHY_READ_CL45_FUNC_T phy_cl45_read_callback;
71 AML_DEV_PHY_WRITE_CL45_FUNC_T phy_cl45_write_callback;
72}AML_DEV_ACCESS_T;
73
74/* EXPORTED SUBPROGRAM SPECIFICATIONS
75 */
76extern AML_DEV_ACCESS_T _ext_dev_access;
77
78/* FUNCTION NAME: aml_readReg
79 * PURPOSE:
80 * To read data from the register of the specified chip unit.
81 * INPUT:
82 * unit -- the device unit
83 * addr_offset -- the address of register
84 * OUTPUT:
85 * ptr_data -- pointer for the register data
86 * RETURN:
87 * NPS_E_OK -- Successfully read the data.
88 * NPS_E_OTHERS -- Failed to read the data.
89 * NOTES:
90 * none
91 */
92AIR_ERROR_NO_T
93aml_readReg(
94 const UI32_T unit,
95 const UI32_T addr_offset,
96 UI32_T *ptr_data);
97
98/* FUNCTION NAME: aml_writeReg
99 * PURPOSE:
100 * To write data to the register of the specified chip unit.
101 * INPUT:
102 * unit -- the device unit
103 * addr_offset -- the address of register
104 * data -- written data
105 * OUTPUT:
106 * none
107 * RETURN:
108 * NPS_E_OK -- Successfully write the data.
109 * NPS_E_OTHERS -- Failed to write the data.
110 * NOTES:
111 * none
112 */
113AIR_ERROR_NO_T
114aml_writeReg(
115 const UI32_T unit,
116 const UI32_T addr_offset,
117 const UI32_T data);
118
119/* FUNCTION NAME: aml_readPhyReg
120 * PURPOSE:
121 * To read data from the phy register of the specified chip unit in Clause22.
122 * INPUT:
123 * unit -- the device unit
124 * port_id -- physical port number
125 * addr_offset -- the address of phy register
126 * OUTPUT:
127 * ptr_data -- pointer for the register data
128 * RETURN:
129 * NPS_E_OK -- Successfully read the data.
130 * NPS_E_OTHERS -- Failed to read the data.
131 * NOTES:
132 * none
133 */
134AIR_ERROR_NO_T
135aml_readPhyReg(
136 const UI32_T unit,
137 const UI32_T port_id,
138 const UI32_T addr_offset,
139 UI32_T *ptr_data);
140
141/* FUNCTION NAME: aml_writePhyReg
142 * PURPOSE:
143 * To write data to the phy register of the specified chip unit in Clause22.
144 * INPUT:
145 * unit -- the device unit
146 * port_id -- physical port number
147 * addr_offset -- the address of phy register
148 * data -- written data
149 * OUTPUT:
150 * none
151 * RETURN:
152 * NPS_E_OK -- Successfully write the data.
153 * NPS_E_OTHERS -- Failed to write the data.
154 * NOTES:
155 * none
156 */
157AIR_ERROR_NO_T
158aml_writePhyReg(
159 const UI32_T unit,
160 const UI32_T port_id,
161 const UI32_T addr_offset,
162 const UI32_T ptr_data);
163
164/* FUNCTION NAME: aml_readPhyRegCL45
165 * PURPOSE:
166 * To read data from the phy register of the specified chip unit in Clause45.
167 * INPUT:
168 * unit -- the device unit
169 * port_id -- physical port number
170 * dev_type -- phy register type
171 * addr_offset -- the address of phy register
172 * OUTPUT:
173 * ptr_data -- pointer for the register data
174 * RETURN:
175 * NPS_E_OK -- Successfully read the data.
176 * NPS_E_OTHERS -- Failed to read the data.
177 * NOTES:
178 * none
179 */
180AIR_ERROR_NO_T
181aml_readPhyRegCL45(
182 const UI32_T unit,
183 const UI32_T port_id,
184 const UI32_T dev_type,
185 const UI32_T addr_offset,
186 UI32_T *ptr_data);
187
188/* FUNCTION NAME: aml_writePhyRegCL45
189 * PURPOSE:
190 * To write data to the phy register of the specified chip unit in Clause45.
191 * INPUT:
192 * unit -- the device unit
193 * port_id -- physical port number
194 * dev_type -- phy register offset
195 * addr_offset -- the address of phy register
196 * data -- written data
197 * OUTPUT:
198 * none
199 * RETURN:
200 * NPS_E_OK -- Successfully write the data.
201 * NPS_E_OTHERS -- Failed to write the data.
202 * NOTES:
203 * none
204 */
205AIR_ERROR_NO_T
206aml_writePhyRegCL45(
207 const UI32_T unit,
208 const UI32_T port_id,
209 const UI32_T dev_type,
210 const UI32_T addr_offset,
211 const UI32_T data);
212
213#endif /* AIR_AML_H */
214