developer | be797a3 | 2021-12-16 16:56:09 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | // |
| 3 | // mt79xx-afe-clk.c -- Mediatek 79xx afe clock ctrl |
| 4 | // |
| 5 | // Copyright (c) 2021 MediaTek Inc. |
| 6 | // Author: Vic Wu <vic.wu@mediatek.com> |
| 7 | |
| 8 | #include <linux/clk.h> |
| 9 | |
| 10 | #include "mt79xx-afe-common.h" |
| 11 | #include "mt79xx-afe-clk.h" |
| 12 | #include "mt79xx-reg.h" |
| 13 | |
| 14 | enum { |
| 15 | CK_INFRA_AUD_BUS_CK = 0, |
| 16 | CK_INFRA_AUD_26M_CK, |
| 17 | CK_INFRA_AUD_L_CK, |
| 18 | CK_INFRA_AUD_AUD_CK, |
| 19 | CK_INFRA_AUD_EG2_CK, |
| 20 | CLK_NUM |
| 21 | }; |
| 22 | |
| 23 | static const char *aud_clks[CLK_NUM] = { |
| 24 | [CK_INFRA_AUD_BUS_CK] = "aud_bus_ck", |
| 25 | [CK_INFRA_AUD_26M_CK] = "aud_26m_ck", |
| 26 | [CK_INFRA_AUD_L_CK] = "aud_l_ck", |
| 27 | [CK_INFRA_AUD_AUD_CK] = "aud_aud_ck", |
| 28 | [CK_INFRA_AUD_EG2_CK] = "aud_eg2_ck", |
| 29 | }; |
| 30 | |
| 31 | int mt79xx_init_clock(struct mtk_base_afe *afe) |
| 32 | { |
| 33 | struct mt79xx_afe_private *afe_priv = afe->platform_priv; |
| 34 | int i; |
| 35 | |
| 36 | afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk), |
| 37 | GFP_KERNEL); |
| 38 | if (!afe_priv->clk) |
| 39 | return -ENOMEM; |
| 40 | |
| 41 | for (i = 0; i < CLK_NUM; i++) { |
| 42 | afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); |
| 43 | if (IS_ERR(afe_priv->clk[i])) { |
| 44 | dev_err(afe->dev, "%s(), devm_clk_get %s fail,\ |
| 45 | ret %ld\n", __func__, aud_clks[i], |
| 46 | PTR_ERR(afe_priv->clk[i])); |
| 47 | return PTR_ERR(afe_priv->clk[i]); |
| 48 | } |
| 49 | } |
| 50 | |
| 51 | return 0; |
| 52 | } |
| 53 | |
| 54 | int mt79xx_afe_enable_clock(struct mtk_base_afe *afe) |
| 55 | { |
| 56 | struct mt79xx_afe_private *afe_priv = afe->platform_priv; |
| 57 | int ret; |
| 58 | |
| 59 | ret = clk_prepare_enable(afe_priv->clk[CK_INFRA_AUD_BUS_CK]); |
| 60 | if (ret) { |
| 61 | dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n", |
| 62 | __func__, aud_clks[CK_INFRA_AUD_BUS_CK], ret); |
| 63 | goto CK_INFRA_AUD_BUS_CK_ERR; |
| 64 | } |
| 65 | |
| 66 | ret = clk_prepare_enable(afe_priv->clk[CK_INFRA_AUD_26M_CK]); |
| 67 | if (ret) { |
| 68 | dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n", |
| 69 | __func__, aud_clks[CK_INFRA_AUD_26M_CK], ret); |
| 70 | goto CK_INFRA_AUD_26M_ERR; |
| 71 | } |
| 72 | |
| 73 | ret = clk_prepare_enable(afe_priv->clk[CK_INFRA_AUD_L_CK]); |
| 74 | if (ret) { |
| 75 | dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n", |
| 76 | __func__, aud_clks[CK_INFRA_AUD_L_CK], ret); |
| 77 | goto CK_INFRA_AUD_L_CK_ERR; |
| 78 | } |
| 79 | |
| 80 | ret = clk_prepare_enable(afe_priv->clk[CK_INFRA_AUD_AUD_CK]); |
| 81 | if (ret) { |
| 82 | dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n", |
| 83 | __func__, aud_clks[CK_INFRA_AUD_AUD_CK], ret); |
| 84 | goto CK_INFRA_AUD_AUD_CK_ERR; |
| 85 | } |
| 86 | |
| 87 | ret = clk_prepare_enable(afe_priv->clk[CK_INFRA_AUD_EG2_CK]); |
| 88 | if (ret) { |
| 89 | dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n", |
| 90 | __func__, aud_clks[CK_INFRA_AUD_EG2_CK], ret); |
| 91 | goto CK_INFRA_AUD_EG2_CK_ERR; |
| 92 | } |
| 93 | |
| 94 | return 0; |
| 95 | |
| 96 | CK_INFRA_AUD_EG2_CK_ERR: |
| 97 | clk_disable_unprepare(afe_priv->clk[CK_INFRA_AUD_AUD_CK]); |
| 98 | CK_INFRA_AUD_AUD_CK_ERR: |
| 99 | clk_disable_unprepare(afe_priv->clk[CK_INFRA_AUD_L_CK]); |
| 100 | CK_INFRA_AUD_L_CK_ERR: |
| 101 | clk_disable_unprepare(afe_priv->clk[CK_INFRA_AUD_26M_CK]); |
| 102 | CK_INFRA_AUD_26M_ERR: |
| 103 | clk_disable_unprepare(afe_priv->clk[CK_INFRA_AUD_BUS_CK]); |
| 104 | CK_INFRA_AUD_BUS_CK_ERR: |
| 105 | return ret; |
| 106 | } |
| 107 | EXPORT_SYMBOL_GPL(mt79xx_afe_enable_clock); |
| 108 | |
| 109 | int mt79xx_afe_disable_clock(struct mtk_base_afe *afe) |
| 110 | { |
| 111 | struct mt79xx_afe_private *afe_priv = afe->platform_priv; |
| 112 | |
| 113 | clk_disable_unprepare(afe_priv->clk[CK_INFRA_AUD_EG2_CK]); |
| 114 | clk_disable_unprepare(afe_priv->clk[CK_INFRA_AUD_AUD_CK]); |
| 115 | clk_disable_unprepare(afe_priv->clk[CK_INFRA_AUD_L_CK]); |
| 116 | clk_disable_unprepare(afe_priv->clk[CK_INFRA_AUD_26M_CK]); |
| 117 | clk_disable_unprepare(afe_priv->clk[CK_INFRA_AUD_BUS_CK]); |
| 118 | |
| 119 | return 0; |
| 120 | } |
| 121 | EXPORT_SYMBOL_GPL(mt79xx_afe_disable_clock); |