developer | 50f53d3 | 2023-08-08 18:05:22 +0800 | [diff] [blame^] | 1 | --- a/drivers/pinctrl/mediatek/pinctrl-moore.c |
| 2 | +++ b/drivers/pinctrl/mediatek/pinctrl-moore.c |
| 3 | @@ -99,14 +99,22 @@ static int mtk_pinconf_get(struct pinctr |
| 4 | { |
| 5 | struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
| 6 | u32 param = pinconf_to_config_param(*config); |
| 7 | - int val, val2, err, reg, ret = 1; |
| 8 | + int val, val2, err, pullup, reg, ret = 1; |
| 9 | const struct mtk_pin_desc *desc; |
| 10 | |
| 11 | desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; |
| 12 | + if (!desc->name) |
| 13 | + return -ENOTSUPP; |
| 14 | |
| 15 | switch (param) { |
| 16 | case PIN_CONFIG_BIAS_DISABLE: |
| 17 | - if (hw->soc->bias_disable_get) { |
| 18 | + if (hw->soc->bias_get_combo) { |
| 19 | + err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); |
| 20 | + if (err) |
| 21 | + return err; |
| 22 | + if (ret != MTK_PUPD_SET_R1R0_00 && ret != MTK_DISABLE) |
| 23 | + return -EINVAL; |
| 24 | + } else if (hw->soc->bias_disable_get) { |
| 25 | err = hw->soc->bias_disable_get(hw, desc, &ret); |
| 26 | if (err) |
| 27 | return err; |
| 28 | @@ -115,7 +123,15 @@ static int mtk_pinconf_get(struct pinctr |
| 29 | } |
| 30 | break; |
| 31 | case PIN_CONFIG_BIAS_PULL_UP: |
| 32 | - if (hw->soc->bias_get) { |
| 33 | + if (hw->soc->bias_get_combo) { |
| 34 | + err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); |
| 35 | + if (err) |
| 36 | + return err; |
| 37 | + if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE) |
| 38 | + return -EINVAL; |
| 39 | + if (!pullup) |
| 40 | + return -EINVAL; |
| 41 | + } else if (hw->soc->bias_get) { |
| 42 | err = hw->soc->bias_get(hw, desc, 1, &ret); |
| 43 | if (err) |
| 44 | return err; |
| 45 | @@ -124,7 +140,15 @@ static int mtk_pinconf_get(struct pinctr |
| 46 | } |
| 47 | break; |
| 48 | case PIN_CONFIG_BIAS_PULL_DOWN: |
| 49 | - if (hw->soc->bias_get) { |
| 50 | + if (hw->soc->bias_get_combo) { |
| 51 | + err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); |
| 52 | + if (err) |
| 53 | + return err; |
| 54 | + if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE) |
| 55 | + return -EINVAL; |
| 56 | + if (pullup) |
| 57 | + return -EINVAL; |
| 58 | + } else if (hw->soc->bias_get) { |
| 59 | err = hw->soc->bias_get(hw, desc, 0, &ret); |
| 60 | if (err) |
| 61 | return err; |
| 62 | @@ -218,14 +242,19 @@ static int mtk_pinconf_set(struct pinctr |
| 63 | int cfg, err = 0; |
| 64 | |
| 65 | desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; |
| 66 | + if (!desc->name) |
| 67 | + return -ENOTSUPP; |
| 68 | |
| 69 | for (cfg = 0; cfg < num_configs; cfg++) { |
| 70 | param = pinconf_to_config_param(configs[cfg]); |
| 71 | arg = pinconf_to_config_argument(configs[cfg]); |
| 72 | - |
| 73 | switch (param) { |
| 74 | case PIN_CONFIG_BIAS_DISABLE: |
| 75 | - if (hw->soc->bias_disable_set) { |
| 76 | + if (hw->soc->bias_set_combo) { |
| 77 | + err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE); |
| 78 | + if (err) |
| 79 | + return err; |
| 80 | + } else if (hw->soc->bias_disable_set) { |
| 81 | err = hw->soc->bias_disable_set(hw, desc); |
| 82 | if (err) |
| 83 | return err; |
| 84 | @@ -234,7 +263,11 @@ static int mtk_pinconf_set(struct pinctr |
| 85 | } |
| 86 | break; |
| 87 | case PIN_CONFIG_BIAS_PULL_UP: |
| 88 | - if (hw->soc->bias_set) { |
| 89 | + if (hw->soc->bias_set_combo) { |
| 90 | + err = hw->soc->bias_set_combo(hw, desc, 1, arg); |
| 91 | + if (err) |
| 92 | + return err; |
| 93 | + } else if (hw->soc->bias_set) { |
| 94 | err = hw->soc->bias_set(hw, desc, 1); |
| 95 | if (err) |
| 96 | return err; |
| 97 | @@ -243,7 +276,11 @@ static int mtk_pinconf_set(struct pinctr |
| 98 | } |
| 99 | break; |
| 100 | case PIN_CONFIG_BIAS_PULL_DOWN: |
| 101 | - if (hw->soc->bias_set) { |
| 102 | + if (hw->soc->bias_set_combo) { |
| 103 | + err = hw->soc->bias_set_combo(hw, desc, 0, arg); |
| 104 | + if (err) |
| 105 | + return err; |
| 106 | + } else if (hw->soc->bias_set) { |
| 107 | err = hw->soc->bias_set(hw, desc, 0); |
| 108 | if (err) |
| 109 | return err; |
| 110 | --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c |
| 111 | +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c |
| 112 | @@ -506,6 +506,404 @@ int mtk_pinconf_bias_get_rev1(struct mtk |
| 113 | return 0; |
| 114 | } |
| 115 | |
| 116 | +/* Combo for the following pull register type: |
| 117 | + * 1. PU + PD |
| 118 | + * 2. PULLSEL + PULLEN |
| 119 | + * 3. PUPD + R0 + R1 |
| 120 | + */ |
| 121 | +static int mtk_pinconf_bias_set_pu_pd(struct mtk_pinctrl *hw, |
| 122 | + const struct mtk_pin_desc *desc, |
| 123 | + u32 pullup, u32 arg) |
| 124 | +{ |
| 125 | + int err, pu, pd; |
| 126 | + |
| 127 | + if (arg == MTK_DISABLE) { |
| 128 | + pu = 0; |
| 129 | + pd = 0; |
| 130 | + } else if ((arg == MTK_ENABLE) && pullup) { |
| 131 | + pu = 1; |
| 132 | + pd = 0; |
| 133 | + } else if ((arg == MTK_ENABLE) && !pullup) { |
| 134 | + pu = 0; |
| 135 | + pd = 1; |
| 136 | + } else { |
| 137 | + err = -EINVAL; |
| 138 | + goto out; |
| 139 | + } |
| 140 | + |
| 141 | + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, pu); |
| 142 | + if (err) |
| 143 | + goto out; |
| 144 | + |
| 145 | + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, pd); |
| 146 | + |
| 147 | +out: |
| 148 | + return err; |
| 149 | +} |
| 150 | + |
| 151 | +static int mtk_pinconf_bias_set_pullsel_pullen(struct mtk_pinctrl *hw, |
| 152 | + const struct mtk_pin_desc *desc, |
| 153 | + u32 pullup, u32 arg) |
| 154 | +{ |
| 155 | + int err, enable; |
| 156 | + |
| 157 | + if (arg == MTK_DISABLE) |
| 158 | + enable = 0; |
| 159 | + else if (arg == MTK_ENABLE) |
| 160 | + enable = 1; |
| 161 | + else { |
| 162 | + err = -EINVAL; |
| 163 | + goto out; |
| 164 | + } |
| 165 | + |
| 166 | + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, enable); |
| 167 | + if (err) |
| 168 | + goto out; |
| 169 | + |
| 170 | + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, pullup); |
| 171 | + |
| 172 | +out: |
| 173 | + return err; |
| 174 | +} |
| 175 | + |
| 176 | +static int mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw, |
| 177 | + const struct mtk_pin_desc *desc, |
| 178 | + u32 pullup, u32 arg) |
| 179 | +{ |
| 180 | + int err, r0, r1; |
| 181 | + |
| 182 | + if ((arg == MTK_DISABLE) || (arg == MTK_PUPD_SET_R1R0_00)) { |
| 183 | + pullup = 0; |
| 184 | + r0 = 0; |
| 185 | + r1 = 0; |
| 186 | + } else if (arg == MTK_PUPD_SET_R1R0_01) { |
| 187 | + r0 = 1; |
| 188 | + r1 = 0; |
| 189 | + } else if (arg == MTK_PUPD_SET_R1R0_10) { |
| 190 | + r0 = 0; |
| 191 | + r1 = 1; |
| 192 | + } else if (arg == MTK_PUPD_SET_R1R0_11) { |
| 193 | + r0 = 1; |
| 194 | + r1 = 1; |
| 195 | + } else { |
| 196 | + err = -EINVAL; |
| 197 | + goto out; |
| 198 | + } |
| 199 | + |
| 200 | + /* MTK HW PUPD bit: 1 for pull-down, 0 for pull-up */ |
| 201 | + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PUPD, !pullup); |
| 202 | + if (err) |
| 203 | + goto out; |
| 204 | + |
| 205 | + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R0, r0); |
| 206 | + if (err) |
| 207 | + goto out; |
| 208 | + |
| 209 | + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R1, r1); |
| 210 | + |
| 211 | +out: |
| 212 | + return err; |
| 213 | +} |
| 214 | + |
| 215 | +static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw, |
| 216 | + const struct mtk_pin_desc *desc, |
| 217 | + u32 pullup, u32 arg, u32 *rsel_val) |
| 218 | +{ |
| 219 | + const struct mtk_pin_rsel *rsel; |
| 220 | + int check; |
| 221 | + bool found = false; |
| 222 | + |
| 223 | + rsel = hw->soc->pin_rsel; |
| 224 | + |
| 225 | + for (check = 0; check <= hw->soc->npin_rsel - 1; check++) { |
| 226 | + if (desc->number >= rsel[check].s_pin && |
| 227 | + desc->number <= rsel[check].e_pin) { |
| 228 | + if (pullup) { |
| 229 | + if (rsel[check].up_rsel == arg) { |
| 230 | + found = true; |
| 231 | + *rsel_val = rsel[check].rsel_index; |
| 232 | + break; |
| 233 | + } |
| 234 | + } else { |
| 235 | + if (rsel[check].down_rsel == arg) { |
| 236 | + found = true; |
| 237 | + *rsel_val = rsel[check].rsel_index; |
| 238 | + break; |
| 239 | + } |
| 240 | + } |
| 241 | + } |
| 242 | + } |
| 243 | + |
| 244 | + if (!found) { |
| 245 | + dev_err(hw->dev, "Not support rsel value %d Ohm for pin = %d (%s)\n", |
| 246 | + arg, desc->number, desc->name); |
| 247 | + return -ENOTSUPP; |
| 248 | + } |
| 249 | + |
| 250 | + return 0; |
| 251 | +} |
| 252 | + |
| 253 | +static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw, |
| 254 | + const struct mtk_pin_desc *desc, |
| 255 | + u32 pullup, u32 arg) |
| 256 | +{ |
| 257 | + int err, rsel_val; |
| 258 | + |
| 259 | + if (!pullup && arg == MTK_DISABLE) |
| 260 | + return 0; |
| 261 | + |
| 262 | + if (hw->rsel_si_unit) { |
| 263 | + /* find pin rsel_index from pin_rsel array*/ |
| 264 | + err = mtk_hw_pin_rsel_lookup(hw, desc, pullup, arg, &rsel_val); |
| 265 | + if (err) |
| 266 | + goto out; |
| 267 | + } else { |
| 268 | + if (arg < MTK_PULL_SET_RSEL_000 || |
| 269 | + arg > MTK_PULL_SET_RSEL_111) { |
| 270 | + err = -EINVAL; |
| 271 | + goto out; |
| 272 | + } |
| 273 | + |
| 274 | + rsel_val = arg - MTK_PULL_SET_RSEL_000; |
| 275 | + } |
| 276 | + |
| 277 | + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL, rsel_val); |
| 278 | + if (err) |
| 279 | + goto out; |
| 280 | + |
| 281 | + err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, MTK_ENABLE); |
| 282 | + |
| 283 | +out: |
| 284 | + return err; |
| 285 | +} |
| 286 | + |
| 287 | +int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw, |
| 288 | + const struct mtk_pin_desc *desc, |
| 289 | + u32 pullup, u32 arg) |
| 290 | +{ |
| 291 | + int err = -ENOTSUPP; |
| 292 | + u32 try_all_type; |
| 293 | + |
| 294 | + if (hw->soc->pull_type) |
| 295 | + try_all_type = hw->soc->pull_type[desc->number]; |
| 296 | + else |
| 297 | + try_all_type = MTK_PULL_TYPE_MASK; |
| 298 | + |
| 299 | + if (try_all_type & MTK_PULL_RSEL_TYPE) { |
| 300 | + err = mtk_pinconf_bias_set_rsel(hw, desc, pullup, arg); |
| 301 | + if (!err) |
| 302 | + return err; |
| 303 | + } |
| 304 | + |
| 305 | + if (try_all_type & MTK_PULL_PU_PD_TYPE) { |
| 306 | + err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg); |
| 307 | + if (!err) |
| 308 | + return err; |
| 309 | + } |
| 310 | + |
| 311 | + if (try_all_type & MTK_PULL_PULLSEL_TYPE) { |
| 312 | + err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, |
| 313 | + pullup, arg); |
| 314 | + if (!err) |
| 315 | + return err; |
| 316 | + } |
| 317 | + |
| 318 | + if (try_all_type & MTK_PULL_PUPD_R1R0_TYPE) |
| 319 | + err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg); |
| 320 | + |
| 321 | + if (err) |
| 322 | + dev_err(hw->dev, "Invalid pull argument\n"); |
| 323 | + |
| 324 | + return err; |
| 325 | +} |
| 326 | +EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo); |
| 327 | + |
| 328 | +static int mtk_rsel_get_si_unit(struct mtk_pinctrl *hw, |
| 329 | + const struct mtk_pin_desc *desc, |
| 330 | + u32 pullup, u32 rsel_val, u32 *si_unit) |
| 331 | +{ |
| 332 | + const struct mtk_pin_rsel *rsel; |
| 333 | + int check; |
| 334 | + |
| 335 | + rsel = hw->soc->pin_rsel; |
| 336 | + |
| 337 | + for (check = 0; check <= hw->soc->npin_rsel - 1; check++) { |
| 338 | + if (desc->number >= rsel[check].s_pin && |
| 339 | + desc->number <= rsel[check].e_pin) { |
| 340 | + if (rsel_val == rsel[check].rsel_index) { |
| 341 | + if (pullup) |
| 342 | + *si_unit = rsel[check].up_rsel; |
| 343 | + else |
| 344 | + *si_unit = rsel[check].down_rsel; |
| 345 | + break; |
| 346 | + } |
| 347 | + } |
| 348 | + } |
| 349 | + |
| 350 | + return 0; |
| 351 | +} |
| 352 | + |
| 353 | +static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw, |
| 354 | + const struct mtk_pin_desc *desc, |
| 355 | + u32 *pullup, u32 *enable) |
| 356 | +{ |
| 357 | + int pu, pd, rsel, err; |
| 358 | + |
| 359 | + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL, &rsel); |
| 360 | + if (err) |
| 361 | + goto out; |
| 362 | + |
| 363 | + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu); |
| 364 | + if (err) |
| 365 | + goto out; |
| 366 | + |
| 367 | + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd); |
| 368 | + if (err) |
| 369 | + goto out; |
| 370 | + |
| 371 | + if (pu == 0 && pd == 0) { |
| 372 | + *pullup = 0; |
| 373 | + *enable = MTK_DISABLE; |
| 374 | + } else if (pu == 1 && pd == 0) { |
| 375 | + *pullup = 1; |
| 376 | + if (hw->rsel_si_unit) |
| 377 | + mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable); |
| 378 | + else |
| 379 | + *enable = rsel + MTK_PULL_SET_RSEL_000; |
| 380 | + } else if (pu == 0 && pd == 1) { |
| 381 | + *pullup = 0; |
| 382 | + if (hw->rsel_si_unit) |
| 383 | + mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable); |
| 384 | + else |
| 385 | + *enable = rsel + MTK_PULL_SET_RSEL_000; |
| 386 | + } else { |
| 387 | + err = -EINVAL; |
| 388 | + goto out; |
| 389 | + } |
| 390 | + |
| 391 | +out: |
| 392 | + return err; |
| 393 | +} |
| 394 | + |
| 395 | +static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw, |
| 396 | + const struct mtk_pin_desc *desc, |
| 397 | + u32 *pullup, u32 *enable) |
| 398 | +{ |
| 399 | + int err, pu, pd; |
| 400 | + |
| 401 | + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu); |
| 402 | + if (err) |
| 403 | + goto out; |
| 404 | + |
| 405 | + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd); |
| 406 | + if (err) |
| 407 | + goto out; |
| 408 | + |
| 409 | + if (pu == 0 && pd == 0) { |
| 410 | + *pullup = 0; |
| 411 | + *enable = MTK_DISABLE; |
| 412 | + } else if (pu == 1 && pd == 0) { |
| 413 | + *pullup = 1; |
| 414 | + *enable = MTK_ENABLE; |
| 415 | + } else if (pu == 0 && pd == 1) { |
| 416 | + *pullup = 0; |
| 417 | + *enable = MTK_ENABLE; |
| 418 | + } else |
| 419 | + err = -EINVAL; |
| 420 | + |
| 421 | +out: |
| 422 | + return err; |
| 423 | +} |
| 424 | + |
| 425 | +static int mtk_pinconf_bias_get_pullsel_pullen(struct mtk_pinctrl *hw, |
| 426 | + const struct mtk_pin_desc *desc, |
| 427 | + u32 *pullup, u32 *enable) |
| 428 | +{ |
| 429 | + int err; |
| 430 | + |
| 431 | + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, pullup); |
| 432 | + if (err) |
| 433 | + goto out; |
| 434 | + |
| 435 | + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, enable); |
| 436 | + |
| 437 | +out: |
| 438 | + return err; |
| 439 | +} |
| 440 | + |
| 441 | +static int mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw, |
| 442 | + const struct mtk_pin_desc *desc, |
| 443 | + u32 *pullup, u32 *enable) |
| 444 | +{ |
| 445 | + int err, r0, r1; |
| 446 | + |
| 447 | + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PUPD, pullup); |
| 448 | + if (err) |
| 449 | + goto out; |
| 450 | + /* MTK HW PUPD bit: 1 for pull-down, 0 for pull-up */ |
| 451 | + *pullup = !(*pullup); |
| 452 | + |
| 453 | + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R0, &r0); |
| 454 | + if (err) |
| 455 | + goto out; |
| 456 | + |
| 457 | + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R1, &r1); |
| 458 | + if (err) |
| 459 | + goto out; |
| 460 | + |
| 461 | + if ((r1 == 0) && (r0 == 0)) |
| 462 | + *enable = MTK_PUPD_SET_R1R0_00; |
| 463 | + else if ((r1 == 0) && (r0 == 1)) |
| 464 | + *enable = MTK_PUPD_SET_R1R0_01; |
| 465 | + else if ((r1 == 1) && (r0 == 0)) |
| 466 | + *enable = MTK_PUPD_SET_R1R0_10; |
| 467 | + else if ((r1 == 1) && (r0 == 1)) |
| 468 | + *enable = MTK_PUPD_SET_R1R0_11; |
| 469 | + else |
| 470 | + err = -EINVAL; |
| 471 | + |
| 472 | +out: |
| 473 | + return err; |
| 474 | +} |
| 475 | + |
| 476 | +int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw, |
| 477 | + const struct mtk_pin_desc *desc, |
| 478 | + u32 *pullup, u32 *enable) |
| 479 | +{ |
| 480 | + int err = -ENOTSUPP; |
| 481 | + u32 try_all_type; |
| 482 | + |
| 483 | + if (hw->soc->pull_type) |
| 484 | + try_all_type = hw->soc->pull_type[desc->number]; |
| 485 | + else |
| 486 | + try_all_type = MTK_PULL_TYPE_MASK; |
| 487 | + |
| 488 | + if (try_all_type & MTK_PULL_RSEL_TYPE) { |
| 489 | + err = mtk_pinconf_bias_get_rsel(hw, desc, pullup, enable); |
| 490 | + if (!err) |
| 491 | + return err; |
| 492 | + } |
| 493 | + |
| 494 | + if (try_all_type & MTK_PULL_PU_PD_TYPE) { |
| 495 | + err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable); |
| 496 | + if (!err) |
| 497 | + return err; |
| 498 | + } |
| 499 | + |
| 500 | + if (try_all_type & MTK_PULL_PULLSEL_TYPE) { |
| 501 | + err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, |
| 502 | + pullup, enable); |
| 503 | + if (!err) |
| 504 | + return err; |
| 505 | + } |
| 506 | + |
| 507 | + if (try_all_type & MTK_PULL_PUPD_R1R0_TYPE) |
| 508 | + err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable); |
| 509 | + |
| 510 | + return err; |
| 511 | +} |
| 512 | +EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo); |
| 513 | + |
| 514 | /* Revision 0 */ |
| 515 | int mtk_pinconf_drive_set(struct mtk_pinctrl *hw, |
| 516 | const struct mtk_pin_desc *desc, u32 arg) |
| 517 | --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h |
| 518 | +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h |
| 519 | @@ -17,6 +17,34 @@ |
| 520 | #define MTK_ENABLE 1 |
| 521 | #define MTK_PULLDOWN 0 |
| 522 | #define MTK_PULLUP 1 |
| 523 | +#define MTK_PULL_PU_PD_TYPE BIT(0) |
| 524 | +#define MTK_PULL_PULLSEL_TYPE BIT(1) |
| 525 | +#define MTK_PULL_PUPD_R1R0_TYPE BIT(2) |
| 526 | +/* MTK_PULL_RSEL_TYPE can select resistance and can be |
| 527 | + * turned on/off itself. But it can't be selected pull up/down |
| 528 | + */ |
| 529 | +#define MTK_PULL_RSEL_TYPE BIT(3) |
| 530 | +/* MTK_PULL_PU_PD_RSEL_TYPE is a type which is controlled by |
| 531 | + * MTK_PULL_PU_PD_TYPE and MTK_PULL_RSEL_TYPE. |
| 532 | + */ |
| 533 | +#define MTK_PULL_PU_PD_RSEL_TYPE (MTK_PULL_PU_PD_TYPE \ |
| 534 | + | MTK_PULL_RSEL_TYPE) |
| 535 | +#define MTK_PULL_TYPE_MASK (MTK_PULL_PU_PD_TYPE |\ |
| 536 | + MTK_PULL_PULLSEL_TYPE |\ |
| 537 | + MTK_PULL_PUPD_R1R0_TYPE |\ |
| 538 | + MTK_PULL_RSEL_TYPE) |
| 539 | +#define MTK_PUPD_SET_R1R0_00 100 |
| 540 | +#define MTK_PUPD_SET_R1R0_01 101 |
| 541 | +#define MTK_PUPD_SET_R1R0_10 102 |
| 542 | +#define MTK_PUPD_SET_R1R0_11 103 |
| 543 | +#define MTK_PULL_SET_RSEL_000 200 |
| 544 | +#define MTK_PULL_SET_RSEL_001 201 |
| 545 | +#define MTK_PULL_SET_RSEL_010 202 |
| 546 | +#define MTK_PULL_SET_RSEL_011 203 |
| 547 | +#define MTK_PULL_SET_RSEL_100 204 |
| 548 | +#define MTK_PULL_SET_RSEL_101 205 |
| 549 | +#define MTK_PULL_SET_RSEL_110 206 |
| 550 | +#define MTK_PULL_SET_RSEL_111 207 |
| 551 | |
| 552 | #define EINT_NA U16_MAX |
| 553 | #define NO_EINT_SUPPORT EINT_NA |
| 554 | @@ -66,6 +94,8 @@ enum { |
| 555 | PINCTRL_PIN_REG_DRV_EN, |
| 556 | PINCTRL_PIN_REG_DRV_E0, |
| 557 | PINCTRL_PIN_REG_DRV_E1, |
| 558 | + PINCTRL_PIN_REG_DRV_ADV, |
| 559 | + PINCTRL_PIN_REG_RSEL, |
| 560 | PINCTRL_PIN_REG_MAX, |
| 561 | }; |
| 562 | |
| 563 | @@ -101,6 +131,22 @@ struct mtk_pin_field { |
| 564 | u8 next; |
| 565 | }; |
| 566 | |
| 567 | +/** |
| 568 | + * struct mtk_pin_rsel - the structure that provides bias resistance selection. |
| 569 | + * @s_pin: the start pin within the rsel range |
| 570 | + * @e_pin: the end pin within the rsel range |
| 571 | + * @rsel_index: the rsel bias resistance index |
| 572 | + * @up_rsel: the pullup rsel bias resistance value |
| 573 | + * @down_rsel: the pulldown rsel bias resistance value |
| 574 | + */ |
| 575 | +struct mtk_pin_rsel { |
| 576 | + u16 s_pin; |
| 577 | + u16 e_pin; |
| 578 | + u16 rsel_index; |
| 579 | + u32 up_rsel; |
| 580 | + u32 down_rsel; |
| 581 | +}; |
| 582 | + |
| 583 | /* struct mtk_pin_field_calc - the structure that holds the range providing |
| 584 | * the guide used to look up the relevant field |
| 585 | * @s_pin: the start pin within the range |
| 586 | @@ -205,6 +251,9 @@ struct mtk_pin_soc { |
| 587 | bool ies_present; |
| 588 | const char * const *base_names; |
| 589 | unsigned int nbase_names; |
| 590 | + const unsigned int *pull_type; |
| 591 | + const struct mtk_pin_rsel *pin_rsel; |
| 592 | + unsigned int npin_rsel; |
| 593 | |
| 594 | /* Specific pinconfig operations */ |
| 595 | int (*bias_disable_set)(struct mtk_pinctrl *hw, |
| 596 | @@ -215,7 +264,10 @@ struct mtk_pin_soc { |
| 597 | const struct mtk_pin_desc *desc, bool pullup); |
| 598 | int (*bias_get)(struct mtk_pinctrl *hw, |
| 599 | const struct mtk_pin_desc *desc, bool pullup, int *res); |
| 600 | - |
| 601 | + int (*bias_set_combo)(struct mtk_pinctrl *hw, |
| 602 | + const struct mtk_pin_desc *desc, u32 pullup, u32 arg); |
| 603 | + int (*bias_get_combo)(struct mtk_pinctrl *hw, |
| 604 | + const struct mtk_pin_desc *desc, u32 *pullup, u32 *arg); |
| 605 | int (*drive_set)(struct mtk_pinctrl *hw, |
| 606 | const struct mtk_pin_desc *desc, u32 arg); |
| 607 | int (*drive_get)(struct mtk_pinctrl *hw, |
| 608 | @@ -246,6 +298,10 @@ struct mtk_pinctrl { |
| 609 | struct mtk_eint *eint; |
| 610 | struct mtk_pinctrl_group *groups; |
| 611 | const char **grp_names; |
| 612 | + /* lock pin's register resource to avoid multiple threads issue*/ |
| 613 | + spinlock_t lock; |
| 614 | + /* identify rsel setting by si unit or rsel define in dts node */ |
| 615 | + bool rsel_si_unit; |
| 616 | }; |
| 617 | |
| 618 | void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set); |
| 619 | @@ -282,7 +338,12 @@ int mtk_pinconf_drive_set(struct mtk_pin |
| 620 | const struct mtk_pin_desc *desc, u32 arg); |
| 621 | int mtk_pinconf_drive_get(struct mtk_pinctrl *hw, |
| 622 | const struct mtk_pin_desc *desc, int *val); |
| 623 | - |
| 624 | +int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw, |
| 625 | + const struct mtk_pin_desc *desc, |
| 626 | + u32 pullup, u32 enable); |
| 627 | +int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw, |
| 628 | + const struct mtk_pin_desc *desc, |
| 629 | + u32 *pullup, u32 *enable); |
| 630 | int mtk_pinconf_drive_set_rev1(struct mtk_pinctrl *hw, |
| 631 | const struct mtk_pin_desc *desc, u32 arg); |
| 632 | int mtk_pinconf_drive_get_rev1(struct mtk_pinctrl *hw, |