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developer0f312e82022-11-01 12:31:52 +08001// SPDX-License-Identifier: ISC
2/* Copyright (C) 2020 MediaTek Inc. */
3
4#include <linux/firmware.h>
5#include "mt76_connac2_mac.h"
6#include "mt76_connac_mcu.h"
7
8int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option)
9{
10 struct {
11 __le32 option;
12 __le32 addr;
13 } req = {
14 .option = cpu_to_le32(option),
15 .addr = cpu_to_le32(addr),
16 };
17
18 return mt76_mcu_send_msg(dev, MCU_CMD(FW_START_REQ), &req,
19 sizeof(req), true);
20}
21EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_firmware);
22
23int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get)
24{
25 u32 op = get ? PATCH_SEM_GET : PATCH_SEM_RELEASE;
26 struct {
27 __le32 op;
28 } req = {
29 .op = cpu_to_le32(op),
30 };
31
32 return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_SEM_CONTROL),
33 &req, sizeof(req), true);
34}
35EXPORT_SYMBOL_GPL(mt76_connac_mcu_patch_sem_ctrl);
36
37int mt76_connac_mcu_start_patch(struct mt76_dev *dev)
38{
39 struct {
40 u8 check_crc;
41 u8 reserved[3];
42 } req = {
43 .check_crc = 0,
44 };
45
46 return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_FINISH_REQ),
47 &req, sizeof(req), true);
48}
49EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_patch);
50
51#define MCU_PATCH_ADDRESS 0x200000
52
53int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len,
54 u32 mode)
55{
56 struct {
57 __le32 addr;
58 __le32 len;
59 __le32 mode;
60 } req = {
61 .addr = cpu_to_le32(addr),
62 .len = cpu_to_le32(len),
63 .mode = cpu_to_le32(mode),
64 };
65 int cmd;
66
67 if ((!is_connac_v1(dev) && addr == MCU_PATCH_ADDRESS) ||
68 (is_mt7921(dev) && addr == 0x900000) ||
69 (is_mt7996(dev) && addr == 0x900000))
70 cmd = MCU_CMD(PATCH_START_REQ);
71 else
72 cmd = MCU_CMD(TARGET_ADDRESS_LEN_REQ);
73
74 return mt76_mcu_send_msg(dev, cmd, &req, sizeof(req), true);
75}
76EXPORT_SYMBOL_GPL(mt76_connac_mcu_init_download);
77
78int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy)
79{
80 int len, i, n_max_channels, n_2ch = 0, n_5ch = 0, n_6ch = 0;
81 struct mt76_connac_mcu_channel_domain {
82 u8 alpha2[4]; /* regulatory_request.alpha2 */
83 u8 bw_2g; /* BW_20_40M 0
84 * BW_20M 1
85 * BW_20_40_80M 2
86 * BW_20_40_80_160M 3
87 * BW_20_40_80_8080M 4
88 */
89 u8 bw_5g;
90 u8 bw_6g;
91 u8 pad;
92 u8 n_2ch;
93 u8 n_5ch;
94 u8 n_6ch;
95 u8 pad2;
96 } __packed hdr = {
97 .bw_2g = 0,
98 .bw_5g = 3, /* BW_20_40_80_160M */
99 .bw_6g = 3,
100 };
101 struct mt76_connac_mcu_chan {
102 __le16 hw_value;
103 __le16 pad;
104 __le32 flags;
105 } __packed channel;
106 struct mt76_dev *dev = phy->dev;
107 struct ieee80211_channel *chan;
108 struct sk_buff *skb;
109
110 n_max_channels = phy->sband_2g.sband.n_channels +
111 phy->sband_5g.sband.n_channels +
112 phy->sband_6g.sband.n_channels;
113 len = sizeof(hdr) + n_max_channels * sizeof(channel);
114
115 skb = mt76_mcu_msg_alloc(dev, NULL, len);
116 if (!skb)
117 return -ENOMEM;
118
119 skb_reserve(skb, sizeof(hdr));
120
121 for (i = 0; i < phy->sband_2g.sband.n_channels; i++) {
122 chan = &phy->sband_2g.sband.channels[i];
123 if (chan->flags & IEEE80211_CHAN_DISABLED)
124 continue;
125
126 channel.hw_value = cpu_to_le16(chan->hw_value);
127 channel.flags = cpu_to_le32(chan->flags);
128 channel.pad = 0;
129
130 skb_put_data(skb, &channel, sizeof(channel));
131 n_2ch++;
132 }
133 for (i = 0; i < phy->sband_5g.sband.n_channels; i++) {
134 chan = &phy->sband_5g.sband.channels[i];
135 if (chan->flags & IEEE80211_CHAN_DISABLED)
136 continue;
137
138 channel.hw_value = cpu_to_le16(chan->hw_value);
139 channel.flags = cpu_to_le32(chan->flags);
140 channel.pad = 0;
141
142 skb_put_data(skb, &channel, sizeof(channel));
143 n_5ch++;
144 }
145 for (i = 0; i < phy->sband_6g.sband.n_channels; i++) {
146 chan = &phy->sband_6g.sband.channels[i];
147 if (chan->flags & IEEE80211_CHAN_DISABLED)
148 continue;
149
150 channel.hw_value = cpu_to_le16(chan->hw_value);
151 channel.flags = cpu_to_le32(chan->flags);
152 channel.pad = 0;
153
154 skb_put_data(skb, &channel, sizeof(channel));
155 n_6ch++;
156 }
157
158 BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(hdr.alpha2));
159 memcpy(hdr.alpha2, dev->alpha2, sizeof(dev->alpha2));
160 hdr.n_2ch = n_2ch;
161 hdr.n_5ch = n_5ch;
162 hdr.n_6ch = n_6ch;
163
164 memcpy(__skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr));
165
166 return mt76_mcu_skb_send_msg(dev, skb, MCU_CE_CMD(SET_CHAN_DOMAIN),
167 false);
168}
169EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_channel_domain);
170
171int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable,
172 bool hdr_trans)
173{
174 struct {
175 u8 enable;
176 u8 band;
177 u8 rsv[2];
178 } __packed req_mac = {
179 .enable = enable,
180 .band = band,
181 };
182
183 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(MAC_INIT_CTRL), &req_mac,
184 sizeof(req_mac), true);
185}
186EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_mac_enable);
187
188int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif)
189{
190 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
191 struct {
192 u8 bss_idx;
193 u8 ps_state; /* 0: device awake
194 * 1: static power save
195 * 2: dynamic power saving
196 */
197 } req = {
198 .bss_idx = mvif->idx,
199 .ps_state = vif->bss_conf.ps ? 2 : 0,
200 };
201
202 if (vif->type != NL80211_IFTYPE_STATION)
203 return -EOPNOTSUPP;
204
205 return mt76_mcu_send_msg(dev, MCU_CE_CMD(SET_PS_PROFILE),
206 &req, sizeof(req), false);
207}
208EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_vif_ps);
209
210int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band)
211{
212 struct {
213 u8 prot_idx;
214 u8 band;
215 u8 rsv[2];
216 __le32 len_thresh;
217 __le32 pkt_thresh;
218 } __packed req = {
219 .prot_idx = 1,
220 .band = band,
221 .len_thresh = cpu_to_le32(val),
222 .pkt_thresh = cpu_to_le32(0x2),
223 };
224
225 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PROTECT_CTRL), &req,
226 sizeof(req), true);
227}
228EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rts_thresh);
229
230void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac,
231 struct ieee80211_vif *vif)
232{
233 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
234 struct mt76_connac_beacon_loss_event *event = priv;
235
236 if (mvif->idx != event->bss_idx)
237 return;
238
239 if (!(vif->driver_flags & IEEE80211_VIF_BEACON_FILTER))
240 return;
241
242 ieee80211_beacon_loss(vif);
243}
244EXPORT_SYMBOL_GPL(mt76_connac_mcu_beacon_loss_iter);
245
246struct tlv *
247mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, int len,
248 void *sta_ntlv, void *sta_wtbl)
249{
250 struct sta_ntlv_hdr *ntlv_hdr = sta_ntlv;
251 struct tlv *sta_hdr = sta_wtbl;
252 struct tlv *ptlv, tlv = {
253 .tag = cpu_to_le16(tag),
254 .len = cpu_to_le16(len),
255 };
256 u16 ntlv;
257
258 ptlv = skb_put(skb, len);
259 memcpy(ptlv, &tlv, sizeof(tlv));
260
261 ntlv = le16_to_cpu(ntlv_hdr->tlv_num);
262 ntlv_hdr->tlv_num = cpu_to_le16(ntlv + 1);
263
264 if (sta_hdr) {
265 len += le16_to_cpu(sta_hdr->len);
266 sta_hdr->len = cpu_to_le16(len);
267 }
268
269 return ptlv;
270}
271EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_nested_tlv);
272
273struct sk_buff *
274__mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif,
275 struct mt76_wcid *wcid, int len)
276{
277 struct sta_req_hdr hdr = {
278 .bss_idx = mvif->idx,
279 .muar_idx = wcid ? mvif->omac_idx : 0,
280 .is_tlv_append = 1,
281 };
282 struct sk_buff *skb;
283
284 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo,
285 &hdr.wlan_idx_hi);
286 skb = mt76_mcu_msg_alloc(dev, NULL, len);
287 if (!skb)
288 return ERR_PTR(-ENOMEM);
289
290 skb_put_data(skb, &hdr, sizeof(hdr));
291
292 return skb;
293}
294EXPORT_SYMBOL_GPL(__mt76_connac_mcu_alloc_sta_req);
295
296struct wtbl_req_hdr *
297mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid,
298 int cmd, void *sta_wtbl, struct sk_buff **skb)
299{
300 struct tlv *sta_hdr = sta_wtbl;
301 struct wtbl_req_hdr hdr = {
302 .operation = cmd,
303 };
304 struct sk_buff *nskb = *skb;
305
306 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo,
307 &hdr.wlan_idx_hi);
308 if (!nskb) {
309 nskb = mt76_mcu_msg_alloc(dev, NULL,
310 MT76_CONNAC_WTBL_UPDATE_MAX_SIZE);
311 if (!nskb)
312 return ERR_PTR(-ENOMEM);
313
314 *skb = nskb;
315 }
316
317 if (sta_hdr)
318 le16_add_cpu(&sta_hdr->len, sizeof(hdr));
319
320 return skb_put_data(nskb, &hdr, sizeof(hdr));
321}
322EXPORT_SYMBOL_GPL(mt76_connac_mcu_alloc_wtbl_req);
323
324void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb,
325 struct ieee80211_vif *vif)
326{
327 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
328 u8 omac_idx = mvif->omac_idx;
329 struct bss_info_omac *omac;
330 struct tlv *tlv;
331 u32 type = 0;
332
333 switch (vif->type) {
334 case NL80211_IFTYPE_MONITOR:
335 case NL80211_IFTYPE_MESH_POINT:
336 case NL80211_IFTYPE_AP:
337 if (vif->p2p)
338 type = CONNECTION_P2P_GO;
339 else
340 type = CONNECTION_INFRA_AP;
341 break;
342 case NL80211_IFTYPE_STATION:
343 if (vif->p2p)
344 type = CONNECTION_P2P_GC;
345 else
346 type = CONNECTION_INFRA_STA;
347 break;
348 case NL80211_IFTYPE_ADHOC:
349 type = CONNECTION_IBSS_ADHOC;
350 break;
351 default:
352 WARN_ON(1);
353 break;
354 }
355
356 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_OMAC, sizeof(*omac));
357
358 omac = (struct bss_info_omac *)tlv;
359 omac->conn_type = cpu_to_le32(type);
360 omac->omac_idx = mvif->omac_idx;
361 omac->band_idx = mvif->band_idx;
362 omac->hw_bss_idx = omac_idx > EXT_BSSID_START ? HW_BSSID_0 : omac_idx;
363}
364EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_omac_tlv);
365
366void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb,
367 struct ieee80211_vif *vif,
368 struct ieee80211_sta *sta,
369 bool enable, bool newly)
370{
371 struct sta_rec_basic *basic;
372 struct tlv *tlv;
373 int conn_type;
374
375 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BASIC, sizeof(*basic));
376
377 basic = (struct sta_rec_basic *)tlv;
378 basic->extra_info = cpu_to_le16(EXTRA_INFO_VER);
379
380 if (enable) {
381 if (newly)
382 basic->extra_info |= cpu_to_le16(EXTRA_INFO_NEW);
383 basic->conn_state = CONN_STATE_PORT_SECURE;
384 } else {
385 basic->conn_state = CONN_STATE_DISCONNECT;
386 }
387
388 if (!sta) {
389 basic->conn_type = cpu_to_le32(CONNECTION_INFRA_BC);
390 eth_broadcast_addr(basic->peer_addr);
391 return;
392 }
393
394 switch (vif->type) {
395 case NL80211_IFTYPE_MESH_POINT:
396 case NL80211_IFTYPE_AP:
397 if (vif->p2p)
398 conn_type = CONNECTION_P2P_GC;
399 else
400 conn_type = CONNECTION_INFRA_STA;
401 basic->conn_type = cpu_to_le32(conn_type);
402 basic->aid = cpu_to_le16(sta->aid);
403 break;
404 case NL80211_IFTYPE_STATION:
405 if (vif->p2p)
406 conn_type = CONNECTION_P2P_GO;
407 else
408 conn_type = CONNECTION_INFRA_AP;
409 basic->conn_type = cpu_to_le32(conn_type);
410 basic->aid = cpu_to_le16(vif->bss_conf.aid);
411 break;
412 case NL80211_IFTYPE_ADHOC:
413 basic->conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC);
414 basic->aid = cpu_to_le16(sta->aid);
415 break;
416 default:
417 WARN_ON(1);
418 break;
419 }
420
421 memcpy(basic->peer_addr, sta->addr, ETH_ALEN);
422 basic->qos = sta->wme;
423}
424EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_basic_tlv);
425
426void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif,
427 struct ieee80211_sta *sta)
428{
429 struct sta_rec_uapsd *uapsd;
430 struct tlv *tlv;
431
432 if (vif->type != NL80211_IFTYPE_AP || !sta->wme)
433 return;
434
435 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_APPS, sizeof(*uapsd));
436 uapsd = (struct sta_rec_uapsd *)tlv;
437
438 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO) {
439 uapsd->dac_map |= BIT(3);
440 uapsd->tac_map |= BIT(3);
441 }
442 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI) {
443 uapsd->dac_map |= BIT(2);
444 uapsd->tac_map |= BIT(2);
445 }
446 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE) {
447 uapsd->dac_map |= BIT(1);
448 uapsd->tac_map |= BIT(1);
449 }
450 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK) {
451 uapsd->dac_map |= BIT(0);
452 uapsd->tac_map |= BIT(0);
453 }
454 uapsd->max_sp = sta->max_sp;
455}
456EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_uapsd);
457
458void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb,
459 struct ieee80211_vif *vif,
460 struct mt76_wcid *wcid,
461 void *sta_wtbl, void *wtbl_tlv)
462{
463 struct wtbl_hdr_trans *htr;
464 struct tlv *tlv;
465
466 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HDR_TRANS,
467 sizeof(*htr),
468 wtbl_tlv, sta_wtbl);
469 htr = (struct wtbl_hdr_trans *)tlv;
470 htr->no_rx_trans = true;
471
472 if (vif->type == NL80211_IFTYPE_STATION)
473 htr->to_ds = true;
474 else
475 htr->from_ds = true;
476
477 if (!wcid)
478 return;
479
480 htr->no_rx_trans = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags);
481 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) {
482 htr->to_ds = true;
483 htr->from_ds = true;
484 }
485}
486EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_hdr_trans_tlv);
487
488int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev,
489 struct ieee80211_vif *vif,
490 struct mt76_wcid *wcid, int cmd)
491{
492 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
493 struct wtbl_req_hdr *wtbl_hdr;
494 struct tlv *sta_wtbl;
495 struct sk_buff *skb;
496
497 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
498 if (IS_ERR(skb))
499 return PTR_ERR(skb);
500
501 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
502 sizeof(struct tlv));
503
504 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET,
505 sta_wtbl, &skb);
506 if (IS_ERR(wtbl_hdr))
507 return PTR_ERR(wtbl_hdr);
508
509 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, sta_wtbl, wtbl_hdr);
510
511 return mt76_mcu_skb_send_msg(dev, skb, cmd, true);
512}
513EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_update_hdr_trans);
514
515int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev,
516 struct ieee80211_vif *vif,
517 struct ieee80211_sta *sta)
518{
519 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
520 struct wtbl_req_hdr *wtbl_hdr;
521 struct sk_buff *skb = NULL;
522
523 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, NULL,
524 &skb);
525 if (IS_ERR(wtbl_hdr))
526 return PTR_ERR(wtbl_hdr);
527
528 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, NULL, wtbl_hdr);
529
530 return mt76_mcu_skb_send_msg(dev, skb, MCU_EXT_CMD(WTBL_UPDATE), true);
531}
532EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_update_hdr_trans);
533
534void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev,
535 struct sk_buff *skb,
536 struct ieee80211_vif *vif,
537 struct ieee80211_sta *sta,
538 void *sta_wtbl, void *wtbl_tlv)
539{
540 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
541 struct wtbl_generic *generic;
542 struct wtbl_rx *rx;
543 struct wtbl_spe *spe;
544 struct tlv *tlv;
545
546 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_GENERIC,
547 sizeof(*generic),
548 wtbl_tlv, sta_wtbl);
549
550 generic = (struct wtbl_generic *)tlv;
551
552 if (sta) {
553 if (vif->type == NL80211_IFTYPE_STATION)
554 generic->partial_aid = cpu_to_le16(vif->bss_conf.aid);
555 else
556 generic->partial_aid = cpu_to_le16(sta->aid);
557 memcpy(generic->peer_addr, sta->addr, ETH_ALEN);
558 generic->muar_idx = mvif->omac_idx;
559 generic->qos = sta->wme;
560 } else {
561 if (!is_connac_v1(dev) && vif->type == NL80211_IFTYPE_STATION)
562 memcpy(generic->peer_addr, vif->bss_conf.bssid,
563 ETH_ALEN);
564 else
565 eth_broadcast_addr(generic->peer_addr);
566
567 generic->muar_idx = 0xe;
568 }
569
570 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RX, sizeof(*rx),
571 wtbl_tlv, sta_wtbl);
572
573 rx = (struct wtbl_rx *)tlv;
574 rx->rca1 = sta ? vif->type != NL80211_IFTYPE_AP : 1;
575 rx->rca2 = 1;
576 rx->rv = 1;
577
578 if (!is_connac_v1(dev))
579 return;
580
581 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SPE, sizeof(*spe),
582 wtbl_tlv, sta_wtbl);
583 spe = (struct wtbl_spe *)tlv;
584 spe->spe_idx = 24;
585}
586EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_generic_tlv);
587
588static void
589mt76_connac_mcu_sta_amsdu_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,
590 struct ieee80211_vif *vif)
591{
592 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
593 struct sta_rec_amsdu *amsdu;
594 struct tlv *tlv;
595
596 if (vif->type != NL80211_IFTYPE_AP &&
597 vif->type != NL80211_IFTYPE_STATION)
598 return;
599
600 if (!sta->max_amsdu_len)
601 return;
602
603 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));
604 amsdu = (struct sta_rec_amsdu *)tlv;
605 amsdu->max_amsdu_num = 8;
606 amsdu->amsdu_en = true;
607 amsdu->max_mpdu_size = sta->max_amsdu_len >=
608 IEEE80211_MAX_MPDU_LEN_VHT_7991;
609
610 wcid->amsdu = true;
611}
612
613#define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p)
614#define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m)
615static void
616mt76_connac_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
617{
618 struct ieee80211_sta_he_cap *he_cap = &sta->he_cap;
619 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
620 struct sta_rec_he *he;
621 struct tlv *tlv;
622 u32 cap = 0;
623
624 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he));
625
626 he = (struct sta_rec_he *)tlv;
627
628 if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE)
629 cap |= STA_REC_HE_CAP_HTC;
630
631 if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR)
632 cap |= STA_REC_HE_CAP_BSR;
633
634 if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL)
635 cap |= STA_REC_HE_CAP_OM;
636
637 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU)
638 cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU;
639
640 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR)
641 cap |= STA_REC_HE_CAP_BQR;
642
643 if (elem->phy_cap_info[0] &
644 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G |
645 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G))
646 cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT;
647
648 if (elem->phy_cap_info[1] &
649 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD)
650 cap |= STA_REC_HE_CAP_LDPC;
651
652 if (elem->phy_cap_info[1] &
653 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US)
654 cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI;
655
656 if (elem->phy_cap_info[2] &
657 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US)
658 cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI;
659
660 if (elem->phy_cap_info[2] &
661 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ)
662 cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC;
663
664 if (elem->phy_cap_info[2] &
665 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ)
666 cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC;
667
668 if (elem->phy_cap_info[6] &
669 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE)
670 cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE;
671
672 if (elem->phy_cap_info[7] &
673 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI)
674 cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI;
675
676 if (elem->phy_cap_info[7] &
677 IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ)
678 cap |= STA_REC_HE_CAP_GT_80M_TX_STBC;
679
680 if (elem->phy_cap_info[7] &
681 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ)
682 cap |= STA_REC_HE_CAP_GT_80M_RX_STBC;
683
684 if (elem->phy_cap_info[8] &
685 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI)
686 cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI;
687
688 if (elem->phy_cap_info[8] &
689 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI)
690 cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI;
691
692 if (elem->phy_cap_info[9] &
693 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK)
694 cap |= STA_REC_HE_CAP_TRIG_CQI_FK;
695
696 if (elem->phy_cap_info[9] &
697 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU)
698 cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242;
699
700 if (elem->phy_cap_info[9] &
701 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU)
702 cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242;
703
704 he->he_cap = cpu_to_le32(cap);
705
706 switch (sta->bandwidth) {
707 case IEEE80211_STA_RX_BW_160:
708 if (elem->phy_cap_info[0] &
709 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
710 he->max_nss_mcs[CMD_HE_MCS_BW8080] =
711 he_cap->he_mcs_nss_supp.rx_mcs_80p80;
712
713 he->max_nss_mcs[CMD_HE_MCS_BW160] =
714 he_cap->he_mcs_nss_supp.rx_mcs_160;
715 fallthrough;
716 default:
717 he->max_nss_mcs[CMD_HE_MCS_BW80] =
718 he_cap->he_mcs_nss_supp.rx_mcs_80;
719 break;
720 }
721
722 he->t_frame_dur =
723 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
724 he->max_ampdu_exp =
725 HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]);
726
727 he->bw_set =
728 HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]);
729 he->device_class =
730 HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]);
731 he->punc_pream_rx =
732 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
733
734 he->dcm_tx_mode =
735 HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]);
736 he->dcm_tx_max_nss =
737 HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]);
738 he->dcm_rx_mode =
739 HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]);
740 he->dcm_rx_max_nss =
741 HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]);
742 he->dcm_rx_max_nss =
743 HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]);
744
745 he->pkt_ext = 2;
746}
747
748static void
749mt76_connac_mcu_sta_he_tlv_v2(struct sk_buff *skb, struct ieee80211_sta *sta)
750{
751 struct ieee80211_sta_he_cap *he_cap = &sta->he_cap;
752 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
753 struct sta_rec_he_v2 *he;
754 struct tlv *tlv;
755
756 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he));
757
758 he = (struct sta_rec_he_v2 *)tlv;
759 memcpy(he->he_phy_cap, elem->phy_cap_info, sizeof(he->he_phy_cap));
760 memcpy(he->he_mac_cap, elem->mac_cap_info, sizeof(he->he_mac_cap));
761
762 switch (sta->bandwidth) {
763 case IEEE80211_STA_RX_BW_160:
764 if (elem->phy_cap_info[0] &
765 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
766 he->max_nss_mcs[CMD_HE_MCS_BW8080] =
767 he_cap->he_mcs_nss_supp.rx_mcs_80p80;
768
769 he->max_nss_mcs[CMD_HE_MCS_BW160] =
770 he_cap->he_mcs_nss_supp.rx_mcs_160;
771 fallthrough;
772 default:
773 he->max_nss_mcs[CMD_HE_MCS_BW80] =
774 he_cap->he_mcs_nss_supp.rx_mcs_80;
775 break;
776 }
777
778 he->pkt_ext = IEEE80211_HE_PHY_CAP9_NOMIMAL_PKT_PADDING_16US;
779}
780
781static u8
782mt76_connac_get_phy_mode_v2(struct mt76_phy *mphy, struct ieee80211_vif *vif,
783 enum nl80211_band band, struct ieee80211_sta *sta)
784{
785 struct ieee80211_sta_ht_cap *ht_cap;
786 struct ieee80211_sta_vht_cap *vht_cap;
787 const struct ieee80211_sta_he_cap *he_cap;
788 u8 mode = 0;
789
790 if (sta) {
791 ht_cap = &sta->ht_cap;
792 vht_cap = &sta->vht_cap;
793 he_cap = &sta->he_cap;
794 } else {
795 struct ieee80211_supported_band *sband;
796
797 sband = mphy->hw->wiphy->bands[band];
798 ht_cap = &sband->ht_cap;
799 vht_cap = &sband->vht_cap;
800 he_cap = ieee80211_get_he_iftype_cap(sband, vif->type);
801 }
802
803 if (band == NL80211_BAND_2GHZ) {
804 mode |= PHY_TYPE_BIT_HR_DSSS | PHY_TYPE_BIT_ERP;
805
806 if (ht_cap->ht_supported)
807 mode |= PHY_TYPE_BIT_HT;
808
809 if (he_cap && he_cap->has_he)
810 mode |= PHY_TYPE_BIT_HE;
811 } else if (band == NL80211_BAND_5GHZ || band == NL80211_BAND_6GHZ) {
812 mode |= PHY_TYPE_BIT_OFDM;
813
814 if (ht_cap->ht_supported)
815 mode |= PHY_TYPE_BIT_HT;
816
817 if (vht_cap->vht_supported)
818 mode |= PHY_TYPE_BIT_VHT;
819
820 if (he_cap && he_cap->has_he)
821 mode |= PHY_TYPE_BIT_HE;
822 }
823
824 return mode;
825}
826
827void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb,
828 struct ieee80211_sta *sta,
829 struct ieee80211_vif *vif,
830 u8 rcpi, u8 sta_state)
831{
832 struct cfg80211_chan_def *chandef = &mphy->chandef;
833 enum nl80211_band band = chandef->chan->band;
834 struct mt76_dev *dev = mphy->dev;
835 struct sta_rec_ra_info *ra_info;
836 struct sta_rec_state *state;
837 struct sta_rec_phy *phy;
838 struct tlv *tlv;
839 u16 supp_rates;
840
841 /* starec ht */
842 if (sta->ht_cap.ht_supported) {
843 struct sta_rec_ht *ht;
844
845 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));
846 ht = (struct sta_rec_ht *)tlv;
847 ht->ht_cap = cpu_to_le16(sta->ht_cap.cap);
848 }
849
850 /* starec vht */
851 if (sta->vht_cap.vht_supported) {
852 struct sta_rec_vht *vht;
853 int len;
854
855 len = is_mt7921(dev) ? sizeof(*vht) : sizeof(*vht) - 4;
856 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, len);
857 vht = (struct sta_rec_vht *)tlv;
858 vht->vht_cap = cpu_to_le32(sta->vht_cap.cap);
859 vht->vht_rx_mcs_map = sta->vht_cap.vht_mcs.rx_mcs_map;
860 vht->vht_tx_mcs_map = sta->vht_cap.vht_mcs.tx_mcs_map;
861 }
862
863 /* starec uapsd */
864 mt76_connac_mcu_sta_uapsd(skb, vif, sta);
865
866 if (!is_mt7921(dev))
867 return;
868
869 if (sta->ht_cap.ht_supported || sta->he_cap.has_he)
870 mt76_connac_mcu_sta_amsdu_tlv(skb, sta, vif);
871
872 /* starec he */
873 if (sta->he_cap.has_he) {
874 mt76_connac_mcu_sta_he_tlv(skb, sta);
875 mt76_connac_mcu_sta_he_tlv_v2(skb, sta);
876 if (band == NL80211_BAND_6GHZ &&
877 sta_state == MT76_STA_INFO_STATE_ASSOC) {
878 struct sta_rec_he_6g_capa *he_6g_capa;
879
880 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G,
881 sizeof(*he_6g_capa));
882 he_6g_capa = (struct sta_rec_he_6g_capa *)tlv;
883 he_6g_capa->capa = sta->he_6ghz_capa.capa;
884 }
885 }
886
887 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy));
888 phy = (struct sta_rec_phy *)tlv;
889 phy->phy_type = mt76_connac_get_phy_mode_v2(mphy, vif, band, sta);
890 phy->basic_rate = cpu_to_le16((u16)vif->bss_conf.basic_rates);
891 phy->rcpi = rcpi;
892 phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR,
893 sta->ht_cap.ampdu_factor) |
894 FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY,
895 sta->ht_cap.ampdu_density);
896
897 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra_info));
898 ra_info = (struct sta_rec_ra_info *)tlv;
899
900 supp_rates = sta->supp_rates[band];
901 if (band == NL80211_BAND_2GHZ)
902 supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates >> 4) |
903 FIELD_PREP(RA_LEGACY_CCK, supp_rates & 0xf);
904 else
905 supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates);
906
907 ra_info->legacy = cpu_to_le16(supp_rates);
908
909 if (sta->ht_cap.ht_supported)
910 memcpy(ra_info->rx_mcs_bitmask, sta->ht_cap.mcs.rx_mask,
911 HT_MCS_MASK_NUM);
912
913 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_STATE, sizeof(*state));
914 state = (struct sta_rec_state *)tlv;
915 state->state = sta_state;
916
917 if (sta->vht_cap.vht_supported) {
918 state->vht_opmode = sta->bandwidth;
919 state->vht_opmode |= (sta->rx_nss - 1) <<
920 IEEE80211_OPMODE_NOTIF_RX_NSS_SHIFT;
921 }
922}
923EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_tlv);
924
925void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb,
926 struct ieee80211_sta *sta,
927 void *sta_wtbl, void *wtbl_tlv)
928{
929 struct wtbl_smps *smps;
930 struct tlv *tlv;
931
932 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SMPS, sizeof(*smps),
933 wtbl_tlv, sta_wtbl);
934 smps = (struct wtbl_smps *)tlv;
935 smps->smps = (sta->smps_mode == IEEE80211_SMPS_DYNAMIC);
936}
937EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_smps_tlv);
938
939void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb,
940 struct ieee80211_sta *sta, void *sta_wtbl,
941 void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc)
942{
943 struct wtbl_ht *ht = NULL;
944 struct tlv *tlv;
945 u32 flags = 0;
946
947 if (sta->ht_cap.ht_supported || sta->he_6ghz_capa.capa) {
948 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HT, sizeof(*ht),
949 wtbl_tlv, sta_wtbl);
950 ht = (struct wtbl_ht *)tlv;
951 ht->ldpc = ht_ldpc &&
952 !!(sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING);
953
954 if (sta->ht_cap.ht_supported) {
955 ht->af = sta->ht_cap.ampdu_factor;
956 ht->mm = sta->ht_cap.ampdu_density;
957 } else {
958 ht->af = le16_get_bits(sta->he_6ghz_capa.capa,
959 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
960 ht->mm = le16_get_bits(sta->he_6ghz_capa.capa,
961 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START);
962 }
963
964 ht->ht = true;
965 }
966
967 if (sta->vht_cap.vht_supported || sta->he_6ghz_capa.capa) {
968 struct wtbl_vht *vht;
969 u8 af;
970
971 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_VHT,
972 sizeof(*vht), wtbl_tlv,
973 sta_wtbl);
974 vht = (struct wtbl_vht *)tlv;
975 vht->ldpc = vht_ldpc &&
976 !!(sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC);
977 vht->vht = true;
978
979 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
980 sta->vht_cap.cap);
981 if (ht)
982 ht->af = max(ht->af, af);
983 }
984
985 mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_tlv);
986
987 if (is_connac_v1(dev) && sta->ht_cap.ht_supported) {
988 /* sgi */
989 u32 msk = MT_WTBL_W5_SHORT_GI_20 | MT_WTBL_W5_SHORT_GI_40 |
990 MT_WTBL_W5_SHORT_GI_80 | MT_WTBL_W5_SHORT_GI_160;
991 struct wtbl_raw *raw;
992
993 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RAW_DATA,
994 sizeof(*raw), wtbl_tlv,
995 sta_wtbl);
996
997 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
998 flags |= MT_WTBL_W5_SHORT_GI_20;
999 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
1000 flags |= MT_WTBL_W5_SHORT_GI_40;
1001
1002 if (sta->vht_cap.vht_supported) {
1003 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
1004 flags |= MT_WTBL_W5_SHORT_GI_80;
1005 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)
1006 flags |= MT_WTBL_W5_SHORT_GI_160;
1007 }
1008 raw = (struct wtbl_raw *)tlv;
1009 raw->val = cpu_to_le32(flags);
1010 raw->msk = cpu_to_le32(~msk);
1011 raw->wtbl_idx = 1;
1012 raw->dw = 5;
1013 }
1014}
1015EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ht_tlv);
1016
1017int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy,
1018 struct mt76_sta_cmd_info *info)
1019{
1020 struct mt76_vif *mvif = (struct mt76_vif *)info->vif->drv_priv;
1021 struct mt76_dev *dev = phy->dev;
1022 struct wtbl_req_hdr *wtbl_hdr;
1023 struct tlv *sta_wtbl;
1024 struct sk_buff *skb;
1025
1026 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, info->wcid);
1027 if (IS_ERR(skb))
1028 return PTR_ERR(skb);
1029
1030 if (info->sta || !info->offload_fw)
1031 mt76_connac_mcu_sta_basic_tlv(skb, info->vif, info->sta,
1032 info->enable, info->newly);
1033 if (info->sta && info->enable)
1034 mt76_connac_mcu_sta_tlv(phy, skb, info->sta,
1035 info->vif, info->rcpi,
1036 info->state);
1037
1038 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1039 sizeof(struct tlv));
1040
1041 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, info->wcid,
1042 WTBL_RESET_AND_SET,
1043 sta_wtbl, &skb);
1044 if (IS_ERR(wtbl_hdr))
1045 return PTR_ERR(wtbl_hdr);
1046
1047 if (info->enable) {
1048 mt76_connac_mcu_wtbl_generic_tlv(dev, skb, info->vif,
1049 info->sta, sta_wtbl,
1050 wtbl_hdr);
1051 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, info->vif, info->wcid,
1052 sta_wtbl, wtbl_hdr);
1053 if (info->sta)
1054 mt76_connac_mcu_wtbl_ht_tlv(dev, skb, info->sta,
1055 sta_wtbl, wtbl_hdr,
1056 true, true);
1057 }
1058
1059 return mt76_mcu_skb_send_msg(dev, skb, info->cmd, true);
1060}
1061EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_cmd);
1062
1063void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb,
1064 struct ieee80211_ampdu_params *params,
1065 bool enable, bool tx, void *sta_wtbl,
1066 void *wtbl_tlv)
1067{
1068 struct wtbl_ba *ba;
1069 struct tlv *tlv;
1070
1071 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_BA, sizeof(*ba),
1072 wtbl_tlv, sta_wtbl);
1073
1074 ba = (struct wtbl_ba *)tlv;
1075 ba->tid = params->tid;
1076
1077 if (tx) {
1078 ba->ba_type = MT_BA_TYPE_ORIGINATOR;
1079 ba->sn = enable ? cpu_to_le16(params->ssn) : 0;
1080 ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0;
1081 ba->ba_en = enable;
1082 } else {
1083 memcpy(ba->peer_addr, params->sta->addr, ETH_ALEN);
1084 ba->ba_type = MT_BA_TYPE_RECIPIENT;
1085 ba->rst_ba_tid = params->tid;
1086 ba->rst_ba_sel = RST_BA_MAC_TID_MATCH;
1087 ba->rst_ba_sb = 1;
1088 }
1089
1090 if (!is_connac_v1(dev)) {
1091 ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0;
1092 return;
1093 }
1094
1095 if (enable && tx) {
1096 static const u8 ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 };
1097 int i;
1098
1099 for (i = 7; i > 0; i--) {
1100 if (params->buf_size >= ba_range[i])
1101 break;
1102 }
1103 ba->ba_winsize_idx = i;
1104 }
1105}
1106EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ba_tlv);
1107
1108int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy,
1109 struct ieee80211_vif *vif,
1110 struct mt76_wcid *wcid,
1111 bool enable)
1112{
1113 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1114 struct mt76_dev *dev = phy->dev;
1115 struct {
1116 struct {
1117 u8 omac_idx;
1118 u8 band_idx;
1119 __le16 pad;
1120 } __packed hdr;
1121 struct req_tlv {
1122 __le16 tag;
1123 __le16 len;
1124 u8 active;
1125 u8 pad;
1126 u8 omac_addr[ETH_ALEN];
1127 } __packed tlv;
1128 } dev_req = {
1129 .hdr = {
1130 .omac_idx = mvif->omac_idx,
1131 .band_idx = mvif->band_idx,
1132 },
1133 .tlv = {
1134 .tag = cpu_to_le16(DEV_INFO_ACTIVE),
1135 .len = cpu_to_le16(sizeof(struct req_tlv)),
1136 .active = enable,
1137 },
1138 };
1139 struct {
1140 struct {
1141 u8 bss_idx;
1142 u8 pad[3];
1143 } __packed hdr;
1144 struct mt76_connac_bss_basic_tlv basic;
1145 } basic_req = {
1146 .hdr = {
1147 .bss_idx = mvif->idx,
1148 },
1149 .basic = {
1150 .tag = cpu_to_le16(UNI_BSS_INFO_BASIC),
1151 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)),
1152 .omac_idx = mvif->omac_idx,
1153 .band_idx = mvif->band_idx,
1154 .wmm_idx = mvif->wmm_idx,
1155 .active = enable,
1156 .bmc_tx_wlan_idx = cpu_to_le16(wcid->idx),
1157 .sta_idx = cpu_to_le16(wcid->idx),
1158 .conn_state = 1,
1159 },
1160 };
1161 int err, idx, cmd, len;
1162 void *data;
1163
1164 switch (vif->type) {
1165 case NL80211_IFTYPE_MESH_POINT:
1166 case NL80211_IFTYPE_MONITOR:
1167 case NL80211_IFTYPE_AP:
1168 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_AP);
1169 break;
1170 case NL80211_IFTYPE_STATION:
1171 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_STA);
1172 break;
1173 case NL80211_IFTYPE_ADHOC:
1174 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC);
1175 break;
1176 default:
1177 WARN_ON(1);
1178 break;
1179 }
1180
1181 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx;
1182 basic_req.basic.hw_bss_idx = idx;
1183
1184 memcpy(dev_req.tlv.omac_addr, vif->addr, ETH_ALEN);
1185
1186 cmd = enable ? MCU_UNI_CMD(DEV_INFO_UPDATE) : MCU_UNI_CMD(BSS_INFO_UPDATE);
1187 data = enable ? (void *)&dev_req : (void *)&basic_req;
1188 len = enable ? sizeof(dev_req) : sizeof(basic_req);
1189
1190 err = mt76_mcu_send_msg(dev, cmd, data, len, true);
1191 if (err < 0)
1192 return err;
1193
1194 cmd = enable ? MCU_UNI_CMD(BSS_INFO_UPDATE) : MCU_UNI_CMD(DEV_INFO_UPDATE);
1195 data = enable ? (void *)&basic_req : (void *)&dev_req;
1196 len = enable ? sizeof(basic_req) : sizeof(dev_req);
1197
1198 return mt76_mcu_send_msg(dev, cmd, data, len, true);
1199}
1200EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_dev);
1201
1202void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb,
1203 struct ieee80211_ampdu_params *params,
1204 bool enable, bool tx)
1205{
1206 struct sta_rec_ba *ba;
1207 struct tlv *tlv;
1208
1209 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba));
1210
1211 ba = (struct sta_rec_ba *)tlv;
1212 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT;
1213 ba->winsize = cpu_to_le16(params->buf_size);
1214 ba->ssn = cpu_to_le16(params->ssn);
1215 ba->ba_en = enable << params->tid;
1216 ba->amsdu = params->amsdu;
1217 ba->tid = params->tid;
1218}
1219EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba_tlv);
1220
1221int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif,
1222 struct ieee80211_ampdu_params *params,
1223 int cmd, bool enable, bool tx)
1224{
1225 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv;
1226 struct wtbl_req_hdr *wtbl_hdr;
1227 struct tlv *sta_wtbl;
1228 struct sk_buff *skb;
1229 int ret;
1230
1231 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
1232 if (IS_ERR(skb))
1233 return PTR_ERR(skb);
1234
1235 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1236 sizeof(struct tlv));
1237
1238 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET,
1239 sta_wtbl, &skb);
1240 if (IS_ERR(wtbl_hdr))
1241 return PTR_ERR(wtbl_hdr);
1242
1243 mt76_connac_mcu_wtbl_ba_tlv(dev, skb, params, enable, tx, sta_wtbl,
1244 wtbl_hdr);
1245
1246 ret = mt76_mcu_skb_send_msg(dev, skb, cmd, true);
1247 if (ret)
1248 return ret;
1249
1250 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
1251 if (IS_ERR(skb))
1252 return PTR_ERR(skb);
1253
1254 mt76_connac_mcu_sta_ba_tlv(skb, params, enable, tx);
1255
1256 return mt76_mcu_skb_send_msg(dev, skb, cmd, true);
1257}
1258EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba);
1259
1260u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif,
1261 enum nl80211_band band, struct ieee80211_sta *sta)
1262{
1263 struct mt76_dev *dev = phy->dev;
1264 const struct ieee80211_sta_he_cap *he_cap;
1265 struct ieee80211_sta_vht_cap *vht_cap;
1266 struct ieee80211_sta_ht_cap *ht_cap;
1267 u8 mode = 0;
1268
1269 if (is_connac_v1(dev))
1270 return 0x38;
1271
1272 if (sta) {
1273 ht_cap = &sta->ht_cap;
1274 vht_cap = &sta->vht_cap;
1275 he_cap = &sta->he_cap;
1276 } else {
1277 struct ieee80211_supported_band *sband;
1278
1279 sband = phy->hw->wiphy->bands[band];
1280 ht_cap = &sband->ht_cap;
1281 vht_cap = &sband->vht_cap;
1282 he_cap = ieee80211_get_he_iftype_cap(sband, vif->type);
1283 }
1284
1285 if (band == NL80211_BAND_2GHZ) {
1286 mode |= PHY_MODE_B | PHY_MODE_G;
1287
1288 if (ht_cap->ht_supported)
1289 mode |= PHY_MODE_GN;
1290
1291 if (he_cap && he_cap->has_he)
1292 mode |= PHY_MODE_AX_24G;
1293 } else if (band == NL80211_BAND_5GHZ) {
1294 mode |= PHY_MODE_A;
1295
1296 if (ht_cap->ht_supported)
1297 mode |= PHY_MODE_AN;
1298
1299 if (vht_cap->vht_supported)
1300 mode |= PHY_MODE_AC;
1301
1302 if (he_cap && he_cap->has_he)
1303 mode |= PHY_MODE_AX_5G;
1304 } else if (band == NL80211_BAND_6GHZ) {
1305 mode |= PHY_MODE_A | PHY_MODE_AN |
1306 PHY_MODE_AC | PHY_MODE_AX_5G;
1307 }
1308
1309 return mode;
1310}
1311EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode);
1312
1313const struct ieee80211_sta_he_cap *
1314mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif)
1315{
1316 enum nl80211_band band = phy->chandef.chan->band;
1317 struct ieee80211_supported_band *sband;
1318
1319 sband = phy->hw->wiphy->bands[band];
1320
1321 return ieee80211_get_he_iftype_cap(sband, vif->type);
1322}
1323EXPORT_SYMBOL_GPL(mt76_connac_get_he_phy_cap);
1324
1325#define DEFAULT_HE_PE_DURATION 4
1326#define DEFAULT_HE_DURATION_RTS_THRES 1023
1327static void
1328mt76_connac_mcu_uni_bss_he_tlv(struct mt76_phy *phy, struct ieee80211_vif *vif,
1329 struct tlv *tlv)
1330{
1331 const struct ieee80211_sta_he_cap *cap;
1332 struct bss_info_uni_he *he;
1333
1334 cap = mt76_connac_get_he_phy_cap(phy, vif);
1335
1336 he = (struct bss_info_uni_he *)tlv;
1337 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext;
1338 if (!he->he_pe_duration)
1339 he->he_pe_duration = DEFAULT_HE_PE_DURATION;
1340
1341 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);
1342 if (!he->he_rts_thres)
1343 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
1344
1345 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;
1346 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;
1347 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;
1348}
1349
1350int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy,
1351 struct ieee80211_vif *vif,
1352 struct mt76_wcid *wcid,
1353 bool enable)
1354{
1355 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1356 struct cfg80211_chan_def *chandef = &phy->chandef;
1357 int freq1 = chandef->center_freq1, freq2 = chandef->center_freq2;
1358 enum nl80211_band band = chandef->chan->band;
1359 struct mt76_dev *mdev = phy->dev;
1360 struct {
1361 struct {
1362 u8 bss_idx;
1363 u8 pad[3];
1364 } __packed hdr;
1365 struct mt76_connac_bss_basic_tlv basic;
1366 struct mt76_connac_bss_qos_tlv qos;
1367 } basic_req = {
1368 .hdr = {
1369 .bss_idx = mvif->idx,
1370 },
1371 .basic = {
1372 .tag = cpu_to_le16(UNI_BSS_INFO_BASIC),
1373 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)),
1374 .bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int),
1375 .dtim_period = vif->bss_conf.dtim_period,
1376 .omac_idx = mvif->omac_idx,
1377 .band_idx = mvif->band_idx,
1378 .wmm_idx = mvif->wmm_idx,
1379 .active = true, /* keep bss deactivated */
1380 .phymode = mt76_connac_get_phy_mode(phy, vif, band, NULL),
1381 },
1382 .qos = {
1383 .tag = cpu_to_le16(UNI_BSS_INFO_QBSS),
1384 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_qos_tlv)),
1385 .qos = vif->bss_conf.qos,
1386 },
1387 };
1388 struct {
1389 struct {
1390 u8 bss_idx;
1391 u8 pad[3];
1392 } __packed hdr;
1393 struct rlm_tlv {
1394 __le16 tag;
1395 __le16 len;
1396 u8 control_channel;
1397 u8 center_chan;
1398 u8 center_chan2;
1399 u8 bw;
1400 u8 tx_streams;
1401 u8 rx_streams;
1402 u8 short_st;
1403 u8 ht_op_info;
1404 u8 sco;
1405 u8 band;
1406 u8 pad[2];
1407 } __packed rlm;
1408 } __packed rlm_req = {
1409 .hdr = {
1410 .bss_idx = mvif->idx,
1411 },
1412 .rlm = {
1413 .tag = cpu_to_le16(UNI_BSS_INFO_RLM),
1414 .len = cpu_to_le16(sizeof(struct rlm_tlv)),
1415 .control_channel = chandef->chan->hw_value,
1416 .center_chan = ieee80211_frequency_to_channel(freq1),
1417 .center_chan2 = ieee80211_frequency_to_channel(freq2),
1418 .tx_streams = hweight8(phy->antenna_mask),
1419 .ht_op_info = 4, /* set HT 40M allowed */
1420 .rx_streams = phy->chainmask,
1421 .short_st = true,
1422 .band = band,
1423 },
1424 };
1425 int err, conn_type;
1426 u8 idx, basic_phy;
1427
1428 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx;
1429 basic_req.basic.hw_bss_idx = idx;
1430 if (band == NL80211_BAND_6GHZ)
1431 basic_req.basic.phymode_ext = PHY_MODE_AX_6G;
1432
1433 basic_phy = mt76_connac_get_phy_mode_v2(phy, vif, band, NULL);
1434 basic_req.basic.nonht_basic_phy = cpu_to_le16(basic_phy);
1435
1436 switch (vif->type) {
1437 case NL80211_IFTYPE_MESH_POINT:
1438 case NL80211_IFTYPE_AP:
1439 if (vif->p2p)
1440 conn_type = CONNECTION_P2P_GO;
1441 else
1442 conn_type = CONNECTION_INFRA_AP;
1443 basic_req.basic.conn_type = cpu_to_le32(conn_type);
1444 /* Fully active/deactivate BSS network in AP mode only */
1445 basic_req.basic.active = enable;
1446 break;
1447 case NL80211_IFTYPE_STATION:
1448 if (vif->p2p)
1449 conn_type = CONNECTION_P2P_GC;
1450 else
1451 conn_type = CONNECTION_INFRA_STA;
1452 basic_req.basic.conn_type = cpu_to_le32(conn_type);
1453 break;
1454 case NL80211_IFTYPE_ADHOC:
1455 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC);
1456 break;
1457 default:
1458 WARN_ON(1);
1459 break;
1460 }
1461
1462 memcpy(basic_req.basic.bssid, vif->bss_conf.bssid, ETH_ALEN);
1463 basic_req.basic.bmc_tx_wlan_idx = cpu_to_le16(wcid->idx);
1464 basic_req.basic.sta_idx = cpu_to_le16(wcid->idx);
1465 basic_req.basic.conn_state = !enable;
1466
1467 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &basic_req,
1468 sizeof(basic_req), true);
1469 if (err < 0)
1470 return err;
1471
1472 if (vif->bss_conf.he_support) {
1473 struct {
1474 struct {
1475 u8 bss_idx;
1476 u8 pad[3];
1477 } __packed hdr;
1478 struct bss_info_uni_he he;
1479 struct bss_info_uni_bss_color bss_color;
1480 } he_req = {
1481 .hdr = {
1482 .bss_idx = mvif->idx,
1483 },
1484 .he = {
1485 .tag = cpu_to_le16(UNI_BSS_INFO_HE_BASIC),
1486 .len = cpu_to_le16(sizeof(struct bss_info_uni_he)),
1487 },
1488 .bss_color = {
1489 .tag = cpu_to_le16(UNI_BSS_INFO_BSS_COLOR),
1490 .len = cpu_to_le16(sizeof(struct bss_info_uni_bss_color)),
1491 .enable = 0,
1492 .bss_color = 0,
1493 },
1494 };
1495
1496 if (enable) {
1497 he_req.bss_color.enable =
1498 vif->bss_conf.he_bss_color.enabled;
1499 he_req.bss_color.bss_color =
1500 vif->bss_conf.he_bss_color.color;
1501 }
1502
1503 mt76_connac_mcu_uni_bss_he_tlv(phy, vif,
1504 (struct tlv *)&he_req.he);
1505 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE),
1506 &he_req, sizeof(he_req), true);
1507 if (err < 0)
1508 return err;
1509 }
1510
1511 switch (chandef->width) {
1512 case NL80211_CHAN_WIDTH_40:
1513 rlm_req.rlm.bw = CMD_CBW_40MHZ;
1514 break;
1515 case NL80211_CHAN_WIDTH_80:
1516 rlm_req.rlm.bw = CMD_CBW_80MHZ;
1517 break;
1518 case NL80211_CHAN_WIDTH_80P80:
1519 rlm_req.rlm.bw = CMD_CBW_8080MHZ;
1520 break;
1521 case NL80211_CHAN_WIDTH_160:
1522 rlm_req.rlm.bw = CMD_CBW_160MHZ;
1523 break;
1524 case NL80211_CHAN_WIDTH_5:
1525 rlm_req.rlm.bw = CMD_CBW_5MHZ;
1526 break;
1527 case NL80211_CHAN_WIDTH_10:
1528 rlm_req.rlm.bw = CMD_CBW_10MHZ;
1529 break;
1530 case NL80211_CHAN_WIDTH_20_NOHT:
1531 case NL80211_CHAN_WIDTH_20:
1532 default:
1533 rlm_req.rlm.bw = CMD_CBW_20MHZ;
1534 rlm_req.rlm.ht_op_info = 0;
1535 break;
1536 }
1537
1538 if (rlm_req.rlm.control_channel < rlm_req.rlm.center_chan)
1539 rlm_req.rlm.sco = 1; /* SCA */
1540 else if (rlm_req.rlm.control_channel > rlm_req.rlm.center_chan)
1541 rlm_req.rlm.sco = 3; /* SCB */
1542
1543 return mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &rlm_req,
1544 sizeof(rlm_req), true);
1545}
1546EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_bss);
1547
1548#define MT76_CONNAC_SCAN_CHANNEL_TIME 60
1549int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif,
1550 struct ieee80211_scan_request *scan_req)
1551{
1552 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1553 struct cfg80211_scan_request *sreq = &scan_req->req;
1554 int n_ssids = 0, err, i, duration;
1555 int ext_channels_num = max_t(int, sreq->n_channels - 32, 0);
1556 struct ieee80211_channel **scan_list = sreq->channels;
1557 struct mt76_dev *mdev = phy->dev;
1558 struct mt76_connac_mcu_scan_channel *chan;
1559 struct mt76_connac_hw_scan_req *req;
1560 struct sk_buff *skb;
1561
1562 skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req));
1563 if (!skb)
1564 return -ENOMEM;
1565
1566 set_bit(MT76_HW_SCANNING, &phy->state);
1567 mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f;
1568
1569 req = (struct mt76_connac_hw_scan_req *)skb_put(skb, sizeof(*req));
1570
1571 req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7;
1572 req->bss_idx = mvif->idx;
1573 req->scan_type = sreq->n_ssids ? 1 : 0;
1574 req->probe_req_num = sreq->n_ssids ? 2 : 0;
1575 req->version = 1;
1576
1577 for (i = 0; i < sreq->n_ssids; i++) {
1578 if (!sreq->ssids[i].ssid_len)
1579 continue;
1580
1581 req->ssids[i].ssid_len = cpu_to_le32(sreq->ssids[i].ssid_len);
1582 memcpy(req->ssids[i].ssid, sreq->ssids[i].ssid,
1583 sreq->ssids[i].ssid_len);
1584 n_ssids++;
1585 }
1586 req->ssid_type = n_ssids ? BIT(2) : BIT(0);
1587 req->ssid_type_ext = n_ssids ? BIT(0) : 0;
1588 req->ssids_num = n_ssids;
1589
1590 duration = is_mt7921(phy->dev) ? 0 : MT76_CONNAC_SCAN_CHANNEL_TIME;
1591 /* increase channel time for passive scan */
1592 if (!sreq->n_ssids)
1593 duration *= 2;
1594 req->timeout_value = cpu_to_le16(sreq->n_channels * duration);
1595 req->channel_min_dwell_time = cpu_to_le16(duration);
1596 req->channel_dwell_time = cpu_to_le16(duration);
1597
1598 req->channels_num = min_t(u8, sreq->n_channels, 32);
1599 req->ext_channels_num = min_t(u8, ext_channels_num, 32);
1600 for (i = 0; i < req->channels_num + req->ext_channels_num; i++) {
1601 if (i >= 32)
1602 chan = &req->ext_channels[i - 32];
1603 else
1604 chan = &req->channels[i];
1605
1606 switch (scan_list[i]->band) {
1607 case NL80211_BAND_2GHZ:
1608 chan->band = 1;
1609 break;
1610 case NL80211_BAND_6GHZ:
1611 chan->band = 3;
1612 break;
1613 default:
1614 chan->band = 2;
1615 break;
1616 }
1617 chan->channel_num = scan_list[i]->hw_value;
1618 }
1619 req->channel_type = sreq->n_channels ? 4 : 0;
1620
1621 if (sreq->ie_len > 0) {
1622 memcpy(req->ies, sreq->ie, sreq->ie_len);
1623 req->ies_len = cpu_to_le16(sreq->ie_len);
1624 }
1625
1626 if (is_mt7921(phy->dev))
1627 req->scan_func |= SCAN_FUNC_SPLIT_SCAN;
1628
1629 memcpy(req->bssid, sreq->bssid, ETH_ALEN);
1630 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
1631 get_random_mask_addr(req->random_mac, sreq->mac_addr,
1632 sreq->mac_addr_mask);
1633 req->scan_func |= SCAN_FUNC_RANDOM_MAC;
1634 }
1635
1636 err = mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(START_HW_SCAN),
1637 false);
1638 if (err < 0)
1639 clear_bit(MT76_HW_SCANNING, &phy->state);
1640
1641 return err;
1642}
1643EXPORT_SYMBOL_GPL(mt76_connac_mcu_hw_scan);
1644
1645int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy,
1646 struct ieee80211_vif *vif)
1647{
1648 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1649 struct {
1650 u8 seq_num;
1651 u8 is_ext_channel;
1652 u8 rsv[2];
1653 } __packed req = {
1654 .seq_num = mvif->scan_seq_num,
1655 };
1656
1657 if (test_and_clear_bit(MT76_HW_SCANNING, &phy->state)) {
1658 struct cfg80211_scan_info info = {
1659 .aborted = true,
1660 };
1661
1662 ieee80211_scan_completed(phy->hw, &info);
1663 }
1664
1665 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(CANCEL_HW_SCAN),
1666 &req, sizeof(req), false);
1667}
1668EXPORT_SYMBOL_GPL(mt76_connac_mcu_cancel_hw_scan);
1669
1670int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy,
1671 struct ieee80211_vif *vif,
1672 struct cfg80211_sched_scan_request *sreq)
1673{
1674 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1675 struct ieee80211_channel **scan_list = sreq->channels;
1676 struct mt76_connac_mcu_scan_channel *chan;
1677 struct mt76_connac_sched_scan_req *req;
1678 struct mt76_dev *mdev = phy->dev;
1679 struct cfg80211_match_set *match;
1680 struct cfg80211_ssid *ssid;
1681 struct sk_buff *skb;
1682 int i;
1683
1684 skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req) + sreq->ie_len);
1685 if (!skb)
1686 return -ENOMEM;
1687
1688 mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f;
1689
1690 req = (struct mt76_connac_sched_scan_req *)skb_put(skb, sizeof(*req));
1691 req->version = 1;
1692 req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7;
1693
1694 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
1695 u8 *addr = is_mt7663(phy->dev) ? req->mt7663.random_mac
1696 : req->mt7921.random_mac;
1697
1698 req->scan_func = 1;
1699 get_random_mask_addr(addr, sreq->mac_addr,
1700 sreq->mac_addr_mask);
1701 }
1702 if (is_mt7921(phy->dev)) {
1703 req->mt7921.bss_idx = mvif->idx;
1704 req->mt7921.delay = cpu_to_le32(sreq->delay);
1705 }
1706
1707 req->ssids_num = sreq->n_ssids;
1708 for (i = 0; i < req->ssids_num; i++) {
1709 ssid = &sreq->ssids[i];
1710 memcpy(req->ssids[i].ssid, ssid->ssid, ssid->ssid_len);
1711 req->ssids[i].ssid_len = cpu_to_le32(ssid->ssid_len);
1712 }
1713
1714 req->match_num = sreq->n_match_sets;
1715 for (i = 0; i < req->match_num; i++) {
1716 match = &sreq->match_sets[i];
1717 memcpy(req->match[i].ssid, match->ssid.ssid,
1718 match->ssid.ssid_len);
1719 req->match[i].rssi_th = cpu_to_le32(match->rssi_thold);
1720 req->match[i].ssid_len = match->ssid.ssid_len;
1721 }
1722
1723 req->channel_type = sreq->n_channels ? 4 : 0;
1724 req->channels_num = min_t(u8, sreq->n_channels, 64);
1725 for (i = 0; i < req->channels_num; i++) {
1726 chan = &req->channels[i];
1727
1728 switch (scan_list[i]->band) {
1729 case NL80211_BAND_2GHZ:
1730 chan->band = 1;
1731 break;
1732 case NL80211_BAND_6GHZ:
1733 chan->band = 3;
1734 break;
1735 default:
1736 chan->band = 2;
1737 break;
1738 }
1739 chan->channel_num = scan_list[i]->hw_value;
1740 }
1741
1742 req->intervals_num = sreq->n_scan_plans;
1743 for (i = 0; i < req->intervals_num; i++)
1744 req->intervals[i] = cpu_to_le16(sreq->scan_plans[i].interval);
1745
1746 if (sreq->ie_len > 0) {
1747 req->ie_len = cpu_to_le16(sreq->ie_len);
1748 memcpy(skb_put(skb, sreq->ie_len), sreq->ie, sreq->ie_len);
1749 }
1750
1751 return mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(SCHED_SCAN_REQ),
1752 false);
1753}
1754EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_req);
1755
1756int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy,
1757 struct ieee80211_vif *vif,
1758 bool enable)
1759{
1760 struct {
1761 u8 active; /* 0: enabled 1: disabled */
1762 u8 rsv[3];
1763 } __packed req = {
1764 .active = !enable,
1765 };
1766
1767 if (enable)
1768 set_bit(MT76_HW_SCHED_SCANNING, &phy->state);
1769 else
1770 clear_bit(MT76_HW_SCHED_SCANNING, &phy->state);
1771
1772 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SCHED_SCAN_ENABLE),
1773 &req, sizeof(req), false);
1774}
1775EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_enable);
1776
1777int mt76_connac_mcu_chip_config(struct mt76_dev *dev)
1778{
1779 struct mt76_connac_config req = {
1780 .resp_type = 0,
1781 };
1782
1783 memcpy(req.data, "assert", 7);
1784
1785 return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG),
1786 &req, sizeof(req), false);
1787}
1788EXPORT_SYMBOL_GPL(mt76_connac_mcu_chip_config);
1789
1790int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable)
1791{
1792 struct mt76_connac_config req = {
1793 .resp_type = 0,
1794 };
1795
1796 snprintf(req.data, sizeof(req.data), "KeepFullPwr %d", !enable);
1797
1798 return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG),
1799 &req, sizeof(req), false);
1800}
1801EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_deep_sleep);
1802
1803int mt76_connac_sta_state_dp(struct mt76_dev *dev,
1804 enum ieee80211_sta_state old_state,
1805 enum ieee80211_sta_state new_state)
1806{
1807 if ((old_state == IEEE80211_STA_ASSOC &&
1808 new_state == IEEE80211_STA_AUTHORIZED) ||
1809 (old_state == IEEE80211_STA_NONE &&
1810 new_state == IEEE80211_STA_NOTEXIST))
1811 mt76_connac_mcu_set_deep_sleep(dev, true);
1812
1813 if ((old_state == IEEE80211_STA_NOTEXIST &&
1814 new_state == IEEE80211_STA_NONE) ||
1815 (old_state == IEEE80211_STA_AUTHORIZED &&
1816 new_state == IEEE80211_STA_ASSOC))
1817 mt76_connac_mcu_set_deep_sleep(dev, false);
1818
1819 return 0;
1820}
1821EXPORT_SYMBOL_GPL(mt76_connac_sta_state_dp);
1822
1823void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb,
1824 struct mt76_connac_coredump *coredump)
1825{
1826 spin_lock_bh(&dev->lock);
1827 __skb_queue_tail(&coredump->msg_list, skb);
1828 spin_unlock_bh(&dev->lock);
1829
1830 coredump->last_activity = jiffies;
1831
1832 queue_delayed_work(dev->wq, &coredump->work,
1833 MT76_CONNAC_COREDUMP_TIMEOUT);
1834}
1835EXPORT_SYMBOL_GPL(mt76_connac_mcu_coredump_event);
1836
1837static void mt76_connac_mcu_parse_tx_resource(struct mt76_dev *dev,
1838 struct sk_buff *skb)
1839{
1840 struct mt76_sdio *sdio = &dev->sdio;
1841 struct mt76_connac_tx_resource {
1842 __le32 version;
1843 __le32 pse_data_quota;
1844 __le32 pse_mcu_quota;
1845 __le32 ple_data_quota;
1846 __le32 ple_mcu_quota;
1847 __le16 pse_page_size;
1848 __le16 ple_page_size;
1849 u8 pp_padding;
1850 u8 pad[3];
1851 } __packed * tx_res;
1852
1853 tx_res = (struct mt76_connac_tx_resource *)skb->data;
1854 sdio->sched.pse_data_quota = le32_to_cpu(tx_res->pse_data_quota);
1855 sdio->sched.pse_mcu_quota = le32_to_cpu(tx_res->pse_mcu_quota);
1856 sdio->sched.ple_data_quota = le32_to_cpu(tx_res->ple_data_quota);
1857 sdio->sched.pse_page_size = le16_to_cpu(tx_res->pse_page_size);
1858 sdio->sched.deficit = tx_res->pp_padding;
1859}
1860
1861static void mt76_connac_mcu_parse_phy_cap(struct mt76_dev *dev,
1862 struct sk_buff *skb)
1863{
1864 struct mt76_connac_phy_cap {
1865 u8 ht;
1866 u8 vht;
1867 u8 _5g;
1868 u8 max_bw;
1869 u8 nss;
1870 u8 dbdc;
1871 u8 tx_ldpc;
1872 u8 rx_ldpc;
1873 u8 tx_stbc;
1874 u8 rx_stbc;
1875 u8 hw_path;
1876 u8 he;
1877 } __packed * cap;
1878
1879 enum {
1880 WF0_24G,
1881 WF0_5G
1882 };
1883
1884 cap = (struct mt76_connac_phy_cap *)skb->data;
1885
1886 dev->phy.antenna_mask = BIT(cap->nss) - 1;
1887 dev->phy.chainmask = dev->phy.antenna_mask;
1888 dev->phy.cap.has_2ghz = cap->hw_path & BIT(WF0_24G);
1889 dev->phy.cap.has_5ghz = cap->hw_path & BIT(WF0_5G);
1890}
1891
1892int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy)
1893{
1894 struct mt76_connac_cap_hdr {
1895 __le16 n_element;
1896 u8 rsv[2];
1897 } __packed * hdr;
1898 struct sk_buff *skb;
1899 int ret, i;
1900
1901 ret = mt76_mcu_send_and_get_msg(phy->dev, MCU_CE_CMD(GET_NIC_CAPAB),
1902 NULL, 0, true, &skb);
1903 if (ret)
1904 return ret;
1905
1906 hdr = (struct mt76_connac_cap_hdr *)skb->data;
1907 if (skb->len < sizeof(*hdr)) {
1908 ret = -EINVAL;
1909 goto out;
1910 }
1911
1912 skb_pull(skb, sizeof(*hdr));
1913
1914 for (i = 0; i < le16_to_cpu(hdr->n_element); i++) {
1915 struct tlv_hdr {
1916 __le32 type;
1917 __le32 len;
1918 } __packed * tlv = (struct tlv_hdr *)skb->data;
1919 int len;
1920
1921 if (skb->len < sizeof(*tlv))
1922 break;
1923
1924 skb_pull(skb, sizeof(*tlv));
1925
1926 len = le32_to_cpu(tlv->len);
1927 if (skb->len < len)
1928 break;
1929
1930 switch (le32_to_cpu(tlv->type)) {
1931 case MT_NIC_CAP_6G:
1932 phy->cap.has_6ghz = skb->data[0];
1933 break;
1934 case MT_NIC_CAP_MAC_ADDR:
1935 memcpy(phy->macaddr, (void *)skb->data, ETH_ALEN);
1936 break;
1937 case MT_NIC_CAP_PHY:
1938 mt76_connac_mcu_parse_phy_cap(phy->dev, skb);
1939 break;
1940 case MT_NIC_CAP_TX_RESOURCE:
1941 if (mt76_is_sdio(phy->dev))
1942 mt76_connac_mcu_parse_tx_resource(phy->dev,
1943 skb);
1944 break;
1945 default:
1946 break;
1947 }
1948 skb_pull(skb, len);
1949 }
1950out:
1951 dev_kfree_skb(skb);
1952
1953 return ret;
1954}
1955EXPORT_SYMBOL_GPL(mt76_connac_mcu_get_nic_capability);
1956
1957static void
1958mt76_connac_mcu_build_sku(struct mt76_dev *dev, s8 *sku,
1959 struct mt76_power_limits *limits,
1960 enum nl80211_band band)
1961{
1962 int max_power = is_mt7921(dev) ? 127 : 63;
1963 int i, offset = sizeof(limits->cck);
1964
1965 memset(sku, max_power, MT_SKU_POWER_LIMIT);
1966
1967 if (band == NL80211_BAND_2GHZ) {
1968 /* cck */
1969 memcpy(sku, limits->cck, sizeof(limits->cck));
1970 }
1971
1972 /* ofdm */
1973 memcpy(&sku[offset], limits->ofdm, sizeof(limits->ofdm));
1974 offset += sizeof(limits->ofdm);
1975
1976 /* ht */
1977 for (i = 0; i < 2; i++) {
1978 memcpy(&sku[offset], limits->mcs[i], 8);
1979 offset += 8;
1980 }
1981 sku[offset++] = limits->mcs[0][0];
1982
1983 /* vht */
1984 for (i = 0; i < ARRAY_SIZE(limits->mcs); i++) {
1985 memcpy(&sku[offset], limits->mcs[i],
1986 ARRAY_SIZE(limits->mcs[i]));
1987 offset += 12;
1988 }
1989
1990 if (!is_mt7921(dev))
1991 return;
1992
1993 /* he */
1994 for (i = 0; i < ARRAY_SIZE(limits->ru); i++) {
1995 memcpy(&sku[offset], limits->ru[i], ARRAY_SIZE(limits->ru[i]));
1996 offset += ARRAY_SIZE(limits->ru[i]);
1997 }
1998}
1999
2000static s8 mt76_connac_get_ch_power(struct mt76_phy *phy,
2001 struct ieee80211_channel *chan,
2002 s8 target_power)
2003{
2004 struct mt76_dev *dev = phy->dev;
2005 struct ieee80211_supported_band *sband;
2006 int i;
2007
2008 switch (chan->band) {
2009 case NL80211_BAND_2GHZ:
2010 sband = &phy->sband_2g.sband;
2011 break;
2012 case NL80211_BAND_5GHZ:
2013 sband = &phy->sband_5g.sband;
2014 break;
2015 case NL80211_BAND_6GHZ:
2016 sband = &phy->sband_6g.sband;
2017 break;
2018 default:
2019 return target_power;
2020 }
2021
2022 for (i = 0; i < sband->n_channels; i++) {
2023 struct ieee80211_channel *ch = &sband->channels[i];
2024
2025 if (ch->hw_value == chan->hw_value) {
2026 if (!(ch->flags & IEEE80211_CHAN_DISABLED)) {
2027 int power = 2 * ch->max_reg_power;
2028
2029 if (is_mt7663(dev) && (power > 63 || power < -64))
2030 power = 63;
2031 target_power = min_t(s8, power, target_power);
2032 }
2033 break;
2034 }
2035 }
2036
2037 return target_power;
2038}
2039
2040static int
2041mt76_connac_mcu_rate_txpower_band(struct mt76_phy *phy,
2042 enum nl80211_band band)
2043{
2044 struct mt76_dev *dev = phy->dev;
2045 int sku_len, batch_len = is_mt7921(dev) ? 8 : 16;
2046 static const u8 chan_list_2ghz[] = {
2047 1, 2, 3, 4, 5, 6, 7,
2048 8, 9, 10, 11, 12, 13, 14
2049 };
2050 static const u8 chan_list_5ghz[] = {
2051 36, 38, 40, 42, 44, 46, 48,
2052 50, 52, 54, 56, 58, 60, 62,
2053 64, 100, 102, 104, 106, 108, 110,
2054 112, 114, 116, 118, 120, 122, 124,
2055 126, 128, 132, 134, 136, 138, 140,
2056 142, 144, 149, 151, 153, 155, 157,
2057 159, 161, 165
2058 };
2059 static const u8 chan_list_6ghz[] = {
2060 1, 3, 5, 7, 9, 11, 13,
2061 15, 17, 19, 21, 23, 25, 27,
2062 29, 33, 35, 37, 39, 41, 43,
2063 45, 47, 49, 51, 53, 55, 57,
2064 59, 61, 65, 67, 69, 71, 73,
2065 75, 77, 79, 81, 83, 85, 87,
2066 89, 91, 93, 97, 99, 101, 103,
2067 105, 107, 109, 111, 113, 115, 117,
2068 119, 121, 123, 125, 129, 131, 133,
2069 135, 137, 139, 141, 143, 145, 147,
2070 149, 151, 153, 155, 157, 161, 163,
2071 165, 167, 169, 171, 173, 175, 177,
2072 179, 181, 183, 185, 187, 189, 193,
2073 195, 197, 199, 201, 203, 205, 207,
2074 209, 211, 213, 215, 217, 219, 221,
2075 225, 227, 229, 233
2076 };
2077 int i, n_chan, batch_size, idx = 0, tx_power, last_ch;
2078 struct mt76_connac_sku_tlv sku_tlbv;
2079 struct mt76_power_limits limits;
2080 const u8 *ch_list;
2081
2082 sku_len = is_mt7921(dev) ? sizeof(sku_tlbv) : sizeof(sku_tlbv) - 92;
2083 tx_power = 2 * phy->hw->conf.power_level;
2084 if (!tx_power)
2085 tx_power = 127;
2086
2087 if (band == NL80211_BAND_2GHZ) {
2088 n_chan = ARRAY_SIZE(chan_list_2ghz);
2089 ch_list = chan_list_2ghz;
2090 } else if (band == NL80211_BAND_6GHZ) {
2091 n_chan = ARRAY_SIZE(chan_list_6ghz);
2092 ch_list = chan_list_6ghz;
2093 } else {
2094 n_chan = ARRAY_SIZE(chan_list_5ghz);
2095 ch_list = chan_list_5ghz;
2096 }
2097 batch_size = DIV_ROUND_UP(n_chan, batch_len);
2098
2099 if (phy->cap.has_6ghz)
2100 last_ch = chan_list_6ghz[ARRAY_SIZE(chan_list_6ghz) - 1];
2101 else if (phy->cap.has_5ghz)
2102 last_ch = chan_list_5ghz[ARRAY_SIZE(chan_list_5ghz) - 1];
2103 else
2104 last_ch = chan_list_2ghz[ARRAY_SIZE(chan_list_2ghz) - 1];
2105
2106 for (i = 0; i < batch_size; i++) {
2107 struct mt76_connac_tx_power_limit_tlv tx_power_tlv = {};
2108 int j, err, msg_len, num_ch;
2109 struct sk_buff *skb;
2110
2111 num_ch = i == batch_size - 1 ? n_chan % batch_len : batch_len;
2112 msg_len = sizeof(tx_power_tlv) + num_ch * sizeof(sku_tlbv);
2113 skb = mt76_mcu_msg_alloc(dev, NULL, msg_len);
2114 if (!skb)
2115 return -ENOMEM;
2116
2117 skb_reserve(skb, sizeof(tx_power_tlv));
2118
2119 BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(tx_power_tlv.alpha2));
2120 memcpy(tx_power_tlv.alpha2, dev->alpha2, sizeof(dev->alpha2));
2121 tx_power_tlv.n_chan = num_ch;
2122
2123 switch (band) {
2124 case NL80211_BAND_2GHZ:
2125 tx_power_tlv.band = 1;
2126 break;
2127 case NL80211_BAND_6GHZ:
2128 tx_power_tlv.band = 3;
2129 break;
2130 default:
2131 tx_power_tlv.band = 2;
2132 break;
2133 }
2134
2135 for (j = 0; j < num_ch; j++, idx++) {
2136 struct ieee80211_channel chan = {
2137 .hw_value = ch_list[idx],
2138 .band = band,
2139 };
2140 s8 reg_power, sar_power;
2141
2142 reg_power = mt76_connac_get_ch_power(phy, &chan,
2143 tx_power);
2144 sar_power = mt76_get_sar_power(phy, &chan, reg_power);
2145
2146 mt76_get_rate_power_limits(phy, &chan, &limits,
2147 sar_power);
2148
2149 tx_power_tlv.last_msg = ch_list[idx] == last_ch;
2150 sku_tlbv.channel = ch_list[idx];
2151
2152 mt76_connac_mcu_build_sku(dev, sku_tlbv.pwr_limit,
2153 &limits, band);
2154 skb_put_data(skb, &sku_tlbv, sku_len);
2155 }
2156 __skb_push(skb, sizeof(tx_power_tlv));
2157 memcpy(skb->data, &tx_power_tlv, sizeof(tx_power_tlv));
2158
2159 err = mt76_mcu_skb_send_msg(dev, skb,
2160 MCU_CE_CMD(SET_RATE_TX_POWER),
2161 false);
2162 if (err < 0)
2163 return err;
2164 }
2165
2166 return 0;
2167}
2168
2169int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy)
2170{
2171 int err;
2172
2173 if (phy->cap.has_2ghz) {
2174 err = mt76_connac_mcu_rate_txpower_band(phy,
2175 NL80211_BAND_2GHZ);
2176 if (err < 0)
2177 return err;
2178 }
2179 if (phy->cap.has_5ghz) {
2180 err = mt76_connac_mcu_rate_txpower_band(phy,
2181 NL80211_BAND_5GHZ);
2182 if (err < 0)
2183 return err;
2184 }
2185 if (phy->cap.has_6ghz) {
2186 err = mt76_connac_mcu_rate_txpower_band(phy,
2187 NL80211_BAND_6GHZ);
2188 if (err < 0)
2189 return err;
2190 }
2191
2192 return 0;
2193}
2194EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rate_txpower);
2195
2196int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev,
2197 struct mt76_vif *vif,
2198 struct ieee80211_bss_conf *info)
2199{
2200 struct sk_buff *skb;
2201 int i, len = min_t(int, info->arp_addr_cnt,
2202 IEEE80211_BSS_ARP_ADDR_LIST_LEN);
2203 struct {
2204 struct {
2205 u8 bss_idx;
2206 u8 pad[3];
2207 } __packed hdr;
2208 struct mt76_connac_arpns_tlv arp;
2209 } req_hdr = {
2210 .hdr = {
2211 .bss_idx = vif->idx,
2212 },
2213 .arp = {
2214 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP),
2215 .len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)),
2216 .ips_num = len,
2217 .mode = 2, /* update */
2218 .option = 1,
2219 },
2220 };
2221
2222 skb = mt76_mcu_msg_alloc(dev, NULL,
2223 sizeof(req_hdr) + len * sizeof(__be32));
2224 if (!skb)
2225 return -ENOMEM;
2226
2227 skb_put_data(skb, &req_hdr, sizeof(req_hdr));
2228 for (i = 0; i < len; i++)
2229 skb_put_data(skb, &info->arp_addr_list[i], sizeof(__be32));
2230
2231 return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(OFFLOAD), true);
2232}
2233EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_arp_filter);
2234
2235int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw,
2236 struct ieee80211_vif *vif)
2237{
2238 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2239 int ct_window = vif->bss_conf.p2p_noa_attr.oppps_ctwindow;
2240 struct mt76_phy *phy = hw->priv;
2241 struct {
2242 __le32 ct_win;
2243 u8 bss_idx;
2244 u8 rsv[3];
2245 } __packed req = {
2246 .ct_win = cpu_to_le32(ct_window),
2247 .bss_idx = mvif->idx,
2248 };
2249
2250 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SET_P2P_OPPPS),
2251 &req, sizeof(req), false);
2252}
2253EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_p2p_oppps);
2254
2255#ifdef CONFIG_PM
2256
2257const struct wiphy_wowlan_support mt76_connac_wowlan_support = {
2258 .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT |
2259 WIPHY_WOWLAN_SUPPORTS_GTK_REKEY | WIPHY_WOWLAN_NET_DETECT,
2260 .n_patterns = 1,
2261 .pattern_min_len = 1,
2262 .pattern_max_len = MT76_CONNAC_WOW_PATTEN_MAX_LEN,
2263 .max_nd_match_sets = 10,
2264};
2265EXPORT_SYMBOL_GPL(mt76_connac_wowlan_support);
2266
2267static void
2268mt76_connac_mcu_key_iter(struct ieee80211_hw *hw,
2269 struct ieee80211_vif *vif,
2270 struct ieee80211_sta *sta,
2271 struct ieee80211_key_conf *key,
2272 void *data)
2273{
2274 struct mt76_connac_gtk_rekey_tlv *gtk_tlv = data;
2275 u32 cipher;
2276
2277 if (key->cipher != WLAN_CIPHER_SUITE_AES_CMAC &&
2278 key->cipher != WLAN_CIPHER_SUITE_CCMP &&
2279 key->cipher != WLAN_CIPHER_SUITE_TKIP)
2280 return;
2281
2282 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
2283 cipher = BIT(3);
2284 else
2285 cipher = BIT(4);
2286
2287 /* we are assuming here to have a single pairwise key */
2288 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) {
2289 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
2290 gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_1);
2291 else
2292 gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_2);
2293
2294 gtk_tlv->pairwise_cipher = cpu_to_le32(cipher);
2295 gtk_tlv->keyid = key->keyidx;
2296 } else {
2297 gtk_tlv->group_cipher = cpu_to_le32(cipher);
2298 }
2299}
2300
2301int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw,
2302 struct ieee80211_vif *vif,
2303 struct cfg80211_gtk_rekey_data *key)
2304{
2305 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2306 struct mt76_connac_gtk_rekey_tlv *gtk_tlv;
2307 struct mt76_phy *phy = hw->priv;
2308 struct sk_buff *skb;
2309 struct {
2310 u8 bss_idx;
2311 u8 pad[3];
2312 } __packed hdr = {
2313 .bss_idx = mvif->idx,
2314 };
2315
2316 skb = mt76_mcu_msg_alloc(phy->dev, NULL,
2317 sizeof(hdr) + sizeof(*gtk_tlv));
2318 if (!skb)
2319 return -ENOMEM;
2320
2321 skb_put_data(skb, &hdr, sizeof(hdr));
2322 gtk_tlv = (struct mt76_connac_gtk_rekey_tlv *)skb_put(skb,
2323 sizeof(*gtk_tlv));
2324 gtk_tlv->tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY);
2325 gtk_tlv->len = cpu_to_le16(sizeof(*gtk_tlv));
2326 gtk_tlv->rekey_mode = 2;
2327 gtk_tlv->option = 1;
2328
2329 rcu_read_lock();
2330 ieee80211_iter_keys_rcu(hw, vif, mt76_connac_mcu_key_iter, gtk_tlv);
2331 rcu_read_unlock();
2332
2333 memcpy(gtk_tlv->kek, key->kek, NL80211_KEK_LEN);
2334 memcpy(gtk_tlv->kck, key->kck, NL80211_KCK_LEN);
2335 memcpy(gtk_tlv->replay_ctr, key->replay_ctr, NL80211_REPLAY_CTR_LEN);
2336
2337 return mt76_mcu_skb_send_msg(phy->dev, skb,
2338 MCU_UNI_CMD(OFFLOAD), true);
2339}
2340EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_gtk_rekey);
2341
2342static int
2343mt76_connac_mcu_set_arp_filter(struct mt76_dev *dev, struct ieee80211_vif *vif,
2344 bool suspend)
2345{
2346 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2347 struct {
2348 struct {
2349 u8 bss_idx;
2350 u8 pad[3];
2351 } __packed hdr;
2352 struct mt76_connac_arpns_tlv arpns;
2353 } req = {
2354 .hdr = {
2355 .bss_idx = mvif->idx,
2356 },
2357 .arpns = {
2358 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP),
2359 .len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)),
2360 .mode = suspend,
2361 },
2362 };
2363
2364 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req,
2365 sizeof(req), true);
2366}
2367
2368static int
2369mt76_connac_mcu_set_gtk_rekey(struct mt76_dev *dev, struct ieee80211_vif *vif,
2370 bool suspend)
2371{
2372 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2373 struct {
2374 struct {
2375 u8 bss_idx;
2376 u8 pad[3];
2377 } __packed hdr;
2378 struct mt76_connac_gtk_rekey_tlv gtk_tlv;
2379 } __packed req = {
2380 .hdr = {
2381 .bss_idx = mvif->idx,
2382 },
2383 .gtk_tlv = {
2384 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY),
2385 .len = cpu_to_le16(sizeof(struct mt76_connac_gtk_rekey_tlv)),
2386 .rekey_mode = !suspend,
2387 },
2388 };
2389
2390 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req,
2391 sizeof(req), true);
2392}
2393
2394static int
2395mt76_connac_mcu_set_suspend_mode(struct mt76_dev *dev,
2396 struct ieee80211_vif *vif,
2397 bool enable, u8 mdtim,
2398 bool wow_suspend)
2399{
2400 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2401 struct {
2402 struct {
2403 u8 bss_idx;
2404 u8 pad[3];
2405 } __packed hdr;
2406 struct mt76_connac_suspend_tlv suspend_tlv;
2407 } req = {
2408 .hdr = {
2409 .bss_idx = mvif->idx,
2410 },
2411 .suspend_tlv = {
2412 .tag = cpu_to_le16(UNI_SUSPEND_MODE_SETTING),
2413 .len = cpu_to_le16(sizeof(struct mt76_connac_suspend_tlv)),
2414 .enable = enable,
2415 .mdtim = mdtim,
2416 .wow_suspend = wow_suspend,
2417 },
2418 };
2419
2420 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req,
2421 sizeof(req), true);
2422}
2423
2424static int
2425mt76_connac_mcu_set_wow_pattern(struct mt76_dev *dev,
2426 struct ieee80211_vif *vif,
2427 u8 index, bool enable,
2428 struct cfg80211_pkt_pattern *pattern)
2429{
2430 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2431 struct mt76_connac_wow_pattern_tlv *ptlv;
2432 struct sk_buff *skb;
2433 struct req_hdr {
2434 u8 bss_idx;
2435 u8 pad[3];
2436 } __packed hdr = {
2437 .bss_idx = mvif->idx,
2438 };
2439
2440 skb = mt76_mcu_msg_alloc(dev, NULL, sizeof(hdr) + sizeof(*ptlv));
2441 if (!skb)
2442 return -ENOMEM;
2443
2444 skb_put_data(skb, &hdr, sizeof(hdr));
2445 ptlv = (struct mt76_connac_wow_pattern_tlv *)skb_put(skb, sizeof(*ptlv));
2446 ptlv->tag = cpu_to_le16(UNI_SUSPEND_WOW_PATTERN);
2447 ptlv->len = cpu_to_le16(sizeof(*ptlv));
2448 ptlv->data_len = pattern->pattern_len;
2449 ptlv->enable = enable;
2450 ptlv->index = index;
2451
2452 memcpy(ptlv->pattern, pattern->pattern, pattern->pattern_len);
2453 memcpy(ptlv->mask, pattern->mask, DIV_ROUND_UP(pattern->pattern_len, 8));
2454
2455 return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(SUSPEND), true);
2456}
2457
2458static int
2459mt76_connac_mcu_set_wow_ctrl(struct mt76_phy *phy, struct ieee80211_vif *vif,
2460 bool suspend, struct cfg80211_wowlan *wowlan)
2461{
2462 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2463 struct mt76_dev *dev = phy->dev;
2464 struct {
2465 struct {
2466 u8 bss_idx;
2467 u8 pad[3];
2468 } __packed hdr;
2469 struct mt76_connac_wow_ctrl_tlv wow_ctrl_tlv;
2470 struct mt76_connac_wow_gpio_param_tlv gpio_tlv;
2471 } req = {
2472 .hdr = {
2473 .bss_idx = mvif->idx,
2474 },
2475 .wow_ctrl_tlv = {
2476 .tag = cpu_to_le16(UNI_SUSPEND_WOW_CTRL),
2477 .len = cpu_to_le16(sizeof(struct mt76_connac_wow_ctrl_tlv)),
2478 .cmd = suspend ? 1 : 2,
2479 },
2480 .gpio_tlv = {
2481 .tag = cpu_to_le16(UNI_SUSPEND_WOW_GPIO_PARAM),
2482 .len = cpu_to_le16(sizeof(struct mt76_connac_wow_gpio_param_tlv)),
2483 .gpio_pin = 0xff, /* follow fw about GPIO pin */
2484 },
2485 };
2486
2487 if (wowlan->magic_pkt)
2488 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_MAGIC;
2489 if (wowlan->disconnect)
2490 req.wow_ctrl_tlv.trigger |= (UNI_WOW_DETECT_TYPE_DISCONNECT |
2491 UNI_WOW_DETECT_TYPE_BCN_LOST);
2492 if (wowlan->nd_config) {
2493 mt76_connac_mcu_sched_scan_req(phy, vif, wowlan->nd_config);
2494 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT;
2495 mt76_connac_mcu_sched_scan_enable(phy, vif, suspend);
2496 }
2497 if (wowlan->n_patterns)
2498 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_BITMAP;
2499
2500 if (mt76_is_mmio(dev))
2501 req.wow_ctrl_tlv.wakeup_hif = WOW_PCIE;
2502 else if (mt76_is_usb(dev))
2503 req.wow_ctrl_tlv.wakeup_hif = WOW_USB;
2504 else if (mt76_is_sdio(dev))
2505 req.wow_ctrl_tlv.wakeup_hif = WOW_GPIO;
2506
2507 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req,
2508 sizeof(req), true);
2509}
2510
2511int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend)
2512{
2513 struct {
2514 struct {
2515 u8 hif_type; /* 0x0: HIF_SDIO
2516 * 0x1: HIF_USB
2517 * 0x2: HIF_PCIE
2518 */
2519 u8 pad[3];
2520 } __packed hdr;
2521 struct hif_suspend_tlv {
2522 __le16 tag;
2523 __le16 len;
2524 u8 suspend;
2525 } __packed hif_suspend;
2526 } req = {
2527 .hif_suspend = {
2528 .tag = cpu_to_le16(0), /* 0: UNI_HIF_CTRL_BASIC */
2529 .len = cpu_to_le16(sizeof(struct hif_suspend_tlv)),
2530 .suspend = suspend,
2531 },
2532 };
2533
2534 if (mt76_is_mmio(dev))
2535 req.hdr.hif_type = 2;
2536 else if (mt76_is_usb(dev))
2537 req.hdr.hif_type = 1;
2538 else if (mt76_is_sdio(dev))
2539 req.hdr.hif_type = 0;
2540
2541 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(HIF_CTRL), &req,
2542 sizeof(req), true);
2543}
2544EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_hif_suspend);
2545
2546void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac,
2547 struct ieee80211_vif *vif)
2548{
2549 struct mt76_phy *phy = priv;
2550 bool suspend = !test_bit(MT76_STATE_RUNNING, &phy->state);
2551 struct ieee80211_hw *hw = phy->hw;
2552 struct cfg80211_wowlan *wowlan = hw->wiphy->wowlan_config;
2553 int i;
2554
2555 mt76_connac_mcu_set_gtk_rekey(phy->dev, vif, suspend);
2556 mt76_connac_mcu_set_arp_filter(phy->dev, vif, suspend);
2557
2558 mt76_connac_mcu_set_suspend_mode(phy->dev, vif, suspend, 1, true);
2559
2560 for (i = 0; i < wowlan->n_patterns; i++)
2561 mt76_connac_mcu_set_wow_pattern(phy->dev, vif, i, suspend,
2562 &wowlan->patterns[i]);
2563 mt76_connac_mcu_set_wow_ctrl(phy, vif, suspend, wowlan);
2564}
2565EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_suspend_iter);
2566#endif /* CONFIG_PM */
2567
2568u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset)
2569{
2570 struct {
2571 __le32 addr;
2572 __le32 val;
2573 } __packed req = {
2574 .addr = cpu_to_le32(offset),
2575 };
2576
2577 return mt76_mcu_send_msg(dev, MCU_CE_QUERY(REG_READ), &req,
2578 sizeof(req), true);
2579}
2580EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_rr);
2581
2582void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val)
2583{
2584 struct {
2585 __le32 addr;
2586 __le32 val;
2587 } __packed req = {
2588 .addr = cpu_to_le32(offset),
2589 .val = cpu_to_le32(val),
2590 };
2591
2592 mt76_mcu_send_msg(dev, MCU_CE_CMD(REG_WRITE), &req,
2593 sizeof(req), false);
2594}
2595EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_wr);
2596
2597static int
2598mt76_connac_mcu_sta_key_tlv(struct mt76_connac_sta_key_conf *sta_key_conf,
2599 struct sk_buff *skb,
2600 struct ieee80211_key_conf *key,
2601 enum set_key_cmd cmd)
2602{
2603 struct sta_rec_sec *sec;
2604 u32 len = sizeof(*sec);
2605 struct tlv *tlv;
2606
2607 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec));
2608 sec = (struct sta_rec_sec *)tlv;
2609 sec->add = cmd;
2610
2611 if (cmd == SET_KEY) {
2612 struct sec_key *sec_key;
2613 u8 cipher;
2614
2615 cipher = mt76_connac_mcu_get_cipher(key->cipher);
2616 if (cipher == MCU_CIPHER_NONE)
2617 return -EOPNOTSUPP;
2618
2619 sec_key = &sec->key[0];
2620 sec_key->cipher_len = sizeof(*sec_key);
2621
2622 if (cipher == MCU_CIPHER_BIP_CMAC_128) {
2623 sec_key->cipher_id = MCU_CIPHER_AES_CCMP;
2624 sec_key->key_id = sta_key_conf->keyidx;
2625 sec_key->key_len = 16;
2626 memcpy(sec_key->key, sta_key_conf->key, 16);
2627
2628 sec_key = &sec->key[1];
2629 sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128;
2630 sec_key->cipher_len = sizeof(*sec_key);
2631 sec_key->key_len = 16;
2632 memcpy(sec_key->key, key->key, 16);
2633 sec->n_cipher = 2;
2634 } else {
2635 sec_key->cipher_id = cipher;
2636 sec_key->key_id = key->keyidx;
2637 sec_key->key_len = key->keylen;
2638 memcpy(sec_key->key, key->key, key->keylen);
2639
2640 if (cipher == MCU_CIPHER_TKIP) {
2641 /* Rx/Tx MIC keys are swapped */
2642 memcpy(sec_key->key + 16, key->key + 24, 8);
2643 memcpy(sec_key->key + 24, key->key + 16, 8);
2644 }
2645
2646 /* store key_conf for BIP batch update */
2647 if (cipher == MCU_CIPHER_AES_CCMP) {
2648 memcpy(sta_key_conf->key, key->key, key->keylen);
2649 sta_key_conf->keyidx = key->keyidx;
2650 }
2651
2652 len -= sizeof(*sec_key);
2653 sec->n_cipher = 1;
2654 }
2655 } else {
2656 len -= sizeof(sec->key);
2657 sec->n_cipher = 0;
2658 }
2659 sec->len = cpu_to_le16(len);
2660
2661 return 0;
2662}
2663
2664int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,
2665 struct mt76_connac_sta_key_conf *sta_key_conf,
2666 struct ieee80211_key_conf *key, int mcu_cmd,
2667 struct mt76_wcid *wcid, enum set_key_cmd cmd)
2668{
2669 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2670 struct sk_buff *skb;
2671 int ret;
2672
2673 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
2674 if (IS_ERR(skb))
2675 return PTR_ERR(skb);
2676
2677 ret = mt76_connac_mcu_sta_key_tlv(sta_key_conf, skb, key, cmd);
2678 if (ret)
2679 return ret;
2680
2681 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true);
2682}
2683EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_key);
2684
2685/* SIFS 20us + 512 byte beacon transmitted by 1Mbps (3906us) */
2686#define BCN_TX_ESTIMATE_TIME (4096 + 20)
2687void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif)
2688{
2689 struct bss_info_ext_bss *ext;
2690 int ext_bss_idx, tsf_offset;
2691 struct tlv *tlv;
2692
2693 ext_bss_idx = mvif->omac_idx - EXT_BSSID_START;
2694 if (ext_bss_idx < 0)
2695 return;
2696
2697 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_EXT_BSS, sizeof(*ext));
2698
2699 ext = (struct bss_info_ext_bss *)tlv;
2700 tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME;
2701 ext->mbss_tsf_offset = cpu_to_le32(tsf_offset);
2702}
2703EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_ext_tlv);
2704
2705int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb,
2706 struct ieee80211_vif *vif,
2707 struct ieee80211_sta *sta,
2708 struct mt76_phy *phy, u16 wlan_idx,
2709 bool enable)
2710{
2711 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2712 u32 type = vif->p2p ? NETWORK_P2P : NETWORK_INFRA;
2713 struct bss_info_basic *bss;
2714 struct tlv *tlv;
2715
2716 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss));
2717 bss = (struct bss_info_basic *)tlv;
2718
2719 switch (vif->type) {
2720 case NL80211_IFTYPE_MESH_POINT:
2721 case NL80211_IFTYPE_MONITOR:
2722 break;
2723 case NL80211_IFTYPE_AP:
2724 if (ieee80211_hw_check(phy->hw, SUPPORTS_MULTI_BSSID)) {
2725 u8 bssid_id = vif->bss_conf.bssid_indicator;
2726 struct wiphy *wiphy = phy->hw->wiphy;
2727
2728 if (bssid_id > ilog2(wiphy->mbssid_max_interfaces))
2729 return -EINVAL;
2730
2731 bss->non_tx_bssid = vif->bss_conf.bssid_index;
2732 bss->max_bssid = bssid_id;
2733 }
2734 break;
2735 case NL80211_IFTYPE_STATION:
2736 if (enable) {
2737 rcu_read_lock();
2738 if (!sta)
2739 sta = ieee80211_find_sta(vif,
2740 vif->bss_conf.bssid);
2741 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */
2742 if (sta) {
2743 struct mt76_wcid *wcid;
2744
2745 wcid = (struct mt76_wcid *)sta->drv_priv;
2746 wlan_idx = wcid->idx;
2747 }
2748 rcu_read_unlock();
2749 }
2750 break;
2751 case NL80211_IFTYPE_ADHOC:
2752 type = NETWORK_IBSS;
2753 break;
2754 default:
2755 WARN_ON(1);
2756 break;
2757 }
2758
2759 bss->network_type = cpu_to_le32(type);
2760 bss->bmc_wcid_lo = to_wcid_lo(wlan_idx);
2761 bss->bmc_wcid_hi = to_wcid_hi(wlan_idx);
2762 bss->wmm_idx = mvif->wmm_idx;
2763 bss->active = enable;
2764 bss->cipher = mvif->cipher;
2765
2766 if (vif->type != NL80211_IFTYPE_MONITOR) {
2767 struct cfg80211_chan_def *chandef = &phy->chandef;
2768
2769 memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN);
2770 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int);
2771 bss->dtim_period = vif->bss_conf.dtim_period;
2772 bss->phy_mode = mt76_connac_get_phy_mode(phy, vif,
2773 chandef->chan->band, NULL);
2774 } else {
2775 memcpy(bss->bssid, phy->macaddr, ETH_ALEN);
2776 }
2777
2778 return 0;
2779}
2780EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_basic_tlv);
2781
2782#define ENTER_PM_STATE 1
2783#define EXIT_PM_STATE 2
2784int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter)
2785{
2786 struct {
2787 u8 pm_number;
2788 u8 pm_state;
2789 u8 bssid[ETH_ALEN];
2790 u8 dtim_period;
2791 u8 wlan_idx_lo;
2792 __le16 bcn_interval;
2793 __le32 aid;
2794 __le32 rx_filter;
2795 u8 band_idx;
2796 u8 wlan_idx_hi;
2797 u8 rsv[2];
2798 __le32 feature;
2799 u8 omac_idx;
2800 u8 wmm_idx;
2801 u8 bcn_loss_cnt;
2802 u8 bcn_sp_duration;
2803 } __packed req = {
2804 .pm_number = 5,
2805 .pm_state = enter ? ENTER_PM_STATE : EXIT_PM_STATE,
2806 .band_idx = band,
2807 };
2808
2809 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PM_STATE_CTRL), &req,
2810 sizeof(req), true);
2811}
2812EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_pm);
2813
2814int mt76_connac_mcu_restart(struct mt76_dev *dev)
2815{
2816 struct {
2817 u8 power_mode;
2818 u8 rsv[3];
2819 } req = {
2820 .power_mode = 1,
2821 };
2822
2823 return mt76_mcu_send_msg(dev, MCU_CMD(NIC_POWER_CTRL), &req,
2824 sizeof(req), false);
2825}
2826EXPORT_SYMBOL_GPL(mt76_connac_mcu_restart);
2827
2828int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index,
2829 u8 rx_sel, u8 val)
2830{
2831 struct {
2832 u8 ctrl;
2833 u8 rdd_idx;
2834 u8 rdd_rx_sel;
2835 u8 val;
2836 u8 rsv[4];
2837 } __packed req = {
2838 .ctrl = cmd,
2839 .rdd_idx = index,
2840 .rdd_rx_sel = rx_sel,
2841 .val = val,
2842 };
2843
2844 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(SET_RDD_CTRL), &req,
2845 sizeof(req), true);
2846}
2847EXPORT_SYMBOL_GPL(mt76_connac_mcu_rdd_cmd);
2848
2849static int
2850mt76_connac_mcu_send_ram_firmware(struct mt76_dev *dev,
2851 const struct mt76_connac2_fw_trailer *hdr,
2852 const u8 *data, bool is_wa)
2853{
2854 int i, offset = 0, max_len = mt76_is_sdio(dev) ? 2048 : 4096;
2855 u32 override = 0, option = 0;
2856
2857 for (i = 0; i < hdr->n_region; i++) {
2858 const struct mt76_connac2_fw_region *region;
2859 u32 len, addr, mode;
2860 int err;
2861
2862 region = (const void *)((const u8 *)hdr -
2863 (hdr->n_region - i) * sizeof(*region));
2864 mode = mt76_connac_mcu_gen_dl_mode(dev, region->feature_set,
2865 is_wa);
2866 len = le32_to_cpu(region->len);
2867 addr = le32_to_cpu(region->addr);
2868
2869 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR)
2870 override = addr;
2871
2872 err = mt76_connac_mcu_init_download(dev, addr, len, mode);
2873 if (err) {
2874 dev_err(dev->dev, "Download request failed\n");
2875 return err;
2876 }
2877
2878 err = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER),
2879 data + offset, len, max_len);
2880 if (err) {
2881 dev_err(dev->dev, "Failed to send firmware.\n");
2882 return err;
2883 }
2884
2885 offset += len;
2886 }
2887
2888 if (override)
2889 option |= FW_START_OVERRIDE;
2890 if (is_wa)
2891 option |= FW_START_WORKING_PDA_CR4;
2892
2893 return mt76_connac_mcu_start_firmware(dev, override, option);
2894}
2895
2896int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm,
2897 const char *fw_wa)
2898{
2899 const struct mt76_connac2_fw_trailer *hdr;
2900 const struct firmware *fw;
2901 int ret;
2902
2903 ret = request_firmware(&fw, fw_wm, dev->dev);
2904 if (ret)
2905 return ret;
2906
2907 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2908 dev_err(dev->dev, "Invalid firmware\n");
2909 ret = -EINVAL;
2910 goto out;
2911 }
2912
2913 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
2914 dev_info(dev->dev, "WM Firmware Version: %.10s, Build Time: %.15s\n",
2915 hdr->fw_ver, hdr->build_date);
2916
2917 ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, false);
2918 if (ret) {
2919 dev_err(dev->dev, "Failed to start WM firmware\n");
2920 goto out;
2921 }
2922
2923 snprintf(dev->hw->wiphy->fw_version,
2924 sizeof(dev->hw->wiphy->fw_version),
2925 "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
2926
2927 release_firmware(fw);
2928
2929 if (!fw_wa)
2930 return 0;
2931
2932 ret = request_firmware(&fw, fw_wa, dev->dev);
2933 if (ret)
2934 return ret;
2935
2936 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2937 dev_err(dev->dev, "Invalid firmware\n");
2938 ret = -EINVAL;
2939 goto out;
2940 }
2941
2942 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
2943 dev_info(dev->dev, "WA Firmware Version: %.10s, Build Time: %.15s\n",
2944 hdr->fw_ver, hdr->build_date);
2945
2946 ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, true);
2947 if (ret) {
2948 dev_err(dev->dev, "Failed to start WA firmware\n");
2949 goto out;
2950 }
2951
2952 snprintf(dev->hw->wiphy->fw_version,
2953 sizeof(dev->hw->wiphy->fw_version),
2954 "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
2955
2956out:
2957 release_firmware(fw);
2958
2959 return ret;
2960}
2961EXPORT_SYMBOL_GPL(mt76_connac2_load_ram);
2962
2963static u32 mt76_connac2_get_data_mode(struct mt76_dev *dev, u32 info)
2964{
2965 u32 mode = DL_MODE_NEED_RSP;
2966
2967 if (!is_mt7921(dev) || info == PATCH_SEC_NOT_SUPPORT)
2968 return mode;
2969
2970 switch (FIELD_GET(PATCH_SEC_ENC_TYPE_MASK, info)) {
2971 case PATCH_SEC_ENC_TYPE_PLAIN:
2972 break;
2973 case PATCH_SEC_ENC_TYPE_AES:
2974 mode |= DL_MODE_ENCRYPT;
2975 mode |= FIELD_PREP(DL_MODE_KEY_IDX,
2976 (info & PATCH_SEC_ENC_AES_KEY_MASK)) & DL_MODE_KEY_IDX;
2977 mode |= DL_MODE_RESET_SEC_IV;
2978 break;
2979 case PATCH_SEC_ENC_TYPE_SCRAMBLE:
2980 mode |= DL_MODE_ENCRYPT;
2981 mode |= DL_CONFIG_ENCRY_MODE_SEL;
2982 mode |= DL_MODE_RESET_SEC_IV;
2983 break;
2984 default:
2985 dev_err(dev->dev, "Encryption type not support!\n");
2986 }
2987
2988 return mode;
2989}
2990
2991int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name)
2992{
2993 int i, ret, sem, max_len = mt76_is_sdio(dev) ? 2048 : 4096;
2994 const struct mt76_connac2_patch_hdr *hdr;
2995 const struct firmware *fw = NULL;
2996
2997 sem = mt76_connac_mcu_patch_sem_ctrl(dev, true);
2998 switch (sem) {
2999 case PATCH_IS_DL:
3000 return 0;
3001 case PATCH_NOT_DL_SEM_SUCCESS:
3002 break;
3003 default:
3004 dev_err(dev->dev, "Failed to get patch semaphore\n");
3005 return -EAGAIN;
3006 }
3007
3008 ret = request_firmware(&fw, fw_name, dev->dev);
3009 if (ret)
3010 goto out;
3011
3012 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
3013 dev_err(dev->dev, "Invalid firmware\n");
3014 ret = -EINVAL;
3015 goto out;
3016 }
3017
3018 hdr = (const void *)fw->data;
3019 dev_info(dev->dev, "HW/SW Version: 0x%x, Build Time: %.16s\n",
3020 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date);
3021
3022 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) {
3023 struct mt76_connac2_patch_sec *sec;
3024 u32 len, addr, mode;
3025 const u8 *dl;
3026 u32 sec_info;
3027
3028 sec = (void *)(fw->data + sizeof(*hdr) + i * sizeof(*sec));
3029 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) !=
3030 PATCH_SEC_TYPE_INFO) {
3031 ret = -EINVAL;
3032 goto out;
3033 }
3034
3035 addr = be32_to_cpu(sec->info.addr);
3036 len = be32_to_cpu(sec->info.len);
3037 dl = fw->data + be32_to_cpu(sec->offs);
3038 sec_info = be32_to_cpu(sec->info.sec_key_idx);
3039 mode = mt76_connac2_get_data_mode(dev, sec_info);
3040
3041 ret = mt76_connac_mcu_init_download(dev, addr, len, mode);
3042 if (ret) {
3043 dev_err(dev->dev, "Download request failed\n");
3044 goto out;
3045 }
3046
3047 ret = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER),
3048 dl, len, max_len);
3049 if (ret) {
3050 dev_err(dev->dev, "Failed to send patch\n");
3051 goto out;
3052 }
3053 }
3054
3055 ret = mt76_connac_mcu_start_patch(dev);
3056 if (ret)
3057 dev_err(dev->dev, "Failed to start patch\n");
3058
3059out:
3060 sem = mt76_connac_mcu_patch_sem_ctrl(dev, false);
3061 switch (sem) {
3062 case PATCH_REL_SEM_SUCCESS:
3063 break;
3064 default:
3065 ret = -EAGAIN;
3066 dev_err(dev->dev, "Failed to release patch semaphore\n");
3067 break;
3068 }
3069
3070 release_firmware(fw);
3071
3072 return ret;
3073}
3074EXPORT_SYMBOL_GPL(mt76_connac2_load_patch);
3075
3076int mt76_connac2_mcu_fill_message(struct mt76_dev *dev, struct sk_buff *skb,
3077 int cmd, int *wait_seq)
3078{
3079 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
3080 struct mt76_connac2_mcu_uni_txd *uni_txd;
3081 struct mt76_connac2_mcu_txd *mcu_txd;
3082 __le32 *txd;
3083 u32 val;
3084 u8 seq;
3085
3086 /* TODO: make dynamic based on msg type */
3087 dev->mcu.timeout = 20 * HZ;
3088
3089 seq = ++dev->mcu.msg_seq & 0xf;
3090 if (!seq)
3091 seq = ++dev->mcu.msg_seq & 0xf;
3092
3093 if (cmd == MCU_CMD(FW_SCATTER))
3094 goto exit;
3095
3096 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd);
3097 txd = (__le32 *)skb_push(skb, txd_len);
3098
3099 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |
3100 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) |
3101 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0);
3102 txd[0] = cpu_to_le32(val);
3103
3104 val = MT_TXD1_LONG_FORMAT |
3105 FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD);
3106 txd[1] = cpu_to_le32(val);
3107
3108 if (cmd & __MCU_CMD_FIELD_UNI) {
3109 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd;
3110 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd));
3111 uni_txd->option = MCU_CMD_UNI_EXT_ACK;
3112 uni_txd->cid = cpu_to_le16(mcu_cmd);
3113 uni_txd->s2d_index = MCU_S2D_H2N;
3114 uni_txd->pkt_type = MCU_PKT_ID;
3115 uni_txd->seq = seq;
3116
3117 goto exit;
3118 }
3119
3120 mcu_txd = (struct mt76_connac2_mcu_txd *)txd;
3121 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd));
3122 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU,
3123 MT_TX_MCU_PORT_RX_Q0));
3124 mcu_txd->pkt_type = MCU_PKT_ID;
3125 mcu_txd->seq = seq;
3126 mcu_txd->cid = mcu_cmd;
3127 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd);
3128
3129 if (mcu_txd->ext_cid || (cmd & __MCU_CMD_FIELD_CE)) {
3130 if (cmd & __MCU_CMD_FIELD_QUERY)
3131 mcu_txd->set_query = MCU_Q_QUERY;
3132 else
3133 mcu_txd->set_query = MCU_Q_SET;
3134 mcu_txd->ext_cid_ack = !!mcu_txd->ext_cid;
3135 } else {
3136 mcu_txd->set_query = MCU_Q_NA;
3137 }
3138
3139 if (cmd & __MCU_CMD_FIELD_WA)
3140 mcu_txd->s2d_index = MCU_S2D_H2C;
3141 else
3142 mcu_txd->s2d_index = MCU_S2D_H2N;
3143
3144exit:
3145 if (wait_seq)
3146 *wait_seq = seq;
3147
3148 return 0;
3149}
3150EXPORT_SYMBOL_GPL(mt76_connac2_mcu_fill_message);
3151
3152MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
3153MODULE_LICENSE("Dual BSD/GPL");