developer | c9bd9ae | 2022-12-23 16:54:36 +0800 | [diff] [blame] | 1 | diff --git a/drivers/net/phy/mdio-i2c.c b/drivers/net/phy/mdio-i2c.c |
| 2 | index 0746e2c..81c8fe7 100644 |
| 3 | --- a/drivers/net/phy/mdio-i2c.c |
| 4 | +++ b/drivers/net/phy/mdio-i2c.c |
| 5 | @@ -11,6 +11,7 @@ |
| 6 | */ |
| 7 | #include <linux/i2c.h> |
| 8 | #include <linux/phy.h> |
| 9 | +#include <linux/sfp.h> |
| 10 | |
| 11 | #include "mdio-i2c.h" |
| 12 | |
| 13 | @@ -29,7 +30,7 @@ static unsigned int i2c_mii_phy_addr(int phy_id) |
| 14 | return phy_id + 0x40; |
| 15 | } |
| 16 | |
| 17 | -static int i2c_mii_read(struct mii_bus *bus, int phy_id, int reg) |
| 18 | +static int i2c_mii_read_default(struct mii_bus *bus, int phy_id, int reg) |
| 19 | { |
| 20 | struct i2c_adapter *i2c = bus->priv; |
| 21 | struct i2c_msg msgs[2]; |
| 22 | @@ -63,7 +64,8 @@ static int i2c_mii_read(struct mii_bus *bus, int phy_id, int reg) |
| 23 | return data[0] << 8 | data[1]; |
| 24 | } |
| 25 | |
| 26 | -static int i2c_mii_write(struct mii_bus *bus, int phy_id, int reg, u16 val) |
| 27 | +static int i2c_mii_write_default(struct mii_bus *bus, int phy_id, int reg, |
| 28 | + u16 val) |
| 29 | { |
| 30 | struct i2c_adapter *i2c = bus->priv; |
| 31 | struct i2c_msg msg; |
| 32 | @@ -92,9 +94,288 @@ static int i2c_mii_write(struct mii_bus *bus, int phy_id, int reg, u16 val) |
| 33 | return ret < 0 ? ret : 0; |
| 34 | } |
| 35 | |
| 36 | -struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c) |
| 37 | +/* RollBall SFPs do not access internal PHY via I2C address 0x56, but |
| 38 | + * instead via address 0x51, when SFP page is set to 0x03 and password to |
| 39 | + * 0xffffffff. |
| 40 | + * |
| 41 | + * address size contents description |
| 42 | + * ------- ---- -------- ----------- |
| 43 | + * 0x80 1 CMD 0x01/0x02/0x04 for write/read/done |
| 44 | + * 0x81 1 DEV Clause 45 device |
| 45 | + * 0x82 2 REG Clause 45 register |
| 46 | + * 0x84 2 VAL Register value |
| 47 | + */ |
| 48 | +#define ROLLBALL_PHY_I2C_ADDR 0x51 |
| 49 | + |
| 50 | +#define ROLLBALL_PASSWORD (SFP_VSL + 3) |
| 51 | + |
| 52 | +#define ROLLBALL_CMD_ADDR 0x80 |
| 53 | +#define ROLLBALL_DATA_ADDR 0x81 |
| 54 | + |
| 55 | +#define ROLLBALL_CMD_WRITE 0x01 |
| 56 | +#define ROLLBALL_CMD_READ 0x02 |
| 57 | +#define ROLLBALL_CMD_DONE 0x04 |
| 58 | + |
| 59 | +#define SFP_PAGE_ROLLBALL_MDIO 3 |
| 60 | + |
| 61 | +static int __i2c_transfer_err(struct i2c_adapter *i2c, struct i2c_msg *msgs, |
| 62 | + int num) |
| 63 | +{ |
| 64 | + int ret; |
| 65 | + |
| 66 | + ret = __i2c_transfer(i2c, msgs, num); |
| 67 | + if (ret < 0) |
| 68 | + return ret; |
| 69 | + else if (ret != num) |
| 70 | + return -EIO; |
| 71 | + else |
| 72 | + return 0; |
| 73 | +} |
| 74 | + |
| 75 | +static int __i2c_rollball_get_page(struct i2c_adapter *i2c, int bus_addr, |
| 76 | + u8 *page) |
| 77 | +{ |
| 78 | + struct i2c_msg msgs[2]; |
| 79 | + u8 addr = SFP_PAGE; |
| 80 | + |
| 81 | + msgs[0].addr = bus_addr; |
| 82 | + msgs[0].flags = 0; |
| 83 | + msgs[0].len = 1; |
| 84 | + msgs[0].buf = &addr; |
| 85 | + |
| 86 | + msgs[1].addr = bus_addr; |
| 87 | + msgs[1].flags = I2C_M_RD; |
| 88 | + msgs[1].len = 1; |
| 89 | + msgs[1].buf = page; |
| 90 | + |
| 91 | + return __i2c_transfer_err(i2c, msgs, 2); |
| 92 | +} |
| 93 | + |
| 94 | +static int __i2c_rollball_set_page(struct i2c_adapter *i2c, int bus_addr, |
| 95 | + u8 page) |
| 96 | +{ |
| 97 | + struct i2c_msg msg; |
| 98 | + u8 buf[2]; |
| 99 | + |
| 100 | + buf[0] = SFP_PAGE; |
| 101 | + buf[1] = page; |
| 102 | + |
| 103 | + msg.addr = bus_addr; |
| 104 | + msg.flags = 0; |
| 105 | + msg.len = 2; |
| 106 | + msg.buf = buf; |
| 107 | + |
| 108 | + return __i2c_transfer_err(i2c, &msg, 1); |
| 109 | +} |
| 110 | + |
| 111 | +/* In order to not interfere with other SFP code (which possibly may manipulate |
| 112 | + * SFP_PAGE), for every transfer we do this: |
| 113 | + * 1. lock the bus |
| 114 | + * 2. save content of SFP_PAGE |
| 115 | + * 3. set SFP_PAGE to 3 |
| 116 | + * 4. do the transfer |
| 117 | + * 5. restore original SFP_PAGE |
| 118 | + * 6. unlock the bus |
| 119 | + * Note that one might think that steps 2 to 5 could be theoretically done all |
| 120 | + * in one call to i2c_transfer (by constructing msgs array in such a way), but |
| 121 | + * unfortunately tests show that this does not work :-( Changed SFP_PAGE does |
| 122 | + * not take into account until i2c_transfer() is done. |
| 123 | + */ |
| 124 | +static int i2c_transfer_rollball(struct i2c_adapter *i2c, |
| 125 | + struct i2c_msg *msgs, int num) |
| 126 | +{ |
| 127 | + int ret, main_err = 0; |
| 128 | + u8 saved_page; |
| 129 | + |
| 130 | + i2c_lock_bus(i2c, I2C_LOCK_SEGMENT); |
| 131 | + |
| 132 | + /* save original page */ |
| 133 | + ret = __i2c_rollball_get_page(i2c, msgs->addr, &saved_page); |
| 134 | + if (ret) |
| 135 | + goto unlock; |
| 136 | + |
| 137 | + /* change to RollBall MDIO page */ |
| 138 | + ret = __i2c_rollball_set_page(i2c, msgs->addr, SFP_PAGE_ROLLBALL_MDIO); |
| 139 | + if (ret) |
| 140 | + goto unlock; |
| 141 | + |
| 142 | + /* do the transfer; we try to restore original page if this fails */ |
| 143 | + ret = __i2c_transfer_err(i2c, msgs, num); |
| 144 | + if (ret) |
| 145 | + main_err = ret; |
| 146 | + |
| 147 | + /* restore original page */ |
| 148 | + ret = __i2c_rollball_set_page(i2c, msgs->addr, saved_page); |
| 149 | + |
| 150 | +unlock: |
| 151 | + i2c_unlock_bus(i2c, I2C_LOCK_SEGMENT); |
| 152 | + |
| 153 | + return main_err ? : ret; |
| 154 | +} |
| 155 | + |
| 156 | +static int i2c_rollball_mii_poll(struct mii_bus *bus, int bus_addr, u8 *buf, |
| 157 | + size_t len) |
| 158 | +{ |
| 159 | + struct i2c_adapter *i2c = bus->priv; |
| 160 | + struct i2c_msg msgs[2]; |
| 161 | + u8 cmd_addr, tmp, *res; |
| 162 | + int i, ret; |
| 163 | + |
| 164 | + cmd_addr = ROLLBALL_CMD_ADDR; |
| 165 | + |
| 166 | + res = buf ? buf : &tmp; |
| 167 | + len = buf ? len : 1; |
| 168 | + |
| 169 | + msgs[0].addr = bus_addr; |
| 170 | + msgs[0].flags = 0; |
| 171 | + msgs[0].len = 1; |
| 172 | + msgs[0].buf = &cmd_addr; |
| 173 | + |
| 174 | + msgs[1].addr = bus_addr; |
| 175 | + msgs[1].flags = I2C_M_RD; |
| 176 | + msgs[1].len = len; |
| 177 | + msgs[1].buf = res; |
| 178 | + |
| 179 | + /* By experiment it takes up to 70 ms to access a register for these |
| 180 | + * SFPs. Sleep 20ms between iterations and try 10 times. |
| 181 | + */ |
| 182 | + i = 10; |
| 183 | + do { |
| 184 | + msleep(20); |
| 185 | + |
| 186 | + ret = i2c_transfer_rollball(i2c, msgs, ARRAY_SIZE(msgs)); |
| 187 | + if (ret) |
| 188 | + return ret; |
| 189 | + |
| 190 | + if (*res == ROLLBALL_CMD_DONE) |
| 191 | + return 0; |
| 192 | + } while (i-- > 0); |
| 193 | + |
| 194 | + dev_info(&bus->dev, "poll timed out\n"); |
| 195 | + |
| 196 | + return -ETIMEDOUT; |
| 197 | +} |
| 198 | + |
| 199 | +static int i2c_rollball_mii_cmd(struct mii_bus *bus, int bus_addr, u8 cmd, |
| 200 | + u8 *data, size_t len) |
| 201 | +{ |
| 202 | + struct i2c_adapter *i2c = bus->priv; |
| 203 | + struct i2c_msg msgs[2]; |
| 204 | + u8 cmdbuf[2]; |
| 205 | + |
| 206 | + cmdbuf[0] = ROLLBALL_CMD_ADDR; |
| 207 | + cmdbuf[1] = cmd; |
| 208 | + |
| 209 | + msgs[0].addr = bus_addr; |
| 210 | + msgs[0].flags = 0; |
| 211 | + msgs[0].len = len; |
| 212 | + msgs[0].buf = data; |
| 213 | + |
| 214 | + msgs[1].addr = bus_addr; |
| 215 | + msgs[1].flags = 0; |
| 216 | + msgs[1].len = sizeof(cmdbuf); |
| 217 | + msgs[1].buf = cmdbuf; |
| 218 | + |
| 219 | + return i2c_transfer_rollball(i2c, msgs, ARRAY_SIZE(msgs)); |
| 220 | +} |
| 221 | + |
| 222 | +static int i2c_mii_read_rollball(struct mii_bus *bus, int phy_id, int reg) |
| 223 | +{ |
| 224 | + u8 buf[4], res[6]; |
| 225 | + int bus_addr, ret; |
| 226 | + u16 val; |
| 227 | + |
| 228 | + if (!(reg & MII_ADDR_C45)) |
| 229 | + return -EOPNOTSUPP; |
| 230 | + |
| 231 | + bus_addr = i2c_mii_phy_addr(phy_id); |
| 232 | + if (bus_addr != ROLLBALL_PHY_I2C_ADDR) |
| 233 | + return 0xffff; |
| 234 | + |
| 235 | + buf[0] = ROLLBALL_DATA_ADDR; |
| 236 | + buf[1] = (reg >> 16) & 0x1f; |
| 237 | + buf[2] = (reg >> 8) & 0xff; |
| 238 | + buf[3] = reg & 0xff; |
| 239 | + |
| 240 | + ret = i2c_rollball_mii_cmd(bus, bus_addr, ROLLBALL_CMD_READ, buf, |
| 241 | + sizeof(buf)); |
| 242 | + if (ret < 0) |
| 243 | + return ret; |
| 244 | + |
| 245 | + ret = i2c_rollball_mii_poll(bus, bus_addr, res, sizeof(res)); |
| 246 | + if (ret == -ETIMEDOUT) |
| 247 | + return 0xffff; |
| 248 | + else if (ret < 0) |
| 249 | + return ret; |
| 250 | + |
| 251 | + val = res[4] << 8 | res[5]; |
| 252 | + |
| 253 | + return val; |
| 254 | +} |
| 255 | + |
| 256 | +static int i2c_mii_write_rollball(struct mii_bus *bus, int phy_id, int reg, |
| 257 | + u16 val) |
| 258 | +{ |
| 259 | + int bus_addr, ret; |
| 260 | + u8 buf[6]; |
| 261 | + |
| 262 | + if (!(reg & MII_ADDR_C45)) |
| 263 | + return -EOPNOTSUPP; |
| 264 | + |
| 265 | + bus_addr = i2c_mii_phy_addr(phy_id); |
| 266 | + if (bus_addr != ROLLBALL_PHY_I2C_ADDR) |
| 267 | + return 0; |
| 268 | + |
| 269 | + buf[0] = ROLLBALL_DATA_ADDR; |
| 270 | + buf[1] = (reg >> 16) & 0x1f; |
| 271 | + buf[2] = (reg >> 8) & 0xff; |
| 272 | + buf[3] = reg & 0xff; |
| 273 | + buf[4] = val >> 8; |
| 274 | + buf[5] = val & 0xff; |
| 275 | + |
| 276 | + ret = i2c_rollball_mii_cmd(bus, bus_addr, ROLLBALL_CMD_WRITE, buf, |
| 277 | + sizeof(buf)); |
| 278 | + if (ret < 0) |
| 279 | + return ret; |
| 280 | + |
| 281 | + ret = i2c_rollball_mii_poll(bus, bus_addr, NULL, 0); |
| 282 | + if (ret < 0) |
| 283 | + return ret; |
| 284 | + |
| 285 | + return 0; |
| 286 | +} |
| 287 | + |
| 288 | +static int i2c_mii_init_rollball(struct i2c_adapter *i2c) |
| 289 | +{ |
| 290 | + struct i2c_msg msg; |
| 291 | + u8 pw[5]; |
| 292 | + int ret; |
| 293 | + |
| 294 | + pw[0] = ROLLBALL_PASSWORD; |
| 295 | + pw[1] = 0xff; |
| 296 | + pw[2] = 0xff; |
| 297 | + pw[3] = 0xff; |
| 298 | + pw[4] = 0xff; |
| 299 | + |
| 300 | + msg.addr = ROLLBALL_PHY_I2C_ADDR; |
| 301 | + msg.flags = 0; |
| 302 | + msg.len = sizeof(pw); |
| 303 | + msg.buf = pw; |
| 304 | + |
| 305 | + ret = i2c_transfer(i2c, &msg, 1); |
| 306 | + if (ret < 0) |
| 307 | + return ret; |
| 308 | + else if (ret != 1) |
| 309 | + return -EIO; |
| 310 | + else |
| 311 | + return 0; |
| 312 | +} |
| 313 | + |
| 314 | +struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c, |
| 315 | + enum mdio_i2c_proto protocol) |
| 316 | { |
| 317 | struct mii_bus *mii; |
| 318 | + int ret; |
| 319 | |
| 320 | if (!i2c_check_functionality(i2c, I2C_FUNC_I2C)) |
| 321 | return ERR_PTR(-EINVAL); |
| 322 | @@ -105,10 +386,28 @@ struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c) |
| 323 | |
| 324 | snprintf(mii->id, MII_BUS_ID_SIZE, "i2c:%s", dev_name(parent)); |
| 325 | mii->parent = parent; |
| 326 | - mii->read = i2c_mii_read; |
| 327 | - mii->write = i2c_mii_write; |
| 328 | mii->priv = i2c; |
| 329 | |
| 330 | + switch (protocol) { |
| 331 | + case MDIO_I2C_ROLLBALL: |
| 332 | + ret = i2c_mii_init_rollball(i2c); |
| 333 | + if (ret < 0) { |
| 334 | + dev_err(parent, |
| 335 | + "Cannot initialize RollBall MDIO I2C protocol: %d\n", |
| 336 | + ret); |
| 337 | + mdiobus_free(mii); |
| 338 | + return ERR_PTR(ret); |
| 339 | + } |
| 340 | + |
| 341 | + mii->read = i2c_mii_read_rollball; |
| 342 | + mii->write = i2c_mii_write_rollball; |
| 343 | + break; |
| 344 | + default: |
| 345 | + mii->read = i2c_mii_read_default; |
| 346 | + mii->write = i2c_mii_write_default; |
| 347 | + break; |
| 348 | + } |
| 349 | + |
| 350 | return mii; |
| 351 | } |
| 352 | EXPORT_SYMBOL_GPL(mdio_i2c_alloc); |
developer | 9a8b5e3 | 2023-02-21 12:01:56 +0800 | [diff] [blame] | 353 | diff --git a/include/linux/mdio/mdio-i2c.h b/include/linux/mdio/mdio-i2c.h |
| 354 | index 751dab2..1c21140 100644 |
developer | 45b0064 | 2023-02-20 10:32:20 +0800 | [diff] [blame] | 355 | --- a/include/linux/mdio/mdio-i2c.h |
| 356 | +++ b/include/linux/mdio/mdio-i2c.h |
developer | c9bd9ae | 2022-12-23 16:54:36 +0800 | [diff] [blame] | 357 | @@ -11,6 +11,14 @@ struct device; |
| 358 | struct i2c_adapter; |
| 359 | struct mii_bus; |
| 360 | |
| 361 | -struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c); |
| 362 | +enum mdio_i2c_proto { |
| 363 | + MDIO_I2C_NONE, |
| 364 | + MDIO_I2C_MARVELL_C22, |
| 365 | + MDIO_I2C_C45, |
| 366 | + MDIO_I2C_ROLLBALL, |
| 367 | +}; |
| 368 | + |
| 369 | +struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c, |
| 370 | + enum mdio_i2c_proto protocol); |
| 371 | |
| 372 | #endif |
| 373 | diff --git a/drivers/net/phy/sfp-bus.c b/drivers/net/phy/sfp-bus.c |
| 374 | index 42f0441..0d5ac2a 100644 |
| 375 | --- a/drivers/net/phy/sfp-bus.c |
| 376 | +++ b/drivers/net/phy/sfp-bus.c |
| 377 | @@ -10,12 +10,6 @@ |
| 378 | |
| 379 | #include "sfp.h" |
| 380 | |
| 381 | -struct sfp_quirk { |
| 382 | - const char *vendor; |
| 383 | - const char *part; |
| 384 | - void (*modes)(const struct sfp_eeprom_id *id, unsigned long *modes); |
| 385 | -}; |
| 386 | - |
| 387 | /** |
| 388 | * struct sfp_bus - internal representation of a sfp bus |
| 389 | */ |
| 390 | @@ -38,87 +32,6 @@ struct sfp_bus { |
| 391 | bool started; |
| 392 | }; |
| 393 | |
| 394 | -static void sfp_quirk_2500basex(const struct sfp_eeprom_id *id, |
| 395 | - unsigned long *modes) |
| 396 | -{ |
| 397 | - phylink_set(modes, 2500baseX_Full); |
| 398 | -} |
| 399 | - |
| 400 | -static void sfp_quirk_ubnt_uf_instant(const struct sfp_eeprom_id *id, |
| 401 | - unsigned long *modes) |
| 402 | -{ |
| 403 | - /* Ubiquiti U-Fiber Instant module claims that support all transceiver |
| 404 | - * types including 10G Ethernet which is not truth. So clear all claimed |
| 405 | - * modes and set only one mode which module supports: 1000baseX_Full. |
| 406 | - */ |
| 407 | - phylink_zero(modes); |
| 408 | - phylink_set(modes, 1000baseX_Full); |
| 409 | -} |
| 410 | - |
| 411 | -static const struct sfp_quirk sfp_quirks[] = { |
| 412 | - { |
| 413 | - // Alcatel Lucent G-010S-P can operate at 2500base-X, but |
| 414 | - // incorrectly report 2500MBd NRZ in their EEPROM |
| 415 | - .vendor = "ALCATELLUCENT", |
| 416 | - .part = "G010SP", |
| 417 | - .modes = sfp_quirk_2500basex, |
| 418 | - }, { |
| 419 | - // Alcatel Lucent G-010S-A can operate at 2500base-X, but |
| 420 | - // report 3.2GBd NRZ in their EEPROM |
| 421 | - .vendor = "ALCATELLUCENT", |
| 422 | - .part = "3FE46541AA", |
| 423 | - .modes = sfp_quirk_2500basex, |
| 424 | - }, { |
| 425 | - // Huawei MA5671A can operate at 2500base-X, but report 1.2GBd |
| 426 | - // NRZ in their EEPROM |
| 427 | - .vendor = "HUAWEI", |
| 428 | - .part = "MA5671A", |
| 429 | - .modes = sfp_quirk_2500basex, |
| 430 | - }, { |
| 431 | - .vendor = "UBNT", |
| 432 | - .part = "UF-INSTANT", |
| 433 | - .modes = sfp_quirk_ubnt_uf_instant, |
| 434 | - }, |
| 435 | -}; |
| 436 | - |
| 437 | -static size_t sfp_strlen(const char *str, size_t maxlen) |
| 438 | -{ |
| 439 | - size_t size, i; |
| 440 | - |
| 441 | - /* Trailing characters should be filled with space chars */ |
| 442 | - for (i = 0, size = 0; i < maxlen; i++) |
| 443 | - if (str[i] != ' ') |
| 444 | - size = i + 1; |
| 445 | - |
| 446 | - return size; |
| 447 | -} |
| 448 | - |
| 449 | -static bool sfp_match(const char *qs, const char *str, size_t len) |
| 450 | -{ |
| 451 | - if (!qs) |
| 452 | - return true; |
| 453 | - if (strlen(qs) != len) |
| 454 | - return false; |
| 455 | - return !strncmp(qs, str, len); |
| 456 | -} |
| 457 | - |
| 458 | -static const struct sfp_quirk *sfp_lookup_quirk(const struct sfp_eeprom_id *id) |
| 459 | -{ |
| 460 | - const struct sfp_quirk *q; |
| 461 | - unsigned int i; |
| 462 | - size_t vs, ps; |
| 463 | - |
| 464 | - vs = sfp_strlen(id->base.vendor_name, ARRAY_SIZE(id->base.vendor_name)); |
| 465 | - ps = sfp_strlen(id->base.vendor_pn, ARRAY_SIZE(id->base.vendor_pn)); |
| 466 | - |
| 467 | - for (i = 0, q = sfp_quirks; i < ARRAY_SIZE(sfp_quirks); i++, q++) |
| 468 | - if (sfp_match(q->vendor, id->base.vendor_name, vs) && |
| 469 | - sfp_match(q->part, id->base.vendor_pn, ps)) |
| 470 | - return q; |
| 471 | - |
| 472 | - return NULL; |
| 473 | -} |
| 474 | - |
| 475 | /** |
| 476 | * sfp_parse_port() - Parse the EEPROM base ID, setting the port type |
| 477 | * @bus: a pointer to the &struct sfp_bus structure for the sfp module |
| 478 | @@ -359,7 +272,7 @@ void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id, |
| 479 | phylink_set(modes, 1000baseX_Full); |
| 480 | } |
| 481 | |
| 482 | - if (bus->sfp_quirk) |
| 483 | + if (bus->sfp_quirk && bus->sfp_quirk->modes) |
| 484 | bus->sfp_quirk->modes(id, modes); |
| 485 | |
| 486 | bitmap_or(support, support, modes, __ETHTOOL_LINK_MODE_MASK_NBITS); |
| 487 | @@ -734,12 +647,13 @@ void sfp_link_down(struct sfp_bus *bus) |
| 488 | } |
| 489 | EXPORT_SYMBOL_GPL(sfp_link_down); |
| 490 | |
| 491 | -int sfp_module_insert(struct sfp_bus *bus, const struct sfp_eeprom_id *id) |
| 492 | +int sfp_module_insert(struct sfp_bus *bus, const struct sfp_eeprom_id *id, |
| 493 | + const struct sfp_quirk *quirk) |
| 494 | { |
| 495 | const struct sfp_upstream_ops *ops = sfp_get_upstream_ops(bus); |
| 496 | int ret = 0; |
| 497 | |
| 498 | - bus->sfp_quirk = sfp_lookup_quirk(id); |
| 499 | + bus->sfp_quirk = quirk; |
| 500 | |
| 501 | if (ops && ops->module_insert) |
| 502 | ret = ops->module_insert(bus->upstream, id); |
| 503 | diff --git a/drivers/net/phy/sfp.c b/drivers/net/phy/sfp.c |
| 504 | index 3253366..8d95f49 100644 |
| 505 | --- a/drivers/net/phy/sfp.c |
| 506 | +++ b/drivers/net/phy/sfp.c |
| 507 | @@ -165,6 +165,7 @@ static const enum gpiod_flags gpio_flags[] = { |
| 508 | * on board (for a copper SFP) time to initialise. |
| 509 | */ |
| 510 | #define T_WAIT msecs_to_jiffies(50) |
| 511 | +#define T_WAIT_ROLLBALL msecs_to_jiffies(25000) |
| 512 | #define T_START_UP msecs_to_jiffies(300) |
| 513 | #define T_START_UP_BAD_GPON msecs_to_jiffies(60000) |
| 514 | |
| 515 | @@ -204,8 +205,11 @@ static const enum gpiod_flags gpio_flags[] = { |
| 516 | |
| 517 | /* SFP modules appear to always have their PHY configured for bus address |
| 518 | * 0x56 (which with mdio-i2c, translates to a PHY address of 22). |
| 519 | + * RollBall SFPs access phy via SFP Enhanced Digital Diagnostic Interface |
| 520 | + * via address 0x51 (mdio-i2c will use RollBall protocol on this address). |
| 521 | */ |
| 522 | -#define SFP_PHY_ADDR 22 |
| 523 | +#define SFP_PHY_ADDR 22 |
| 524 | +#define SFP_PHY_ADDR_ROLLBALL 17 |
| 525 | |
| 526 | struct sff_data { |
| 527 | unsigned int gpios; |
| 528 | @@ -217,6 +221,7 @@ struct sfp { |
| 529 | struct i2c_adapter *i2c; |
| 530 | struct mii_bus *i2c_mii; |
| 531 | struct sfp_bus *sfp_bus; |
| 532 | + enum mdio_i2c_proto mdio_protocol; |
| 533 | struct phy_device *mod_phy; |
| 534 | const struct sff_data *type; |
| 535 | size_t i2c_block_size; |
| 536 | @@ -233,6 +238,7 @@ struct sfp { |
| 537 | bool need_poll; |
| 538 | |
| 539 | struct mutex st_mutex; /* Protects state */ |
| 540 | + unsigned int state_hw_mask; |
| 541 | unsigned int state_soft_mask; |
| 542 | unsigned int state; |
| 543 | struct delayed_work poll; |
| 544 | @@ -249,6 +255,10 @@ struct sfp { |
| 545 | struct sfp_eeprom_id id; |
| 546 | unsigned int module_power_mW; |
| 547 | unsigned int module_t_start_up; |
| 548 | + unsigned int module_t_wait; |
| 549 | + bool tx_fault_ignore; |
| 550 | + |
| 551 | + const struct sfp_quirk *quirk; |
| 552 | |
| 553 | #if IS_ENABLED(CONFIG_HWMON) |
| 554 | struct sfp_diag diag; |
| 555 | @@ -303,6 +313,135 @@ static const struct of_device_id sfp_of_match[] = { |
| 556 | }; |
| 557 | MODULE_DEVICE_TABLE(of, sfp_of_match); |
| 558 | |
| 559 | +static void sfp_fixup_long_startup(struct sfp *sfp) |
| 560 | +{ |
| 561 | + sfp->module_t_start_up = T_START_UP_BAD_GPON; |
| 562 | +} |
| 563 | + |
| 564 | +static void sfp_fixup_ignore_tx_fault(struct sfp *sfp) |
| 565 | +{ |
| 566 | + sfp->tx_fault_ignore = true; |
| 567 | +} |
| 568 | + |
| 569 | +static void sfp_fixup_halny_gsfp(struct sfp *sfp) |
| 570 | +{ |
| 571 | + /* Ignore the TX_FAULT and LOS signals on this module. |
| 572 | + * these are possibly used for other purposes on this |
| 573 | + * module, e.g. a serial port. |
| 574 | + */ |
| 575 | + sfp->state_hw_mask &= ~(SFP_F_TX_FAULT | SFP_F_LOS); |
| 576 | +} |
| 577 | + |
| 578 | +static void sfp_fixup_rollball(struct sfp *sfp) |
| 579 | +{ |
| 580 | + sfp->mdio_protocol = MDIO_I2C_ROLLBALL; |
| 581 | + sfp->module_t_wait = T_WAIT_ROLLBALL; |
| 582 | +} |
| 583 | + |
| 584 | +static void sfp_fixup_rollball_cc(struct sfp *sfp) |
| 585 | +{ |
| 586 | + sfp_fixup_rollball(sfp); |
| 587 | + |
| 588 | + /* Some RollBall SFPs may have wrong (zero) extended compliance code |
| 589 | + * burned in EEPROM. For PHY probing we need the correct one. |
| 590 | + */ |
| 591 | + sfp->id.base.extended_cc = SFF8024_ECC_10GBASE_T_SFI; |
| 592 | +} |
| 593 | + |
| 594 | +static void sfp_quirk_2500basex(const struct sfp_eeprom_id *id, |
| 595 | + unsigned long *modes) |
| 596 | +{ |
| 597 | + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, modes); |
| 598 | +} |
| 599 | + |
| 600 | +static void sfp_quirk_ubnt_uf_instant(const struct sfp_eeprom_id *id, |
| 601 | + unsigned long *modes) |
| 602 | +{ |
| 603 | + /* Ubiquiti U-Fiber Instant module claims that support all transceiver |
| 604 | + * types including 10G Ethernet which is not truth. So clear all claimed |
| 605 | + * modes and set only one mode which module supports: 1000baseX_Full. |
| 606 | + */ |
| 607 | + linkmode_zero(modes); |
| 608 | + linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, modes); |
| 609 | +} |
| 610 | + |
| 611 | +#define SFP_QUIRK(_v, _p, _m, _f) \ |
| 612 | + { .vendor = _v, .part = _p, .modes = _m, .fixup = _f, } |
| 613 | +#define SFP_QUIRK_M(_v, _p, _m) SFP_QUIRK(_v, _p, _m, NULL) |
| 614 | +#define SFP_QUIRK_F(_v, _p, _f) SFP_QUIRK(_v, _p, NULL, _f) |
| 615 | + |
| 616 | +static const struct sfp_quirk sfp_quirks[] = { |
| 617 | + // Alcatel Lucent G-010S-P can operate at 2500base-X, but incorrectly |
| 618 | + // report 2500MBd NRZ in their EEPROM |
| 619 | + SFP_QUIRK_M("ALCATELLUCENT", "G010SP", sfp_quirk_2500basex), |
| 620 | + |
| 621 | + // Alcatel Lucent G-010S-A can operate at 2500base-X, but report 3.2GBd |
| 622 | + // NRZ in their EEPROM |
| 623 | + SFP_QUIRK("ALCATELLUCENT", "3FE46541AA", sfp_quirk_2500basex, |
| 624 | + sfp_fixup_long_startup), |
| 625 | + |
| 626 | + SFP_QUIRK_F("HALNy", "HL-GSFP", sfp_fixup_halny_gsfp), |
| 627 | + |
| 628 | + // Huawei MA5671A can operate at 2500base-X, but report 1.2GBd NRZ in |
| 629 | + // their EEPROM |
| 630 | + SFP_QUIRK("HUAWEI", "MA5671A", sfp_quirk_2500basex, |
| 631 | + sfp_fixup_ignore_tx_fault), |
| 632 | + |
| 633 | + // Lantech 8330-262D-E can operate at 2500base-X, but incorrectly report |
| 634 | + // 2500MBd NRZ in their EEPROM |
| 635 | + SFP_QUIRK_M("Lantech", "8330-262D-E", sfp_quirk_2500basex), |
| 636 | + |
| 637 | + SFP_QUIRK_M("UBNT", "UF-INSTANT", sfp_quirk_ubnt_uf_instant), |
| 638 | + |
| 639 | + SFP_QUIRK_F("OEM", "SFP-10G-T", sfp_fixup_rollball_cc), |
| 640 | + SFP_QUIRK_F("OEM", "RTSFP-10", sfp_fixup_rollball_cc), |
| 641 | + SFP_QUIRK_F("OEM", "RTSFP-10G", sfp_fixup_rollball_cc), |
| 642 | + SFP_QUIRK_F("OEM", "TNBYV02-C0X-C3", sfp_fixup_rollball_cc), |
| 643 | + SFP_QUIRK_F("Turris", "RTSFP-10", sfp_fixup_rollball), |
| 644 | + SFP_QUIRK_F("Turris", "RTSFP-10G", sfp_fixup_rollball), |
| 645 | + SFP_QUIRK_F("JESS-LINK", "P60000BBC001-1", sfp_fixup_rollball), |
| 646 | +}; |
| 647 | + |
| 648 | +static size_t sfp_strlen(const char *str, size_t maxlen) |
| 649 | +{ |
| 650 | + size_t size, i; |
| 651 | + |
| 652 | + /* Trailing characters should be filled with space chars, but |
| 653 | + * some manufacturers can't read SFF-8472 and use NUL. |
| 654 | + */ |
| 655 | + for (i = 0, size = 0; i < maxlen; i++) |
| 656 | + if (str[i] != ' ' && str[i] != '\0') |
| 657 | + size = i + 1; |
| 658 | + |
| 659 | + return size; |
| 660 | +} |
| 661 | + |
| 662 | +static bool sfp_match(const char *qs, const char *str, size_t len) |
| 663 | +{ |
| 664 | + if (!qs) |
| 665 | + return true; |
| 666 | + if (strlen(qs) != len) |
| 667 | + return false; |
| 668 | + return !strncmp(qs, str, len); |
| 669 | +} |
| 670 | + |
| 671 | +static const struct sfp_quirk *sfp_lookup_quirk(const struct sfp_eeprom_id *id) |
| 672 | +{ |
| 673 | + const struct sfp_quirk *q; |
| 674 | + unsigned int i; |
| 675 | + size_t vs, ps; |
| 676 | + |
| 677 | + vs = sfp_strlen(id->base.vendor_name, ARRAY_SIZE(id->base.vendor_name)); |
| 678 | + ps = sfp_strlen(id->base.vendor_pn, ARRAY_SIZE(id->base.vendor_pn)); |
| 679 | + |
| 680 | + for (i = 0, q = sfp_quirks; i < ARRAY_SIZE(sfp_quirks); i++, q++) |
| 681 | + if (sfp_match(q->vendor, id->base.vendor_name, vs) && |
| 682 | + sfp_match(q->part, id->base.vendor_pn, ps)) |
| 683 | + return q; |
| 684 | + |
| 685 | + return NULL; |
| 686 | +} |
| 687 | + |
| 688 | static unsigned long poll_jiffies; |
| 689 | |
| 690 | static unsigned int sfp_gpio_get_state(struct sfp *sfp) |
| 691 | @@ -414,9 +553,6 @@ static int sfp_i2c_write(struct sfp *sfp, bool a2, u8 dev_addr, void *buf, |
| 692 | |
| 693 | static int sfp_i2c_configure(struct sfp *sfp, struct i2c_adapter *i2c) |
| 694 | { |
| 695 | - struct mii_bus *i2c_mii; |
| 696 | - int ret; |
| 697 | - |
| 698 | if (!i2c_check_functionality(i2c, I2C_FUNC_I2C)) |
| 699 | return -EINVAL; |
| 700 | |
| 701 | @@ -424,7 +560,15 @@ static int sfp_i2c_configure(struct sfp *sfp, struct i2c_adapter *i2c) |
| 702 | sfp->read = sfp_i2c_read; |
| 703 | sfp->write = sfp_i2c_write; |
| 704 | |
| 705 | - i2c_mii = mdio_i2c_alloc(sfp->dev, i2c); |
| 706 | + return 0; |
| 707 | +} |
| 708 | + |
| 709 | +static int sfp_i2c_mdiobus_create(struct sfp *sfp) |
| 710 | +{ |
| 711 | + struct mii_bus *i2c_mii; |
| 712 | + int ret; |
| 713 | + |
| 714 | + i2c_mii = mdio_i2c_alloc(sfp->dev, sfp->i2c, sfp->mdio_protocol); |
| 715 | if (IS_ERR(i2c_mii)) |
| 716 | return PTR_ERR(i2c_mii); |
| 717 | |
| 718 | @@ -442,6 +586,12 @@ static int sfp_i2c_configure(struct sfp *sfp, struct i2c_adapter *i2c) |
| 719 | return 0; |
| 720 | } |
| 721 | |
| 722 | +static void sfp_i2c_mdiobus_destroy(struct sfp *sfp) |
| 723 | +{ |
| 724 | + mdiobus_unregister(sfp->i2c_mii); |
| 725 | + sfp->i2c_mii = NULL; |
| 726 | +} |
| 727 | + |
| 728 | /* Interface */ |
| 729 | static int sfp_read(struct sfp *sfp, bool a2, u8 addr, void *buf, size_t len) |
| 730 | { |
| 731 | @@ -487,17 +637,18 @@ static void sfp_soft_set_state(struct sfp *sfp, unsigned int state) |
| 732 | static void sfp_soft_start_poll(struct sfp *sfp) |
| 733 | { |
| 734 | const struct sfp_eeprom_id *id = &sfp->id; |
| 735 | + unsigned int mask = 0; |
| 736 | |
| 737 | sfp->state_soft_mask = 0; |
| 738 | - if (id->ext.enhopts & SFP_ENHOPTS_SOFT_TX_DISABLE && |
| 739 | - !sfp->gpio[GPIO_TX_DISABLE]) |
| 740 | - sfp->state_soft_mask |= SFP_F_TX_DISABLE; |
| 741 | - if (id->ext.enhopts & SFP_ENHOPTS_SOFT_TX_FAULT && |
| 742 | - !sfp->gpio[GPIO_TX_FAULT]) |
| 743 | - sfp->state_soft_mask |= SFP_F_TX_FAULT; |
| 744 | - if (id->ext.enhopts & SFP_ENHOPTS_SOFT_RX_LOS && |
| 745 | - !sfp->gpio[GPIO_LOS]) |
| 746 | - sfp->state_soft_mask |= SFP_F_LOS; |
| 747 | + if (id->ext.enhopts & SFP_ENHOPTS_SOFT_TX_DISABLE) |
| 748 | + mask |= SFP_F_TX_DISABLE; |
| 749 | + if (id->ext.enhopts & SFP_ENHOPTS_SOFT_TX_FAULT) |
| 750 | + mask |= SFP_F_TX_FAULT; |
| 751 | + if (id->ext.enhopts & SFP_ENHOPTS_SOFT_RX_LOS) |
| 752 | + mask |= SFP_F_LOS; |
| 753 | + |
| 754 | + // Poll the soft state for hardware pins we want to ignore |
| 755 | + sfp->state_soft_mask = ~sfp->state_hw_mask & mask; |
| 756 | |
| 757 | if (sfp->state_soft_mask & (SFP_F_LOS | SFP_F_TX_FAULT) && |
| 758 | !sfp->need_poll) |
| 759 | @@ -511,10 +662,11 @@ static void sfp_soft_stop_poll(struct sfp *sfp) |
| 760 | |
| 761 | static unsigned int sfp_get_state(struct sfp *sfp) |
| 762 | { |
| 763 | - unsigned int state = sfp->get_state(sfp); |
| 764 | + unsigned int soft = sfp->state_soft_mask & (SFP_F_LOS | SFP_F_TX_FAULT); |
| 765 | + unsigned int state; |
| 766 | |
| 767 | - if (state & SFP_F_PRESENT && |
| 768 | - sfp->state_soft_mask & (SFP_F_LOS | SFP_F_TX_FAULT)) |
| 769 | + state = sfp->get_state(sfp) & sfp->state_hw_mask; |
| 770 | + if (state & SFP_F_PRESENT && soft) |
| 771 | state |= sfp_soft_get_state(sfp); |
| 772 | |
| 773 | return state; |
| 774 | @@ -1448,12 +1600,12 @@ static void sfp_sm_phy_detach(struct sfp *sfp) |
| 775 | sfp->mod_phy = NULL; |
| 776 | } |
| 777 | |
| 778 | -static int sfp_sm_probe_phy(struct sfp *sfp, bool is_c45) |
| 779 | +static int sfp_sm_probe_phy(struct sfp *sfp, int addr, bool is_c45) |
| 780 | { |
| 781 | struct phy_device *phy; |
| 782 | int err; |
| 783 | |
| 784 | - phy = get_phy_device(sfp->i2c_mii, SFP_PHY_ADDR, is_c45); |
| 785 | + phy = get_phy_device(sfp->i2c_mii, addr, is_c45); |
| 786 | if (phy == ERR_PTR(-ENODEV)) |
| 787 | return PTR_ERR(phy); |
| 788 | if (IS_ERR(phy)) { |
| 789 | @@ -1548,6 +1700,14 @@ static void sfp_sm_fault(struct sfp *sfp, unsigned int next_state, bool warn) |
| 790 | } |
| 791 | } |
| 792 | |
| 793 | +static int sfp_sm_add_mdio_bus(struct sfp *sfp) |
| 794 | +{ |
| 795 | + if (sfp->mdio_protocol != MDIO_I2C_NONE) |
| 796 | + return sfp_i2c_mdiobus_create(sfp); |
| 797 | + |
| 798 | + return 0; |
| 799 | +} |
| 800 | + |
| 801 | /* Probe a SFP for a PHY device if the module supports copper - the PHY |
| 802 | * normally sits at I2C bus address 0x56, and may either be a clause 22 |
| 803 | * or clause 45 PHY. |
| 804 | @@ -1563,19 +1723,23 @@ static int sfp_sm_probe_for_phy(struct sfp *sfp) |
| 805 | { |
| 806 | int err = 0; |
| 807 | |
| 808 | - switch (sfp->id.base.extended_cc) { |
| 809 | - case SFF8024_ECC_10GBASE_T_SFI: |
| 810 | - case SFF8024_ECC_10GBASE_T_SR: |
| 811 | - case SFF8024_ECC_5GBASE_T: |
| 812 | - case SFF8024_ECC_2_5GBASE_T: |
| 813 | - err = sfp_sm_probe_phy(sfp, true); |
| 814 | + switch (sfp->mdio_protocol) { |
| 815 | + case MDIO_I2C_NONE: |
| 816 | break; |
| 817 | |
| 818 | - default: |
| 819 | - if (sfp->id.base.e1000_base_t) |
| 820 | - err = sfp_sm_probe_phy(sfp, false); |
| 821 | + case MDIO_I2C_MARVELL_C22: |
| 822 | + err = sfp_sm_probe_phy(sfp, SFP_PHY_ADDR, false); |
| 823 | + break; |
| 824 | + |
| 825 | + case MDIO_I2C_C45: |
| 826 | + err = sfp_sm_probe_phy(sfp, SFP_PHY_ADDR, true); |
| 827 | + break; |
| 828 | + |
| 829 | + case MDIO_I2C_ROLLBALL: |
| 830 | + err = sfp_sm_probe_phy(sfp, SFP_PHY_ADDR_ROLLBALL, true); |
| 831 | break; |
| 832 | } |
| 833 | + |
| 834 | return err; |
| 835 | } |
| 836 | |
| 837 | @@ -1819,11 +1983,33 @@ static int sfp_sm_mod_probe(struct sfp *sfp, bool report) |
| 838 | if (ret < 0) |
| 839 | return ret; |
| 840 | |
| 841 | - if (!memcmp(id.base.vendor_name, "ALCATELLUCENT ", 16) && |
| 842 | - !memcmp(id.base.vendor_pn, "3FE46541AA ", 16)) |
| 843 | - sfp->module_t_start_up = T_START_UP_BAD_GPON; |
| 844 | + /* Initialise state bits to use from hardware */ |
| 845 | + sfp->state_hw_mask = SFP_F_PRESENT; |
| 846 | + if (sfp->gpio[GPIO_TX_DISABLE]) |
| 847 | + sfp->state_hw_mask |= SFP_F_TX_DISABLE; |
| 848 | + if (sfp->gpio[GPIO_TX_FAULT]) |
| 849 | + sfp->state_hw_mask |= SFP_F_TX_FAULT; |
| 850 | + if (sfp->gpio[GPIO_LOS]) |
| 851 | + sfp->state_hw_mask |= SFP_F_LOS; |
| 852 | + |
| 853 | + sfp->module_t_start_up = T_START_UP; |
| 854 | + sfp->module_t_wait = T_WAIT; |
| 855 | + |
| 856 | + sfp->tx_fault_ignore = false; |
| 857 | + |
| 858 | + if (sfp->id.base.extended_cc == SFF8024_ECC_10GBASE_T_SFI || |
| 859 | + sfp->id.base.extended_cc == SFF8024_ECC_10GBASE_T_SR || |
| 860 | + sfp->id.base.extended_cc == SFF8024_ECC_5GBASE_T || |
| 861 | + sfp->id.base.extended_cc == SFF8024_ECC_2_5GBASE_T) |
| 862 | + sfp->mdio_protocol = MDIO_I2C_C45; |
| 863 | + else if (sfp->id.base.e1000_base_t) |
| 864 | + sfp->mdio_protocol = MDIO_I2C_MARVELL_C22; |
| 865 | else |
| 866 | - sfp->module_t_start_up = T_START_UP; |
| 867 | + sfp->mdio_protocol = MDIO_I2C_NONE; |
| 868 | + |
| 869 | + sfp->quirk = sfp_lookup_quirk(&id); |
| 870 | + if (sfp->quirk && sfp->quirk->fixup) |
| 871 | + sfp->quirk->fixup(sfp); |
| 872 | |
| 873 | return 0; |
| 874 | } |
| 875 | @@ -1936,7 +2122,8 @@ static void sfp_sm_module(struct sfp *sfp, unsigned int event) |
| 876 | break; |
| 877 | |
| 878 | /* Report the module insertion to the upstream device */ |
| 879 | - err = sfp_module_insert(sfp->sfp_bus, &sfp->id); |
| 880 | + err = sfp_module_insert(sfp->sfp_bus, &sfp->id, |
| 881 | + sfp->quirk); |
| 882 | if (err < 0) { |
| 883 | sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0); |
| 884 | break; |
| 885 | @@ -1995,6 +2182,8 @@ static void sfp_sm_main(struct sfp *sfp, unsigned int event) |
| 886 | sfp_module_stop(sfp->sfp_bus); |
| 887 | if (sfp->mod_phy) |
| 888 | sfp_sm_phy_detach(sfp); |
| 889 | + if (sfp->i2c_mii) |
| 890 | + sfp_i2c_mdiobus_destroy(sfp); |
| 891 | sfp_module_tx_disable(sfp); |
| 892 | sfp_soft_stop_poll(sfp); |
| 893 | sfp_sm_next(sfp, SFP_S_DOWN, 0); |
| 894 | @@ -2018,9 +2207,10 @@ static void sfp_sm_main(struct sfp *sfp, unsigned int event) |
| 895 | |
| 896 | /* We need to check the TX_FAULT state, which is not defined |
| 897 | * while TX_DISABLE is asserted. The earliest we want to do |
| 898 | - * anything (such as probe for a PHY) is 50ms. |
| 899 | + * anything (such as probe for a PHY) is 50ms (or more on |
| 900 | + * specific modules). |
| 901 | */ |
| 902 | - sfp_sm_next(sfp, SFP_S_WAIT, T_WAIT); |
| 903 | + sfp_sm_next(sfp, SFP_S_WAIT, sfp->module_t_wait); |
| 904 | break; |
| 905 | |
| 906 | case SFP_S_WAIT: |
| 907 | @@ -2034,8 +2224,8 @@ static void sfp_sm_main(struct sfp *sfp, unsigned int event) |
| 908 | * deasserting. |
| 909 | */ |
| 910 | timeout = sfp->module_t_start_up; |
| 911 | - if (timeout > T_WAIT) |
| 912 | - timeout -= T_WAIT; |
| 913 | + if (timeout > sfp->module_t_wait) |
| 914 | + timeout -= sfp->module_t_wait; |
| 915 | else |
| 916 | timeout = 1; |
| 917 | |
| 918 | @@ -2057,6 +2247,12 @@ static void sfp_sm_main(struct sfp *sfp, unsigned int event) |
| 919 | sfp->sm_fault_retries == N_FAULT_INIT); |
| 920 | } else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) { |
| 921 | init_done: |
| 922 | + /* Create mdiobus and start trying for PHY */ |
| 923 | + ret = sfp_sm_add_mdio_bus(sfp); |
| 924 | + if (ret < 0) { |
| 925 | + sfp_sm_next(sfp, SFP_S_FAIL, 0); |
| 926 | + break; |
| 927 | + } |
| 928 | sfp->sm_phy_retries = R_PHY_RETRY; |
| 929 | goto phy_probe; |
| 930 | } |
| 931 | @@ -2409,6 +2605,8 @@ static int sfp_probe(struct platform_device *pdev) |
| 932 | return PTR_ERR(sfp->gpio[i]); |
| 933 | } |
| 934 | |
| 935 | + sfp->state_hw_mask = SFP_F_PRESENT; |
| 936 | + |
| 937 | sfp->get_state = sfp_gpio_get_state; |
| 938 | sfp->set_state = sfp_gpio_set_state; |
| 939 | |
| 940 | diff --git a/drivers/net/phy/sfp.h b/drivers/net/phy/sfp.h |
| 941 | index b83f705..ef06d35 100644 |
| 942 | --- a/drivers/net/phy/sfp.h |
| 943 | +++ b/drivers/net/phy/sfp.h |
| 944 | @@ -6,6 +6,13 @@ |
| 945 | |
| 946 | struct sfp; |
| 947 | |
| 948 | +struct sfp_quirk { |
| 949 | + const char *vendor; |
| 950 | + const char *part; |
| 951 | + void (*modes)(const struct sfp_eeprom_id *id, unsigned long *modes); |
| 952 | + void (*fixup)(struct sfp *sfp); |
| 953 | +}; |
| 954 | + |
| 955 | struct sfp_socket_ops { |
| 956 | void (*attach)(struct sfp *sfp); |
| 957 | void (*detach)(struct sfp *sfp); |
| 958 | @@ -20,7 +27,8 @@ int sfp_add_phy(struct sfp_bus *bus, struct phy_device *phydev); |
| 959 | void sfp_remove_phy(struct sfp_bus *bus); |
| 960 | void sfp_link_up(struct sfp_bus *bus); |
| 961 | void sfp_link_down(struct sfp_bus *bus); |
| 962 | -int sfp_module_insert(struct sfp_bus *bus, const struct sfp_eeprom_id *id); |
| 963 | +int sfp_module_insert(struct sfp_bus *bus, const struct sfp_eeprom_id *id, |
| 964 | + const struct sfp_quirk *quirk); |
| 965 | void sfp_module_remove(struct sfp_bus *bus); |
| 966 | int sfp_module_start(struct sfp_bus *bus); |
| 967 | void sfp_module_stop(struct sfp_bus *bus); |
| 968 | diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c |
developer | f1e143b | 2023-01-09 16:25:59 +0800 | [diff] [blame] | 969 | index 512f27b..daed73a 100644 |
developer | c9bd9ae | 2022-12-23 16:54:36 +0800 | [diff] [blame] | 970 | --- a/drivers/net/phy/marvell10g.c |
| 971 | +++ b/drivers/net/phy/marvell10g.c |
developer | f1e143b | 2023-01-09 16:25:59 +0800 | [diff] [blame] | 972 | @@ -32,6 +32,15 @@ |
| 973 | #define MV_PHY_ALASKA_NBT_QUIRK_REV (MARVELL_PHY_ID_88X3310 | 0xa) |
| 974 | |
| 975 | enum { |
| 976 | + MV_PMA_21X0_PORT_CTRL = 0xc04a, |
| 977 | + MV_PMA_21X0_PORT_CTRL_SWRST = BIT(15), |
| 978 | + MV_PMA_21X0_PORT_CTRL_MACTYPE_MASK = 0x7, |
| 979 | + MV_PMA_21X0_PORT_CTRL_MACTYPE_USXGMII = 0x0, |
| 980 | + MV_PMA_2180_PORT_CTRL_MACTYPE_DXGMII = 0x1, |
| 981 | + MV_PMA_2180_PORT_CTRL_MACTYPE_QXGMII = 0x2, |
| 982 | + MV_PMA_21X0_PORT_CTRL_MACTYPE_5GBASER = 0x4, |
| 983 | + MV_PMA_21X0_PORT_CTRL_MACTYPE_5GBASER_NO_SGMII_AN = 0x5, |
| 984 | + MV_PMA_21X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH = 0x6, |
| 985 | MV_PMA_BOOT = 0xc050, |
| 986 | MV_PMA_BOOT_FATAL = BIT(0), |
| 987 | |
| 988 | @@ -53,7 +62,18 @@ enum { |
| 989 | |
| 990 | /* Vendor2 MMD registers */ |
| 991 | MV_V2_PORT_CTRL = 0xf001, |
| 992 | - MV_V2_PORT_CTRL_PWRDOWN = 0x0800, |
| 993 | + MV_V2_PORT_CTRL_PWRDOWN = BIT(11), |
| 994 | + MV_V2_33X0_PORT_CTRL_SWRST = BIT(15), |
| 995 | + MV_V2_33X0_PORT_CTRL_MACTYPE_MASK = 0x7, |
| 996 | + MV_V2_33X0_PORT_CTRL_MACTYPE_RXAUI = 0x0, |
| 997 | + MV_V2_3310_PORT_CTRL_MACTYPE_XAUI_RATE_MATCH = 0x1, |
| 998 | + MV_V2_3340_PORT_CTRL_MACTYPE_RXAUI_NO_SGMII_AN = 0x1, |
| 999 | + MV_V2_33X0_PORT_CTRL_MACTYPE_RXAUI_RATE_MATCH = 0x2, |
| 1000 | + MV_V2_3310_PORT_CTRL_MACTYPE_XAUI = 0x3, |
| 1001 | + MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER = 0x4, |
| 1002 | + MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER_NO_SGMII_AN = 0x5, |
| 1003 | + MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH = 0x6, |
| 1004 | + MV_V2_33X0_PORT_CTRL_MACTYPE_USXGMII = 0x7, |
| 1005 | MV_V2_TEMP_CTRL = 0xf08a, |
| 1006 | MV_V2_TEMP_CTRL_MASK = 0xc000, |
| 1007 | MV_V2_TEMP_CTRL_SAMPLE = 0x0000, |
| 1008 | @@ -62,11 +82,24 @@ enum { |
| 1009 | MV_V2_TEMP_UNKNOWN = 0x9600, /* unknown function */ |
| 1010 | }; |
| 1011 | |
| 1012 | +struct mv3310_chip { |
| 1013 | + int (*get_mactype)(struct phy_device *phydev); |
| 1014 | + int (*init_interface)(struct phy_device *phydev, int mactype); |
| 1015 | +}; |
| 1016 | + |
| 1017 | struct mv3310_priv { |
| 1018 | + bool rate_match; |
| 1019 | + phy_interface_t const_interface; |
| 1020 | + |
| 1021 | struct device *hwmon_dev; |
| 1022 | char *hwmon_name; |
| 1023 | }; |
| 1024 | |
| 1025 | +static const struct mv3310_chip *to_mv3310_chip(struct phy_device *phydev) |
| 1026 | +{ |
| 1027 | + return phydev->drv->driver_data; |
| 1028 | +} |
| 1029 | + |
| 1030 | #ifdef CONFIG_HWMON |
| 1031 | static umode_t mv3310_hwmon_is_visible(const void *data, |
| 1032 | enum hwmon_sensor_types type, |
| 1033 | @@ -155,13 +188,6 @@ static int mv3310_hwmon_config(struct phy_device *phydev, bool enable) |
developer | c9bd9ae | 2022-12-23 16:54:36 +0800 | [diff] [blame] | 1034 | MV_V2_TEMP_CTRL_MASK, val); |
| 1035 | } |
| 1036 | |
| 1037 | -static void mv3310_hwmon_disable(void *data) |
| 1038 | -{ |
| 1039 | - struct phy_device *phydev = data; |
| 1040 | - |
| 1041 | - mv3310_hwmon_config(phydev, false); |
| 1042 | -} |
| 1043 | - |
| 1044 | static int mv3310_hwmon_probe(struct phy_device *phydev) |
| 1045 | { |
| 1046 | struct device *dev = &phydev->mdio.dev; |
developer | f1e143b | 2023-01-09 16:25:59 +0800 | [diff] [blame] | 1047 | @@ -185,10 +211,6 @@ static int mv3310_hwmon_probe(struct phy_device *phydev) |
developer | c9bd9ae | 2022-12-23 16:54:36 +0800 | [diff] [blame] | 1048 | if (ret) |
| 1049 | return ret; |
| 1050 | |
| 1051 | - ret = devm_add_action_or_reset(dev, mv3310_hwmon_disable, phydev); |
| 1052 | - if (ret) |
| 1053 | - return ret; |
| 1054 | - |
| 1055 | priv->hwmon_dev = devm_hwmon_device_register_with_info(dev, |
| 1056 | priv->hwmon_name, phydev, |
| 1057 | &mv3310_hwmon_chip_info, NULL); |
developer | f1e143b | 2023-01-09 16:25:59 +0800 | [diff] [blame] | 1058 | @@ -262,6 +284,11 @@ static int mv3310_probe(struct phy_device *phydev) |
developer | c9bd9ae | 2022-12-23 16:54:36 +0800 | [diff] [blame] | 1059 | return phy_sfp_probe(phydev, &mv3310_sfp_ops); |
| 1060 | } |
| 1061 | |
| 1062 | +static void mv3310_remove(struct phy_device *phydev) |
| 1063 | +{ |
| 1064 | + mv3310_hwmon_config(phydev, false); |
| 1065 | +} |
| 1066 | + |
| 1067 | static int mv3310_suspend(struct phy_device *phydev) |
| 1068 | { |
| 1069 | return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL, |
developer | f1e143b | 2023-01-09 16:25:59 +0800 | [diff] [blame] | 1070 | @@ -297,8 +324,84 @@ static bool mv3310_has_pma_ngbaset_quirk(struct phy_device *phydev) |
| 1071 | MV_PHY_ALASKA_NBT_QUIRK_MASK) == MV_PHY_ALASKA_NBT_QUIRK_REV; |
| 1072 | } |
| 1073 | |
| 1074 | +static int mv2110_get_mactype(struct phy_device *phydev) |
| 1075 | +{ |
| 1076 | + int mactype; |
| 1077 | + |
| 1078 | + mactype = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_21X0_PORT_CTRL); |
| 1079 | + if (mactype < 0) |
| 1080 | + return mactype; |
| 1081 | + |
| 1082 | + return mactype & MV_PMA_21X0_PORT_CTRL_MACTYPE_MASK; |
| 1083 | +} |
| 1084 | + |
| 1085 | +static int mv3310_get_mactype(struct phy_device *phydev) |
| 1086 | +{ |
| 1087 | + int mactype; |
| 1088 | + |
| 1089 | + mactype = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL); |
| 1090 | + if (mactype < 0) |
| 1091 | + return mactype; |
| 1092 | + |
| 1093 | + return mactype & MV_V2_33X0_PORT_CTRL_MACTYPE_MASK; |
| 1094 | +} |
| 1095 | + |
| 1096 | +static int mv2110_init_interface(struct phy_device *phydev, int mactype) |
| 1097 | +{ |
| 1098 | + struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev); |
| 1099 | + |
| 1100 | + priv->rate_match = false; |
| 1101 | + |
| 1102 | + if (mactype == MV_PMA_21X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH) |
| 1103 | + priv->rate_match = true; |
| 1104 | + |
| 1105 | + if (mactype == MV_PMA_21X0_PORT_CTRL_MACTYPE_USXGMII) |
| 1106 | + priv->const_interface = PHY_INTERFACE_MODE_USXGMII; |
| 1107 | + else if (mactype == MV_PMA_21X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH) |
| 1108 | + priv->const_interface = PHY_INTERFACE_MODE_10GKR; |
| 1109 | + else if (mactype == MV_PMA_21X0_PORT_CTRL_MACTYPE_5GBASER || |
| 1110 | + mactype == MV_PMA_21X0_PORT_CTRL_MACTYPE_5GBASER_NO_SGMII_AN) |
| 1111 | + priv->const_interface = PHY_INTERFACE_MODE_NA; |
| 1112 | + else |
| 1113 | + return -EINVAL; |
| 1114 | + |
| 1115 | + return 0; |
| 1116 | +} |
| 1117 | + |
| 1118 | +static int mv3310_init_interface(struct phy_device *phydev, int mactype) |
| 1119 | +{ |
| 1120 | + struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev); |
| 1121 | + |
| 1122 | + priv->rate_match = false; |
| 1123 | + |
| 1124 | + if (mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH || |
| 1125 | + mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_RXAUI_RATE_MATCH || |
| 1126 | + mactype == MV_V2_3310_PORT_CTRL_MACTYPE_XAUI_RATE_MATCH) |
| 1127 | + priv->rate_match = true; |
| 1128 | + |
| 1129 | + if (mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_USXGMII) |
| 1130 | + priv->const_interface = PHY_INTERFACE_MODE_USXGMII; |
| 1131 | + else if (mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH || |
| 1132 | + mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER_NO_SGMII_AN || |
| 1133 | + mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER) |
| 1134 | + priv->const_interface = PHY_INTERFACE_MODE_10GKR; |
| 1135 | + else if (mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_RXAUI_RATE_MATCH || |
| 1136 | + mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_RXAUI) |
| 1137 | + priv->const_interface = PHY_INTERFACE_MODE_RXAUI; |
| 1138 | + else if (mactype == MV_V2_3310_PORT_CTRL_MACTYPE_XAUI_RATE_MATCH || |
| 1139 | + mactype == MV_V2_3310_PORT_CTRL_MACTYPE_XAUI) |
| 1140 | + priv->const_interface = PHY_INTERFACE_MODE_XAUI; |
| 1141 | + else |
| 1142 | + return -EINVAL; |
| 1143 | + |
| 1144 | + return 0; |
| 1145 | +} |
| 1146 | + |
| 1147 | static int mv3310_config_init(struct phy_device *phydev) |
| 1148 | { |
| 1149 | + const struct mv3310_chip *chip = to_mv3310_chip(phydev); |
| 1150 | + int err, mactype; |
| 1151 | + |
| 1152 | /* Check that the PHY interface type is compatible */ |
| 1153 | if (phydev->interface != PHY_INTERFACE_MODE_SGMII && |
| 1154 | phydev->interface != PHY_INTERFACE_MODE_2500BASEX && |
| 1155 | @@ -307,6 +410,16 @@ static int mv3310_config_init(struct phy_device *phydev) |
| 1156 | phydev->interface != PHY_INTERFACE_MODE_10GKR) |
| 1157 | return -ENODEV; |
| 1158 | |
| 1159 | + mactype = chip->get_mactype(phydev); |
| 1160 | + if (mactype < 0) |
| 1161 | + return mactype; |
| 1162 | + |
| 1163 | + err = chip->init_interface(phydev, mactype); |
| 1164 | + if (err) { |
| 1165 | + phydev_err(phydev, "MACTYPE configuration invalid\n"); |
| 1166 | + return err; |
| 1167 | + } |
| 1168 | + |
| 1169 | return 0; |
| 1170 | } |
| 1171 | |
| 1172 | @@ -384,6 +497,23 @@ static int mv3310_aneg_done(struct phy_device *phydev) |
| 1173 | |
| 1174 | static void mv3310_update_interface(struct phy_device *phydev) |
| 1175 | { |
| 1176 | + struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev); |
| 1177 | + |
| 1178 | + if (!phydev->link) |
| 1179 | + return; |
| 1180 | + |
| 1181 | + /* In all of the "* with Rate Matching" modes the PHY interface is fixed |
| 1182 | + * at 10Gb. The PHY adapts the rate to actual wire speed with help of |
| 1183 | + * internal 16KB buffer. |
| 1184 | + * |
| 1185 | + * In USXGMII mode the PHY interface mode is also fixed. |
| 1186 | + */ |
| 1187 | + if (priv->rate_match || |
| 1188 | + priv->const_interface == PHY_INTERFACE_MODE_USXGMII) { |
| 1189 | + phydev->interface = priv->const_interface; |
| 1190 | + return; |
| 1191 | + } |
| 1192 | + |
| 1193 | if ((phydev->interface == PHY_INTERFACE_MODE_SGMII || |
| 1194 | phydev->interface == PHY_INTERFACE_MODE_2500BASEX || |
| 1195 | phydev->interface == PHY_INTERFACE_MODE_10GKR) && phydev->link) { |
| 1196 | @@ -499,11 +629,22 @@ static int mv3310_read_status(struct phy_device *phydev) |
| 1197 | return 0; |
| 1198 | } |
| 1199 | |
| 1200 | +static const struct mv3310_chip mv3310_type = { |
| 1201 | + .get_mactype = mv3310_get_mactype, |
| 1202 | + .init_interface = mv3310_init_interface, |
| 1203 | +}; |
| 1204 | + |
| 1205 | +static const struct mv3310_chip mv2111_type = { |
| 1206 | + .get_mactype = mv2110_get_mactype, |
| 1207 | + .init_interface = mv2110_init_interface, |
| 1208 | +}; |
| 1209 | + |
| 1210 | static struct phy_driver mv3310_drivers[] = { |
| 1211 | { |
| 1212 | .phy_id = MARVELL_PHY_ID_88X3310, |
| 1213 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
| 1214 | .name = "mv88x3310", |
| 1215 | + .driver_data = &mv3310_type, |
| 1216 | .get_features = mv3310_get_features, |
| 1217 | .soft_reset = genphy_no_soft_reset, |
| 1218 | .config_init = mv3310_config_init, |
| 1219 | @@ -513,11 +654,13 @@ static struct phy_driver mv3310_drivers[] = { |
developer | c9bd9ae | 2022-12-23 16:54:36 +0800 | [diff] [blame] | 1220 | .config_aneg = mv3310_config_aneg, |
| 1221 | .aneg_done = mv3310_aneg_done, |
| 1222 | .read_status = mv3310_read_status, |
| 1223 | + .remove = mv3310_remove, |
| 1224 | }, |
| 1225 | { |
| 1226 | .phy_id = MARVELL_PHY_ID_88E2110, |
developer | f1e143b | 2023-01-09 16:25:59 +0800 | [diff] [blame] | 1227 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
| 1228 | .name = "mv88x2110", |
| 1229 | + .driver_data = &mv2111_type, |
| 1230 | .probe = mv3310_probe, |
| 1231 | .suspend = mv3310_suspend, |
| 1232 | .resume = mv3310_resume, |
| 1233 | @@ -526,6 +669,7 @@ static struct phy_driver mv3310_drivers[] = { |
developer | c9bd9ae | 2022-12-23 16:54:36 +0800 | [diff] [blame] | 1234 | .config_aneg = mv3310_config_aneg, |
| 1235 | .aneg_done = mv3310_aneg_done, |
| 1236 | .read_status = mv3310_read_status, |
| 1237 | + .remove = mv3310_remove, |
| 1238 | }, |
| 1239 | }; |
| 1240 | |